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boot.c @ 232

Revision 232, 21.2 KB checked in by fe50, 3 years ago (diff)

ixus90_sd790: added 1.00c version (by ehmu, http://chdk.setepontos.com/index.php/topic,2187.msg45753.html#msg45753)
ixus90_sd790: improvements for 1.00d version (by ehmu, http://chdk.setepontos.com/index.php/topic,2187.msg46294.html#msg46294): fixed a bug with dark frame subtraction (nrflag was incorrect) improved USB remote support cosmetic changes
added ixus90_sd790-100e to the makefile (copy of the 100d version, 100e and 100d are identical)

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4
5	const char * const new_sa = &_end;
6
7	void __attribute__((naked,noinline)) jogdial_task_my();
8
9	// Forward declarations
10	//void CreateTask_PhySw();
11	void CreateTask_spytask();
12
13	void taskCreateHook(unsigned int *p)
14	{
15	p-=16;
16	if (p[0]==0xFF821ADC) p[0]=(unsigned int)mykbd_task;
17	if (p[0]==0xFF842C84) p[0]=(unsigned int)jogdial_task_my;
18	if (p[0]==0xFF85A278) p[0]=(unsigned int)movie_record_task;
19	if (p[0]==0xFF85E2b0) p[0]=(unsigned int)capt_seq_task;
20	if (p[0]==0xFF8791D0) p[0]=(unsigned int)init_file_modules_task;
21	if (p[0]==0xFF8b6A80) p[0]=(unsigned int)exp_drv_task;
22	}
23
24	void boot();
25
26	void boot() { //#fs
27	long canon_data_src = (void)0xFFB1CDDC;
28	long canon_data_dst = (void)0x1900;
29	long canon_data_len = 0xF134 - 0x1900; // data_end - data_start
30	long canon_bss_start = (void)0xF134; // just after data
31	long canon_bss_len = 0xCBC48 - 0xF134; //0xFEBC;
32
33	long i;
34
35	// Code taken from VxWorks CHDK. Changes CPU speed?
36	asm volatile (
37	"MRC p15, 0, R0,c1,c0\n"
38	"ORR R0, R0, #0x1000\n"
39	"ORR R0, R0, #4\n"
40	"ORR R0, R0, #1\n"
41	"MCR p15, 0, R0,c1,c0\n"
42	:::"r0");
43
44	for(i=0;i<canon_data_len/4;i++)
45	canon_data_dst[i]=canon_data_src[i];
46
47	for(i=0;i<canon_bss_len/4;i++)
48	canon_bss_start[i]=0;
49
50	// asm volatile ("B sub_FF810000\n" );
51
52	// Captain Hook
53	(int)0x1930 = (int)taskCreateHook;
54
55	// jump to init-sequence that follows the data-copy-routine
56	asm volatile ("B sub_FF8101A4_my\n" );
57	}; //#fe
58
59
60	// init
61	void __attribute__((naked,noinline)) sub_FF8101A4_my() { //#fs
62	asm volatile (
63
64	"loc_FF8101A4:\n" // ; CODE XREF: ROM:FF810160j
65	"LDR R0, =0xFF81021C\n"
66	"MOV R1, #0\n"
67	"LDR R3, =0xFF810254\n"
68
69	"loc_FF8101B0:\n" // ; CODE XREF: ROM:FF8101BCj
70	"CMP R0, R3\n"
71	"LDRCC R2, [R0],#4\n"
72	"STRCC R2, [R1],#4\n"
73	"BCC loc_FF8101B0\n"
74	"LDR R0, =0xFF810254\n"
75	"MOV R1, #0x4B0\n"
76	"LDR R3, =0xFF810468\n"
77
78	"loc_FF8101CC:\n" // ; CODE XREF: ROM:FF8101D8j
79	"CMP R0, R3\n"
80	"LDRCC R2, [R0],#4\n"
81	"STRCC R2, [R1],#4\n"
82	"BCC loc_FF8101CC\n"
83	"MOV R0, #0xD2\n"
84	"MSR CPSR_cxsf, R0\n"
85	"MOV SP, #0x1000\n"
86	"MOV R0, #0xD3\n"
87	"MSR CPSR_cxsf, R0\n"
88	"MOV SP, #0x1000\n"
89	// "LDR R0, loc_FF810210\n" // =0x6C4\n" //loc_FF810210\n"
90	"LDR R0, =0x6C4\n" // +
91	"LDR R2, =0xEEEEEEEE\n"
92	"MOV R3, #0x1000\n"
93
94	"loc_FF810200:\n" // ; CODE XREF: ROM:FF810208j
95	"CMP R0, R3\n"
96	"STRCC R2, [R0],#4\n"
97	"BCC loc_FF810200\n"
98	"BL sub_FF810FA0_my\n"
99	);
100	// Working
101	} //#fe
102
103	void __attribute__((naked,noinline)) sub_FF810FA0_my() { //#fs
104	asm volatile (
105	"STR LR, [SP,#-4]!\n"
106	"SUB SP, SP, #0x74\n"
107	"MOV R0, SP\n"
108	"MOV R1, #0x74\n"
109	"BL sub_FFAACA58\n"
110	"MOV R0, #0x53000\n"
111	"STR R0, [SP,#0x74-0x70]\n"
112	//"LDR R0, =0xCBC48\n"
113	"LDR R0, =new_sa\n"
114	"LDR R0, [R0]\n"
115	"LDR R2, =0x279C00\n"
116	"LDR R1, =0x272968\n"
117	"STR R0, [SP,#0x74-0x6C]\n"
118	"SUB R0, R1, R0\n"
119	"ADD R3, SP, #0x74-0x68\n"
120	"STR R2, [SP,#0x74-0x74]\n"
121	"STMIA R3, {R0-R2}\n"
122	"MOV R0, #0x22\n"
123	"STR R0, [SP,#0x74-0x5C]\n"
124	"MOV R0, #0x68\n"
125	"STR R0, [SP,#0x74-0x58]\n"
126	"LDR R0, =0x19B\n"
127	"MOV R1, #0x64\n"
128	"STRD R0, [SP,#0x74-0x54]\n"
129	"MOV R0, #0x78\n"
130	"STRD R0, [SP,#0x74-0x4C]\n"
131	"MOV R0, #0\n"
132	"STR R0, [SP,#0x74-0x44]\n"
133	"STR R0, [SP,#0x74-0x40]\n"
134	"MOV R0, #0x10\n"
135	"STR R0, [SP,#0x74-0x18]\n"
136	"MOV R0, #0x800\n"
137	"STR R0, [SP,#0x74-0x14]\n"
138	"MOV R0, #0xA0\n"
139	"STR R0, [SP,#0x74-0x10]\n"
140	"MOV R0, #0x280\n"
141	"STR R0, [SP,#0x74-0xC]\n"
142	//"LDR R1, =0xFF814DA4\n"
143	"LDR R1, =uHwSetup_my\n"
144	"MOV R0, SP\n"
145	"MOV R2, #0\n"
146	"BL sub_FF812D58\n"
147
148	"ADD SP, SP, #0x74\n"
149	"LDR PC, [SP],#4\n"
150	);
151	// Working
152	}; //#fe
153
154	// Extracted method: uHwSetup (FF814DA4)
155	void __attribute__((naked,noinline)) uHwSetup_my() { //#fs
156	asm volatile (
157	"STMFD SP!, {R4,LR}\n"
158	"BL sub_FF81094C\n"
159	"BL sub_FF819664\n"
160	"CMP R0, #0\n"
161	"LDRLT R0, =0xFF814EB8\n" // ; "dmSetup"\n"
162	"BLLT sub_FF814E98\n"
163	"BL sub_FF8149C8\n"
164	"CMP R0, #0\n"
165	"LDRLT R0, =0xFF814EC0\n" // ; "termDriverInit"\n"
166	"BLLT sub_FF814E98\n"
167	"LDR R0, =0xFF814ED0\n" // ; "/_term"\n"
168	"BL sub_FF814AB4\n"
169	"CMP R0, #0\n"
170	"LDRLT R0, =0xFF814ED8\n" // ; "termDeviceCreate"\n"
171	"BLLT sub_FF814E98\n"
172	"LDR R0, =0xFF814ED0\n" // ; "/_term"\n"
173	"BL sub_FF813564\n"
174	"CMP R0, #0\n"
175	"LDRLT R0, =0xFF814EEC\n" // ; "stdioSetup"\n"
176	"BLLT sub_FF814E98\n"
177	"BL sub_FF8191EC\n"
178	"CMP R0, #0\n"
179	"LDRLT R0, =0xFF814EF8\n" // ; "stdlibSetup"\n"
180	"BLLT sub_FF814E98\n"
181	"BL sub_FF8114B8\n"
182	"CMP R0, #0\n"
183	"LDRLT R0, =0xFF814F04\n" // ; "armlib_setup"\n"
184	"BLLT sub_FF814E98\n"
185	"LDMFD SP!, {R4,LR}\n"
186	"B taskcreate_Startup_my\n"
187	);
188	}; //#fe
189
190	// Extracted method: taskcreate_Startup (FF81CCBC)
191	void __attribute__((naked,noinline)) taskcreate_Startup_my() { //#fs
192	asm volatile (
193	"STMFD SP!, {R3-R5,LR}\n"
194	"BL sub_FF821C00\n"
195	"BL sub_FF829EF0\n"
196	"CMP R0, #0\n"
197	"BNE loc_FF81CCFC\n"
198	"LDR R4, =0xC0220000\n"
199	"LDR R0, [R4,#0xFC]\n"
200	"TST R0, #1\n"
201	"MOVEQ R0, #0x12C\n"
202	"BLEQ _SleepTask\n"
203	"BL sub_FF821BFC\n"
204	"CMP R0, #0\n"
205	"BNE loc_FF81CCFC\n"
206	"MOV R0, #0x44\n"
207	"STR R0, [R4,#0x4C]\n"
208
209	"loc_FF81CCF8:\n" // ; CODE XREF: taskcreate_Startup:loc_FF81CCF8j
210	"B loc_FF81CCF8\n"
211
212	"loc_FF81CCFC:\n" // ; CODE XREF: taskcreate_Startup+10j
213	"BL sub_FF821C08\n"
214	"BL sub_FF821C04\n"
215	"BL sub_FF828278\n"
216	"LDR R1, =0x2CE000\n"
217	"MOV R0, #0\n"
218	"BL sub_FF8284C0\n"
219	"BL sub_FF82846C\n"
220	"MOV R3, #0\n"
221	"STR R3, [SP,#0x10-0x10]\n"
222	"LDR R3, =task_Startup_my\n" //task_Startup
223	"MOV R2, #0\n"
224	"MOV R1, #0x19\n"
225	"LDR R0, =0xFF81CD44\n" // ; "Startup"\n"
226	"BL _CreateTask\n"
227	"MOV R0, #0\n"
228	//"LDMFD SP!, {R3-R5,PC}\n"
229	"LDMFD SP!, {ip, pc}\n"
230	);
231	}; //#fe
232
233	// Extracted method: task_Startup (FF81CC60)
234	void __attribute__((naked,noinline)) task_Startup_my() { //#fs
235	asm volatile (
236	"STMFD SP!, {R4,LR}\n"
237	"BL sub_FF81516C\n" // clockSave
238	"BL sub_FF822D60\n"
239	"BL sub_FF81FE00\n"
240	//"BL sub_FF829F30\n" // hl??
241	"BL sub_FF82A0F8\n"
242	//"BL sub_FF829FB8\n" // StartDiskBoot
243	);
244
245	CreateTask_spytask();
246
247	asm volatile (
248	"BL sub_FF82A2AC\n"
249	"BL sub_FF82A148\n" // good question.... equiv of touch_wheel.c ?
250	"BL sub_FF8277B8\n"
251	"BL sub_FF82A2B0\n"
252	);
253
254	// CreateTask_PhySw();
255
256	asm volatile (
257	"BL sub_FF821B10\n" // taskcreate_PhySw
258	"BL sub_FF824CC8\n" // task_ShootSeqTask
259	"BL sub_FF82A2C8\n"
260	//"BL sub_FF81FB20\n" // nullsub_2
261	"BL sub_FF820FCC\n"
262	"BL sub_FF829CB8\n" // taskcreate_Bye
263	"BL sub_FF821640\n"
264	"BL sub_FF820EBC\n" // taskcreate_TempCheck\n"
265	"BL sub_FF82AD6C\n"
266	"BL sub_FF820E78\n"
267	//"LDMFD SP!, {R4,LR}\n"
268	"BL sub_FF815070\n"
269	"LDMFD SP!, {R4,PC}\n"
270	);
271	}; //#fe
272
273
274	void CreateTask_spytask() { //#fs
275	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
276	}; //#fe
277
278	//void CreateTask_PhySw() { //#fs
279	// _CreateTask("PhySw", 0x18, 0x800, mykbd_task, 0);
280	//}; //#fe
281
282
283	// -----------------
284	// SDHC-Boot-Support
285	// -----------------
286
287	// 0xFF8791d0
288	void __attribute__((naked,noinline)) init_file_modules_task() { //#fs
289	asm volatile (
290	"STMFD SP!, {R4-R6,LR}\n"
291	"BL sub_FF86DAE8\n"
292	"LDR R5, =0x5006\n"
293	"MOVS R4, R0\n"
294	"MOVNE R1, #0\n"
295	"MOVNE R0, R5\n"
296	"BLNE _PostLogicalEventToUI\n"
297	"BL sub_FF86DB14_my\n"
298	"BL core_spytask_can_start\n" // CHDK: Set "it's-safe-to-start" -flag for spytask
299	"CMP R4, #0\n"
300	"MOVEQ R0, R5\n"
301	"LDMEQFD SP!, {R4-R6,LR}\n"
302	"MOVEQ R1, #0\n"
303	"BEQ _PostLogicalEventToUI\n"
304	"LDMFD SP!, {R4-R6,PC}\n"
305	);
306	}; //#fe
307
308	void __attribute__((naked,noinline)) sub_FF86DB14_my() { //#fs
309	asm volatile (
310	"STMFD SP!, {R4,LR}\n"
311	"BL sub_FF84F174_my\n" // continue to SDHC-hook here
312	"LDR R4, =0x57D0\n"
313	"LDR R0, [R4,#4]\n"
314	"CMP R0, #0\n"
315	"BNE loc_FF86DB44\n"
316	"BL sub_FF881C08\n"
317	"BL sub_FF9055FC\n"
318	"BL sub_FF881C08\n"
319	"BL sub_FF84CB64\n"
320	"BL sub_FF881C18\n"
321	"BL sub_FF9056C8\n"
322
323	"loc_FF86DB44:\n" // ; CODE XREF: sub_FF86DB14+14j
324	"MOV R0, #1\n"
325	"STR R0, [R4]\n"
326	"LDMFD SP!, {R4,PC}\n"
327	);
328	}; //#fe
329
330	void __attribute__((naked,noinline)) sub_FF84F174_my() { //#fs
331	asm volatile (
332	"STMFD SP!, {R4-R6,LR}\n"
333	"MOV R6, #0\n"
334	"MOV R0, R6\n"
335	"BL sub_FF84EC34\n"
336	"LDR R4, =0x11890\n"
337	"MOV R5, #0\n"
338	"LDR R0, [R4,#0x38]\n"
339	"BL sub_FF84F668\n"
340	"CMP R0, #0\n"
341	"LDREQ R0, =0x29D4\n"
342	"STREQ R5, [R0,#0x10]\n"
343	"STREQ R5, [R0,#0x14]\n"
344	"STREQ R5, [R0,#0x18]\n"
345	"MOV R0, R6\n"
346	"BL sub_FF84EC74\n" //uMounter (u=unknown, just to prevent misunderstandings)
347	"MOV R0, R6\n"
348	"BL sub_FF84EFB0_my\n" // continue to SDHC-hook here!
349	"MOV R5, R0\n"
350	"MOV R0, R6\n"
351	"BL sub_FF84F01C\n"
352	"LDR R1, [R4,#0x3C]\n"
353	"AND R2, R5, R0\n"
354	"CMP R1, #0\n"
355	"MOV R0, #0\n"
356	"MOVEQ R0, #0x80000001\n"
357	"BEQ loc_FF84F208\n"
358	"LDR R3, [R4,#0x2C]\n"
359	"CMP R3, #2\n"
360	"MOVEQ R0, #4\n"
361	"CMP R1, #5\n"
362	"ORRNE R0, R0, #1\n"
363	"BICEQ R0, R0, #1\n"
364	"CMP R2, #0\n"
365	"BICEQ R0, R0, #2\n"
366	"ORREQ R0, R0, #0x80000000\n"
367	"BICNE R0, R0, #0x80000000\n"
368	"ORRNE R0, R0, #2\n"
369
370	"loc_FF84F208:\n" // ; CODE XREF: sub_FF84F174+64j
371	"STR R0, [R4,#0x40]\n"
372	"LDMFD SP!, {R4-R6,PC}\n"
373	);
374	}; //#fe
375
376	void __attribute__((naked,noinline)) sub_FF84EFB0_my() { //#fs
377	asm volatile (
378	"STMFD SP!, {R4-R6,LR}\n"
379	"LDR R5, =0x29D4\n"
380	"MOV R6, R0\n"
381	"LDR R0, [R5,#0x14]\n"
382	"CMP R0, #0\n"
383	"MOVNE R0, #1\n"
384	"LDMNEFD SP!, {R4-R6,PC}\n"
385	"MOV R0, #0x17\n"
386	"MUL R1, R0, R6\n"
387	"LDR R0, =0x11890\n"
388	"ADD R4, R0, R1,LSL#2\n"
389	"LDR R0, [R4,#0x38]\n"
390	"MOV R1, R6\n"
391	"BL sub_FF84ED40_my\n" //continue to SDHC-hook here
392	"CMP R0, #0\n"
393	"LDMEQFD SP!, {R4-R6,PC}\n"
394	"LDR R0, [R4,#0x38]\n"
395	"MOV R1, R6\n"
396	"BL sub_FF84EEA8\n"
397	"CMP R0, #0\n"
398	"LDMEQFD SP!, {R4-R6,PC}\n"
399	"MOV R0, R6\n"
400	"BL sub_FF84E83C\n"
401	"CMP R0, #0\n"
402	"MOVNE R1, #1\n"
403	"STRNE R1, [R5,#0x14]\n"
404	"LDMFD SP!, {R4-R6,PC}\n"
405	);
406	}; //#fe
407
408	void __attribute__((naked,noinline)) sub_FF84ED40_my() { //#fs ; Partition t
409	asm volatile (
410	"STMFD SP!, {R4-R8,LR}\n"
411	"MOV R8, R0\n"
412	"MOV R0, #0x17\n"
413	"MUL R1, R0, R1\n"
414	"LDR R0, =0x11890\n"
415	"MOV R6, #0\n"
416	"ADD R7, R0, R1,LSL#2\n"
417	"LDR R0, [R7,#0x3C]\n"
418	"MOV R5, #0\n"
419	"CMP R0, #6\n"
420	"ADDLS PC, PC, R0,LSL#2\n"
421	"B loc_FF84EE8C\n"
422
423	"loc_FF84ED70:\n" // ; CODE XREF: sub_FF84ED40+28j
424	"B loc_FF84EDA4\n"
425
426	"loc_FF84ED74:\n" // ; CODE XREF: sub_FF84ED40+28j
427	"B loc_FF84ED8C\n"
428
429	"loc_FF84ED78:\n" // ; CODE XREF: sub_FF84ED40+28j
430	"B loc_FF84ED8C\n"
431
432	"loc_FF84ED7C:\n" // ; CODE XREF: sub_FF84ED40+28j
433	"B loc_FF84ED8C\n"
434
435	"loc_FF84ED80:\n" // ; CODE XREF: sub_FF84ED40+28j
436	"B loc_FF84ED8C\n"
437
438	"loc_FF84ED84:\n" // ; CODE XREF: sub_FF84ED40+28j
439	"B loc_FF84EE84\n"
440
441	"loc_FF84ED88:\n" // ; CODE XREF: sub_FF84ED40+28j
442	"B loc_FF84ED8C\n"
443	"loc_FF84ED8C:\n" // ; CODE XREF: sub_FF84ED40+28j
444	"MOV R2, #0\n"
445	"MOV R1, #0x200\n"
446	"MOV R0, #3\n"
447	"BL sub_FF867C94\n"
448	"MOVS R4, R0\n"
449	"BNE loc_FF84EDAC\n"
450	"loc_FF84EDA4:\n" // ; CODE XREF: sub_FF84ED40+28j
451	"MOV R0, #0\n"
452	"LDMFD SP!, {R4-R8,PC}\n"
453
454	"loc_FF84EDAC:\n" // ; CODE XREF: sub_FF84ED40+60j
455	"LDR R12, [R7,#0x4C]\n"
456	"MOV R3, R4\n"
457	"MOV R2, #1\n"
458	"MOV R1, #0\n"
459	"MOV R0, R8\n"
460	//"BLX R12 //\n"
461	"MOV LR, PC\n"
462	"MOV PC, R12\n"
463	"CMP R0, #1\n"
464	"BNE loc_FF84EDD8\n"
465	"MOV R0, #3\n"
466	"BL sub_FF867DD4\n"
467	"B loc_FF84EDA4\n"
468
469	"loc_FF84EDD8:\n" // ; CODE XREF: sub_FF84ED40+88j
470	"MOV R0, R8\n"
471	"BL sub_FF922E24\n"
472
473	"MOV R1, R4\n" // pointer to MBR in R1
474	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
475	// Start of DataGhost's FAT32 autodetection code
476	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
477	// According to the code below, we can use R1, R2, R3 and R12.
478	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
479	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
480	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
481	"MOV LR, R4\n" // Save old offset for MBR signature
482	"MOV R1, #1\n" // Note the current partition number
483	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
484	"dg_sd_fat32:\n"
485	"CMP R1, #4\n" // Did we already see the 4th partition?
486	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
487	"ADD R12, R12, #0x10\n" // Second partition
488	"ADD R1, R1, #1\n" // Second partition for the loop
489	"dg_sd_fat32_enter:\n"
490	"LDRB R2, [R12, #0x1BE]\n" // Partition status
491	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
492	"CMP R3, #0xB\n" // Is this a FAT32 partition?
493	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
494	"BNE dg_sd_fat32\n" // No, it isn't.
495	"CMP R2, #0x00\n" // It is, check the validity of the partition type
496	"CMPNE R2, #0x80\n"
497	"BNE dg_sd_fat32\n" // Invalid, go to next partition
498	// This partition is valid, it's the first one, bingo!
499	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
500
501	"dg_sd_fat32_end:\n"
502	// End of DataGhost's FAT32 autodetection code
503	"LDRB R1, [R4,#0x1C9]\n"
504	"LDRB R3, [R4,#0x1C8]\n"
505	"LDRB R12, [R4,#0x1CC]\n"
506	"MOV R1, R1,LSL#24\n"
507	"ORR R1, R1, R3,LSL#16\n"
508	"LDRB R3, [R4,#0x1C7]\n"
509	"LDRB R2, [R4,#0x1BE]\n"
510	//"LDRB LR, [R4,#0x1FF]\n"
511	"ORR R1, R1, R3,LSL#8\n"
512	"LDRB R3, [R4,#0x1C6]\n"
513	"CMP R2, #0\n"
514	"CMPNE R2, #0x80\n"
515	"ORR R1, R1, R3\n"
516	"LDRB R3, [R4,#0x1CD]\n"
517	"MOV R3, R3,LSL#24\n"
518	"ORR R3, R3, R12,LSL#16\n"
519	"LDRB R12, [R4,#0x1CB]\n"
520	"ORR R3, R3, R12,LSL#8\n"
521	"LDRB R12, [R4,#0x1CA]\n"
522	"ORR R3, R3, R12\n"
523	//"LDRB R12, [R4,#0x1FE]\n"
524	"LDRB R12, [LR,#0x1FE]\n"
525	"LDRB LR, [LR,#0x1FF]\n"
526	"MOV R4, #0\n"
527	"BNE loc_FF84EE60\n"
528	"CMP R0, R1\n"
529	"BCC loc_FF84EE60\n"
530	"ADD R2, R1, R3\n"
531	"CMP R2, R0\n"
532	"CMPLS R12, #0x55\n"
533	"CMPEQ LR, #0xAA\n"
534	"MOVEQ R6, R1\n"
535	"MOVEQ R5, R3\n"
536	"MOVEQ R4, #1\n"
537	"loc_FF84EE60:\n" // ; CODE XREF: sub_FF84ED40+F8j
538	"MOV R0, #3\n"
539	"BL sub_FF867DD4\n"
540	"CMP R4, #0\n"
541	"BNE loc_FF84EE98\n"
542	"MOV R6, #0\n"
543	"MOV R0, R8\n"
544	"BL sub_FF922E24\n"
545	"MOV R5, R0\n"
546	"B loc_FF84EE98\n"
547
548	"loc_FF84EE84:\n" // ; CODE XREF: sub_FF84ED40+28j
549	"MOV R5, #0x40\n"
550	"B loc_FF84EE98\n"
551
552	"loc_FF84EE8C:\n" // ; CODE XREF: sub_FF84ED40+28j
553	"MOV R1, #0x374\n"
554	"LDR R0, =0xFF84ED34\n" // aMounter_c ; "Mounter.c"\n"
555	"BL _DebugAssert\n"
556	"loc_FF84EE98:\n" // ; CODE XREF: sub_FF84ED40+12Cj
557	"STR R6, [R7,#0x44]!\n"
558	"MOV R0, #1\n"
559	"STR R5, [R7,#4]\n"
560	"LDMFD SP!, {R4-R8,PC}\n"
561	);
562	}; //#fe
563	// Extracted method: sub_FF842A44 + 240
564	// Extracted method: sub_FF842C84
565	void __attribute__((naked,noinline)) jogdial_task_my()
566	{
567	asm volatile (
568	"STMFD SP!, {R3-R11,LR}\n"
569	"BL sub_FF842e34\n" // LOCATION: JogDial.c:14
570	"LDR R11, =0x80000B01\n"
571	"LDR R8, =0xffab07cc\n" // HL
572	"LDR R7, =0xC0240000\n" // HL
573	"LDR R6, =0x22A0\n" // HL
574	"MOV R9, #1\n"
575	"MOV R10, #0\n"
576	"loc_FF842CA4:\n"
577	"LDR R3, =0x1A1\n" // HL
578	"LDR R0, [R6,#0xC]\n"
579	"LDR R2, =0xFF842EDC\n" // HL?, "JogDial.c"
580	"MOV R1, #0\n"
581	"BL sub_FF81BBD8\n" // HL
582	//"MOV R0, #40\n"
583	"MOV R0, #40\n" // +
584	"BL _SleepTask\n" // LOCATION: KerSys.c:0
585	//------------------ added code ---------------------
586	"labelA:\n"
587	"LDR R0, =jogdial_stopped\n"
588	"LDR R0, [R0]\n"
589	"CMP R0, #1\n"
590	"BNE labelB\n"
591	"MOV R0, #40\n"
592	"BL _SleepTask\n"
593	"B labelA\n"
594	"labelB:\n"
595	//------------------ original code ------------------
596	"LDR R0, [R7,#0x104]\n"
597	"MOV R0, R0,ASR#16\n"
598	"STRH R0, [R6]\n"
599	"LDRSH R2, [R6,#2]\n"
600	"SUB R1, R0, R2\n"
601	"CMP R1, #0\n"
602	"BEQ loc_FF842D68\n"
603	"MOV R5, R1\n"
604	"RSBLT R5, R5, #0\n"
605	"MOVLE R4, #0\n"
606	"MOVGT R4, #1\n"
607	"CMP R5, #0xFF\n"
608	"BLS loc_FF842D1C\n"
609	"CMP R1, #0\n"
610	"RSBLE R1, R2, #0xFF\n"
611	"ADDLE R1, R1, #0x7F00\n"
612	"ADDLE R0, R1, R0\n"
613	"RSBGT R0, R0, #0xFF\n"
614	"ADDGT R0, R0, #0x7F00\n"
615	"ADDGT R0, R0, R2\n"
616	"ADD R5, R0, #0x8000\n"
617	"ADD R5, R5, #1\n"
618	"EOR R4, R4, #1\n"
619	"loc_FF842D1C:\n"
620	"LDR R0, [R6,#0x14]\n"
621	"CMP R0, #0\n"
622	"BEQ loc_FF842D60\n"
623	"LDR R0, [R6,#0x1C]\n"
624	"CMP R0, #0\n"
625	"BEQ loc_FF842D48\n"
626	"LDR R1, [R8,R4,LSL#2]\n"
627	"CMP R1, R0\n"
628	"BEQ loc_FF842D50\n"
629	"LDR R0, =0xB01\n"
630	"BL sub_FF875370\n"
631	"loc_FF842D48:\n"
632	"MOV R0, R11\n"
633	"BL sub_FF875370\n"
634	"loc_FF842D50:\n"
635	"LDR R0, [R8,R4,LSL#2]\n"
636	"MOV R1, R5\n"
637	"STR R0, [R6,#0x1C]\n"
638	"BL sub_FF8752b8\n"
639	"loc_FF842D60:\n"
640	"LDRH R0, [R6]\n"
641	"STRH R0, [R6,#2]\n"
642	"loc_FF842D68:\n"
643	"STR R10, [R7,#0x100]\n"
644	"STR R9, [R7,#0x108]\n"
645	"LDR R0, [R6,#0x10]\n"
646	"CMP R0, #0\n"
647	"BLNE _SleepTask\n" // LOCATION: KerSys.c:0
648	"B loc_FF842CA4\n"
649	);
650	}

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source: branches/fe50t/platform/ixus90_sd790/sub/100d/boot.c @ 232

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