Index: /trunk/platform/s95/sub/100k/capt_seq.c =================================================================== --- /trunk/platform/s95/sub/100k/capt_seq.c (revision 1215) +++ /trunk/platform/s95/sub/100k/capt_seq.c (revision 1215) @@ -0,0 +1,974 @@ +#include "lolevel.h" +#include "platform.h" +#include "core.h" + +static long *nrflag = (long*)0xe7d8; // S95 100h: FFAF96D8 + +#include "../../../generic/capt_seq.c" + + +/*---------------------------------------------------------------------- + capt_seq_task() 0xFF88322C +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) capt_seq_task() +{ + asm volatile ( +" STMFD SP!, {R3-R7,LR} \n" +" LDR R7, =0x2E6C \n" +" LDR R4, =0x3CFBC \n" +" MOV R6, #0 \n" +"loc_FF88323C:\n" +" LDR R0, [R7, #4] \n" +" MOV R2, #0 \n" +" MOV R1, SP \n" +" BL sub_FF83A2F8 \n" +" TST R0, #1 \n" +" BEQ loc_FF883268 \n" +" LDR R1, =0x43F \n" +" LDR R0, =0xFF882CF4 \n" +" BL sub_FF81EB78 \n" +" BL sub_FF81EB30 \n" +" LDMFD SP!, {R3-R7,PC} \n" +"loc_FF883268:\n" +" LDR R0, [SP] \n" +" LDR R1, [R0] \n" +" CMP R1, #0x23 \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF8834A0 \n" +" B loc_FF88330C \n" +" B loc_FF883324 \n" +" B loc_FF883348 \n" +" B loc_FF88335C \n" +" B loc_FF883354 \n" +" B loc_FF883368 \n" +" B loc_FF883370 \n" +" B loc_FF883378 \n" +" B loc_FF883384 \n" +" B loc_FF8833AC \n" +" B loc_FF883390 \n" +" B loc_FF88339C \n" +" B loc_FF8833A4 \n" +" B loc_FF8833B4 \n" +" B loc_FF8833BC \n" +" B loc_FF8833C4 \n" +" B loc_FF8833CC \n" +" B loc_FF8833D4 \n" +" B loc_FF8833DC \n" +" B loc_FF8833E4 \n" +" B loc_FF8833EC \n" +" B loc_FF8833F4 \n" +" B loc_FF8833FC \n" +" B loc_FF883408 \n" +" B loc_FF883410 \n" +" B loc_FF88341C \n" +" B loc_FF883424 \n" +" B loc_FF88342C \n" +" B loc_FF883434 \n" +" B loc_FF88343C \n" +" B loc_FF883444 \n" +" B loc_FF88344C \n" +" B loc_FF883454 \n" +" B loc_FF88345C \n" +" B loc_FF883468 \n" +" B loc_FF8834AC \n" +"loc_FF88330C:\n" +" BL sub_FF8839D4 \n" +" BL shooting_expo_param_override\n" // added +" BL sub_FF880B34 \n" + +// force call to next function +" MOV R0, #0\n" +" STR R0, [R4,#0x24]\n" // fixes overrides behavior at short shutter press + +" LDR R0, [R4, #0x24] \n" +" CMP R0, #0 \n" +" BLNE sub_FF98AEC0 \n" +" B loc_FF8834AC \n" +"loc_FF883324:\n" +" LDRH R1, [R4] \n" +" LDR R0, [R0, #0xC] \n" +" SUB R12, R1, #0x4200 \n" +" SUBS R12, R12, #0x2E \n" +" BNE loc_FF883340 \n" +" BL sub_FF98BCA8 \n" +" B loc_FF8834AC \n" +"loc_FF883340:\n" + +//" BL sub_FF98ACEC \n" +" BL sub_FF98ACEC_my \n" // patched + +" B loc_FF8834AC \n" +"loc_FF883348:\n" +" MOV R0, #1 \n" +" BL sub_FF883CB8 \n" +" B loc_FF8834AC \n" +"loc_FF883354:\n" +" BL sub_FF88366C \n" +" B loc_FF883360 \n" +"loc_FF88335C:\n" +" BL sub_FF8839B4 \n" +"loc_FF883360:\n" +" STR R6, [R4, #0x24] \n" +" B loc_FF8834AC \n" +"loc_FF883368:\n" +" BL sub_FF8839BC \n" +" B loc_FF8834AC \n" +"loc_FF883370:\n" +" BL sub_FF883BBC \n" +" B loc_FF883388 \n" +"loc_FF883378:\n" +" LDR R0, [R0, #0xC] \n" +" BL sub_FF98AF28 \n" +" B loc_FF8834AC \n" +"loc_FF883384:\n" +" BL sub_FF883C28 \n" +"loc_FF883388:\n" +" BL sub_FF880B34 \n" +" B loc_FF8834AC \n" +"loc_FF883390:\n" +" LDR R0, [R4, #0x54] \n" +" BL sub_FF884614 \n" +" B loc_FF8834AC \n" +"loc_FF88339C:\n" +" BL sub_FF884968 \n" +" B loc_FF8834AC \n" +"loc_FF8833A4:\n" +" BL sub_FF8849CC \n" +" B loc_FF8834AC \n" +"loc_FF8833AC:\n" +" BL sub_FF8839B4 \n" +" B loc_FF8834AC \n" +"loc_FF8833B4:\n" +" BL sub_FF989FFC \n" +" B loc_FF8834AC \n" +"loc_FF8833BC:\n" +" BL sub_FF98A208 \n" +" B loc_FF8834AC \n" +"loc_FF8833C4:\n" +" BL sub_FF98A2A0 \n" +" B loc_FF8834AC \n" +"loc_FF8833CC:\n" +" BL sub_FF98A38C \n" +" B loc_FF8834AC \n" +"loc_FF8833D4:\n" +" BL sub_FF98A484 \n" +" B loc_FF8834AC \n" +"loc_FF8833DC:\n" +" MOV R0, #0 \n" +" B loc_FF883400 \n" +"loc_FF8833E4:\n" +" BL sub_FF98A6C0 \n" +" B loc_FF8834AC \n" +"loc_FF8833EC:\n" +" BL sub_FF98A764 \n" +" B loc_FF8834AC \n" +"loc_FF8833F4:\n" +" BL sub_FF98A844 \n" +" B loc_FF8834AC \n" +"loc_FF8833FC:\n" +" MOV R0, #1 \n" +"loc_FF883400:\n" +" BL sub_FF98A548 \n" +" B loc_FF8834AC \n" +"loc_FF883408:\n" +" BL sub_FF883EC4 \n" +" B loc_FF8834AC \n" +"loc_FF883410:\n" +" BL sub_FF883F6C \n" +" BL sub_FF98C1D0 \n" +" B loc_FF8834AC \n" +"loc_FF88341C:\n" +" BL sub_FF884350 \n" +" B loc_FF8834AC \n" +"loc_FF883424:\n" +" BL sub_FF884490 \n" +" B loc_FF8834AC \n" +"loc_FF88342C:\n" +" BL sub_FF98C2A0 \n" +" B loc_FF8834AC \n" +"loc_FF883434:\n" +" BL sub_FF837C6C \n" +" B loc_FF8834AC \n" +"loc_FF88343C:\n" +" BL sub_FF886FE4 \n" +" B loc_FF8834AC \n" +"loc_FF883444:\n" +" BL sub_FF887070 \n" +" B loc_FF8834AC \n" +"loc_FF88344C:\n" +" BL sub_FF98A97C \n" +" B loc_FF8834AC \n" +"loc_FF883454:\n" +" BL sub_FF98A9E0 \n" +" B loc_FF8834AC \n" +"loc_FF88345C:\n" +" BL sub_FF8870CC \n" +" BL sub_FF88708C \n" +" B loc_FF8834AC \n" +"loc_FF883468:\n" +" MOV R0, #1 \n" +" BL sub_FF98B6D0 \n" +" MOV R0, #1 \n" +" BL sub_FF98B800 \n" +" LDRH R0, [R4, #0x9C] \n" +" CMP R0, #4 \n" +" LDRNEH R0, [R4] \n" +" SUBNE R12, R0, #0x4200 \n" +" SUBNES R12, R12, #0x2A \n" +" BNE loc_FF8834AC \n" +" BL sub_FF887070 \n" +" BL sub_FF887670 \n" +" BL sub_FF8874EC \n" +" B loc_FF8834AC \n" +"loc_FF8834A0:\n" +" LDR R1, =0x591 \n" +" LDR R0, =0xFF882CF4 \n" +" BL sub_FF81EB78 \n" +"loc_FF8834AC:\n" +" LDR R0, [SP] \n" +" LDR R1, [R0, #4] \n" +" LDR R0, [R7] \n" +" BL sub_FF88E1E4 \n" +" LDR R5, [SP] \n" +" LDR R0, [R5, #8] \n" +" CMP R0, #0 \n" +" LDREQ R1, =0x115 \n" +" LDREQ R0, =0xFF882CF4 \n" +" BLEQ sub_FF81EB78 \n" +" STR R6, [R5, #8] \n" +" B loc_FF88323C \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF98ACEC_my() +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) sub_FF98ACEC_my() +{ +asm volatile ( +" STMFD SP!, {R3-R7,LR} \n" +" LDR R5, =0x3CFBC \n" +" MOV R4, R0 \n" +" LDR R0, [R5, #0x24] \n" +" MOV R6, #0 \n" +" CMP R0, #0 \n" +" BNE loc_FF98AD28 \n" +" MOV R0, #0xC \n" +" BL sub_FF889040 \n" +" TST R0, #1 \n" +" MOVNE R2, R4 \n" +" LDMNEFD SP!, {R3-R7,LR} \n" +" MOVNE R1, #1 \n" +" MOVNE R0, #1 \n" +" BNE sub_FF8811F8 \n" +"loc_FF98AD28:\n" +" LDR R0, [R4, #8] \n" +" LDR R7, =0x420C \n" +" ORR R0, R0, #1 \n" +" STR R0, [R4, #8] \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" BEQ loc_FF98ADB8 \n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +" LDR R0, [R4, #0xC] \n" +" CMP R0, #1 \n" +" BLS loc_FF98ADC4 \n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #2 \n" +" BNE loc_FF98ADD0 \n" +" BL sub_FF88402C \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" BEQ loc_FF98ADB8 \n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +" LDR R0, [R4, #0xC] \n" +" CMP R0, #1 \n" +" BLS loc_FF98ADC4 \n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #2 \n" +" BEQ loc_FF98ADFC \n" +" B loc_FF98ADD0 \n" +"loc_FF98ADB8:\n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +"loc_FF98ADC4:\n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +"loc_FF98ADD0:\n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #1 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" LDRNE R0, [R4, #0xC] \n" +" CMPNE R0, #1 \n" +" BLS loc_FF98AE00 \n" +" LDR R0, [R4, #0x10] \n" +" CMP R0, #1 \n" +" BNE loc_FF98AE00 \n" +"loc_FF98ADFC:\n" +" BL sub_FF98C2D8 \n" +"loc_FF98AE00:\n" +" BL sub_FF98C2A0 \n" +" BL sub_FF8839C4 \n" +" LDR R0, [R5, #0x24] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE98 \n" +" MOV R0, R4 \n" +" BL sub_FFAF90A4 \n" +" TST R0, #1 \n" +" BNE loc_FF98AEBC \n" +" MOV R0, R4 \n" +" BL sub_FFAF94C4 \n" +" BL sub_FF98B498 \n" +" MOV R6, #1 \n" +" MOV R0, #2 \n" +" BL sub_FF87EFF8 \n" + +" BL wait_until_remote_button_is_released \n" // added +" BL capt_seq_hook_set_nr \n" // added + +" LDRH R0, [R5] \n" +" SUB R12, R0, #0x8200 \n" +" SUBS R12, R12, #0x2D \n" +" BNE loc_FF98AE88 \n" +" MOV R2, #2 \n" +" ADD R0, R2, #0x15C \n" +" MOV R1, SP \n" +" STR R6, [SP] \n" +" BL sub_FF896414 \n" +" TST R0, #1 \n" +" MOVNE R1, #0xC3 \n" +" LDRNE R0, =0xFF98AF9C \n" +" BLNE sub_FF81EB78 \n" +" LDRH R0, [SP] \n" +" CMP R0, #1 \n" +" STRHI R6, [R4, #0xE4] \n" +" BHI loc_FF98AEA8 \n" +" MOV R0, #0 \n" +" STR R0, [R4, #0xE4] \n" +"loc_FF98AE88:\n" +" MOV R0, R4 \n" + + // ** the following function captures the image ** +" BL sub_FFAF99B8 \n" + +" BL capt_seq_hook_raw_here \n" // added + +" MOV R6, R0 \n" +" B loc_FF98AEAC \n" +"loc_FF98AE98:\n" +" LDR R0, =0x7514 \n" +" LDR R0, [R0] \n" +" CMP R0, #0 \n" +" BEQ loc_FF98AEAC \n" +"loc_FF98AEA8:\n" +" MOV R6, #0x1D \n" +"loc_FF98AEAC:\n" +" MOV R1, R6 \n" +" MOV R0, R4 \n" +" LDMFD SP!, {R3-R7,LR} \n" +" B sub_FFAF91B0 \n" +"loc_FF98AEBC:\n" +" LDMFD SP!, {R3-R7,PC} \n" + ); +} + +/*---------------------------------------------------------------------- + exp_drv_task() 0xFF8CF1A8 +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) exp_drv_task() +{ + asm volatile( +" STMFD SP!, {R4-R8,LR} \n" +" SUB SP, SP, #0x20 \n" +" LDR R8, =0xBB8 \n" +" LDR R7, =0x4888 \n" +" LDR R5, =0x59818 \n" +" MOV R0, #0 \n" +" ADD R6, SP, #0x10 \n" +" STR R0, [SP, #0xC] \n" +"loc_FF8CF1C8:\n" +" LDR R0, [R7, #0x20] \n" +" MOV R2, #0 \n" +" ADD R1, SP, #0x1C \n" +" BL sub_FF83A2F8 \n" +" LDR R0, [SP, #0xC] \n" +" CMP R0, #1 \n" +" BNE loc_FF8CF214 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R0, [R0] \n" +" CMP R0, #0x14 \n" +" CMPNE R0, #0x15 \n" +" CMPNE R0, #0x16 \n" +" CMPNE R0, #0x17 \n" +" BEQ loc_FF8CF378 \n" +" CMP R0, #0x29 \n" +" BEQ loc_FF8CF300 \n" +" ADD R1, SP, #0xC \n" +" MOV R0, #0 \n" +" BL sub_FF8CF158 \n" +"loc_FF8CF214:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0] \n" +" CMP R1, #0x2F \n" +" BNE loc_FF8CF244 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D053C \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #1 \n" +" BL sub_FF88E1E4 \n" +" BL sub_FF81EB30 \n" +" ADD SP, SP, #0x20 \n" +" LDMFD SP!, {R4-R8,PC} \n" +"loc_FF8CF244:\n" +" CMP R1, #0x2E \n" +" BNE loc_FF8CF260 \n" +" LDR R2, [R0, #0x8C]! \n" +" LDR R1, [R0, #4] \n" +" MOV R0, R1 \n" +" BLX R2 \n" +" B loc_FF8CF824 \n" +"loc_FF8CF260:\n" +" CMP R1, #0x27 \n" +" BNE loc_FF8CF2B0 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x80 \n" +" BL sub_FF88E218 \n" +" LDR R0, =0xFF8CAFB4 \n" +" MOV R1, #0x80 \n" +" BL sub_FF97D684 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #0x80 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x1096 \n" +" BNE loc_FF8CF36C \n" +"loc_FF8CF29C:\n" +" LDR R1, [SP, #0x1C] \n" +" LDR R0, [R1, #0x90] \n" +" LDR R1, [R1, #0x8C] \n" +" BLX R1 \n" +" B loc_FF8CF824 \n" +"loc_FF8CF2B0:\n" +" CMP R1, #0x28 \n" +" BNE loc_FF8CF2F8 \n" +" ADD R1, SP, #0xC \n" +" BL sub_FF8CF158 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x100 \n" +" BL sub_FF88E218 \n" +" LDR R0, =0xFF8CAFC4 \n" +" MOV R1, #0x100 \n" +" BL sub_FF97E014 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #0x100 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" BEQ loc_FF8CF29C \n" +" LDR R1, =0x10A0 \n" +" B loc_FF8CF36C \n" +"loc_FF8CF2F8:\n" +" CMP R1, #0x29 \n" +" BNE loc_FF8CF310 \n" +"loc_FF8CF300:\n" +" LDR R0, [SP, #0x1C] \n" +" ADD R1, SP, #0xC \n" +" BL sub_FF8CF158 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF310:\n" +" CMP R1, #0x2C \n" +" BNE loc_FF8CF328 \n" +" BL sub_FF8BD5E0 \n" +" BL sub_FF8BE1EC \n" +" BL sub_FF8BDD58 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF328:\n" +" CMP R1, #0x2D \n" +" BNE loc_FF8CF378 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #4 \n" +" BL sub_FF88E218 \n" +" LDR R1, =0xFF8CAFE4 \n" +" LDR R0, =0xFFFFF400 \n" +" MOV R2, #4 \n" +" BL sub_FF8BD05C \n" +" BL sub_FF8BD2E4 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #4 \n" +" BL sub_FF88E040 \n" +" TST R0, #1 \n" +" BEQ loc_FF8CF29C \n" +" LDR R1, =0x10C8 \n" +"loc_FF8CF36C:\n" +" LDR R0, =0xFF8CB66C \n" +" BL sub_FF81EB78 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF378:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R4, #1 \n" +" LDR R1, [R0] \n" +" CMP R1, #0x12 \n" +" CMPNE R1, #0x13 \n" +" BNE loc_FF8CF3E8 \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R1, R0, R1, LSL #2 \n" +" SUB R1, R1, #8 \n" +" LDMIA R1, {R2-R4} \n" +" STMIA R6, {R2-R4} \n" +" BL sub_FF8CD8C0 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D0950 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x94] \n" +" LDR R2, [R0, #0x98] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF3E8:\n" +" CMP R1, #0x14 \n" +" CMPNE R1, #0x15 \n" +" CMPNE R1, #0x16 \n" +" CMPNE R1, #0x17 \n" +" BNE loc_FF8CF4A0 \n" +" ADD R3, SP, #0xC \n" +" MOV R2, SP \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FF8CDB2C \n" +" CMP R0, #1 \n" +" MOV R4, R0 \n" +" CMPNE R4, #5 \n" +" BNE loc_FF8CF43C \n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, R4 \n" +" LDR R1, [R0, #0x7C]! \n" +" LDR R12, [R0, #0x10]! \n" +" LDR R3, [R0, #4] \n" +" MOV R0, SP \n" +" BLX R12 \n" +" B loc_FF8CF474 \n" +"loc_FF8CF43C:\n" +" LDR R0, [SP, #0x1C] \n" +" CMP R4, #2 \n" +" LDR R3, [R0, #0x90] \n" +" CMPNE R4, #6 \n" +" BNE loc_FF8CF488 \n" +" LDR R12, [R0, #0x8C] \n" +" MOV R0, SP \n" +" MOV R2, R4 \n" +" MOV R1, #1 \n" +" BLX R12 \n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, SP \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FF8CEEA4 \n" +"loc_FF8CF474:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R2, [SP, #0xC] \n" +" MOV R1, R4 \n" +" BL sub_FF8CF0F8 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF488:\n" +" LDR R1, [R0, #0x7C] \n" +" LDR R12, [R0, #0x8C] \n" +" ADD R0, R0, #4 \n" +" MOV R2, R4 \n" +" BLX R12 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF4A0:\n" +" CMP R1, #0x23 \n" +" CMPNE R1, #0x24 \n" +" BNE loc_FF8CF540 \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R1, R0, R1, LSL #2 \n" +" SUB R1, R1, #8 \n" +" LDMIA R1, {R2-R4} \n" +" STMIA R6, {R2-R4} \n" +" BL sub_FF8CC948 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8CCD94 \n" +" B loc_FF8CF760 \n" + +"loc_FF8CF540:\n" +" ADD R1, R0, #4 \n" +" LDMIA R1, {R2,R3,R12} \n" +" STMIA R6, {R2,R3,R12} \n" +" LDR R1, [R0] \n" +" CMP R1, #0x26 \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF600 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF600 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF620 \n" +" B loc_FF8CF620 \n" +" B loc_FF8CF72C \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF73C \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF610 \n" +" B loc_FF8CF618 \n" +" B loc_FF8CF618 \n" +" B loc_FF8CF62C \n" +" B loc_FF8CF62C \n" +" B loc_FF8CF634 \n" +" B loc_FF8CF66C \n" +" B loc_FF8CF6A4 \n" +" B loc_FF8CF6DC \n" +" B loc_FF8CF714 \n" +" B loc_FF8CF714 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF71C \n" +" B loc_FF8CF724 \n" +"loc_FF8CF5F8:\n" +" BL sub_FF8CB4F4 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF600:\n" +" BL sub_FF8CB790 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF608:\n" +" BL sub_FF8CB9B8 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF610:\n" +" BL sub_FF8CBC90 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF618:\n" +" BL sub_FF8CBEA8 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF620:\n" +//" BL sub_FF8CC1CC \n" +" BL sub_FF8CC1CC_my \n" // patched +" MOV R4, #0 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF62C:\n" +" BL sub_FF8CC314 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF634:\n" +" LDRH R1, [R0, #4] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R0, #0xC] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0648 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF66C:\n" +" LDRH R1, [R0, #4] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R5, #8] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0750 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF6A4:\n" +" LDRH R1, [R5] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R0, #6] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R5, #8] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0804 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF6DC:\n" +" LDRH R1, [R5] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R0, #0xC] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D08AC \n" +" B loc_FF8CF740 \n" +"loc_FF8CF714:\n" +" BL sub_FF8CC720 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF71C:\n" +" BL sub_FF8CCE98 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF724:\n" +" BL sub_FF8CD134 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF72C:\n" +" BL sub_FF8CD314 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF734:\n" +" BL sub_FF8CD548 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF73C:\n" +" BL sub_FF8CD6B8 \n" +"loc_FF8CF740:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" CMP R4, #1 \n" +" BNE loc_FF8CF7A8 \n" +"loc_FF8CF760:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, #0xC \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R0, R0, R1, LSL #2 \n" +" SUB R4, R0, #8 \n" +" LDR R0, =0x59818 \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FFB9F0EC \n" +" LDR R0, =0x59824 \n" +" MOV R2, #0xC \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FFB9F0EC \n" +" LDR R0, =0x59830 \n" +" MOV R2, #0xC \n" +" MOV R1, R4 \n" +" BL sub_FFB9F0EC \n" +" B loc_FF8CF824 \n" +"loc_FF8CF7A8:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R3, #1 \n" +" LDR R0, [R0] \n" +" CMP R0, #0xB \n" +" BNE loc_FF8CF7F0 \n" +" MOV R2, #0 \n" +" STRD R2, [SP] \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #0 \n" +" BL sub_FF8CB2D4 \n" +" MOV R3, #1 \n" +" MOV R2, #0 \n" +" STRD R2, [SP] \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #0 \n" +" B loc_FF8CF820 \n" +"loc_FF8CF7F0:\n" +" MOV R2, #1 \n" +" STRD R2, [SP] \n" +" MOV R3, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #1 \n" +" BL sub_FF8CB2D4 \n" +" MOV R3, #1 \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #1 \n" +" STR R3, [SP] \n" +" STR R3, [SP, #4] \n" +"loc_FF8CF820:\n" +" BL sub_FF8CB43C \n" +"loc_FF8CF824:\n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D053C \n" +" B loc_FF8CF1C8 \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF8CC1CC_my() +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) sub_FF8CC1CC_my() +{ + asm volatile ( +" STMFD SP!, {R4-R8,LR} \n" +" LDR R7, =0x4888 \n" +" MOV R4, R0 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x3E \n" +" BL sub_FF88E218 \n" +" LDRSH R0, [R4, #4] \n" +" MOV R2, #0 \n" +" MOV R1, #0 \n" +" BL sub_FF8CB038 \n" +" MOV R5, R0 \n" +" LDRSH R0, [R4, #6] \n" +" BL sub_FF8CB148 \n" +" LDRSH R0, [R4, #8] \n" +" BL sub_FF8CB1A0 \n" +" LDRSH R0, [R4, #0xA] \n" +" BL sub_FF8CB1F8 \n" +" LDRSH R0, [R4, #0xC] \n" +" MOV R1, #0 \n" +" BL sub_FF8CB250 \n" +" MOV R6, R0 \n" +" LDRSH R0, [R4, #0xE] \n" +" BL sub_FF8D05E8 \n" +" LDR R0, [R4] \n" +" LDR R8, =0x59830 \n" +" CMP R0, #0xB \n" +" MOVEQ R5, #0 \n" +" MOVEQ R6, #0 \n" +" BEQ loc_FF8CC268 \n" +" CMP R5, #1 \n" +" BNE loc_FF8CC268 \n" +" LDRSH R0, [R4, #4] \n" +" LDR R1, =0xFF8CAFA4 \n" +" MOV R2, #2 \n" +" BL sub_FF97D9D0 \n" +" STRH R0, [R4, #4] \n" +" MOV R0, #0 \n" +" STR R0, [R7, #0x28] \n" +" B loc_FF8CC270 \n" +"loc_FF8CC268:\n" +" LDRH R0, [R8] \n" +" STRH R0, [R4, #4] \n" +"loc_FF8CC270:\n" +" CMP R6, #1 \n" +" LDRNEH R0, [R8, #8] \n" +" BNE loc_FF8CC28C \n" +" LDRSH R0, [R4, #0xC] \n" +" LDR R1, =0xFF8CB028 \n" +" MOV R2, #0x20 \n" +" BL sub_FF8D0604 \n" +"loc_FF8CC28C:\n" +" STRH R0, [R4, #0xC] \n" +" LDRSH R0, [R4, #6] \n" +//" BL sub_FF8BD350 \n" +" BL sub_FF8BD350_my \n" // patched +" LDRSH R0, [R4, #8] \n" +" MOV R1, #1 \n" +" BL sub_FF8BDAA0 \n" +" MOV R1, #0 \n" +" ADD R0, R4, #8 \n" +" BL sub_FF8BDB28 \n" +" LDRSH R0, [R4, #0xE] \n" +" BL sub_FF8C5F98 \n" +" LDR R4, =0xBB8 \n" +" CMP R5, #1 \n" +" BNE loc_FF8CC2E4 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R4 \n" +" MOV R1, #2 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x61E \n" +" LDRNE R0, =0xFF8CB66C \n" +" BLNE sub_FF81EB78 \n" +"loc_FF8CC2E4:\n" +" CMP R6, #1 \n" +" LDMNEFD SP!, {R4-R8,PC} \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R4 \n" +" MOV R1, #0x20 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x623 \n" +" LDRNE R0, =0xFF8CB66C \n" +" LDMNEFD SP!, {R4-R8,LR} \n" +" BNE sub_FF81EB78 \n" +" LDMFD SP!, {R4-R8,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF8BD350_my() +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) sub_FF8BD350_my() { + asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" LDR R5, =0x456C \n" +" MOV R4, R0 \n" +" LDR R0, [R5, #4] \n" +" CMP R0, #1 \n" +" LDRNE R1, =0x146 \n" +" LDRNE R0, =0xFF8BD154 \n" +" BLNE sub_FF81EB78 \n" +" CMN R4, #0xC00 \n" +" LDREQSH R4, [R5, #2] \n" +" CMN R4, #0xC00 \n" +" MOVEQ R1, #0x14C \n" +" LDREQ R0, =0xFF8BD154 \n" +" STRH R4, [R5, #2] \n" +" BLEQ sub_FF81EB78 \n" +" MOV R0, R4 \n" + +//" BL sub_FFA50D94 \n" +" BL apex2us \n" // patched + +" MOV R4, R0 \n" +" BL sub_FF90988C \n" +" MOV R0, R4 \n" +" BL sub_FF9162BC \n" +" TST R0, #1 \n" +" LDRNE R1, =0x151 \n" +" LDMNEFD SP!, {R4-R6,LR} \n" +" LDRNE R0, =0xFF8BD154 \n" +" BNE sub_FF81EB78 \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} + Index: /trunk/platform/s95/sub/100k/stubs_entry.S =================================================================== --- /trunk/platform/s95/sub/100k/stubs_entry.S (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_entry.S (revision 1215) @@ -0,0 +1,179 @@ +// !!! THIS FILE IS GENERATED. DO NOT EDIT. !!! +#include "stubs_asm.h" + +NSTUB(AllocateMemory, 0xffafaeb4) +NSTUB(AllocateUncacheableMemory, 0xff83adc8) +// Best match: 96% +NSTUB(Close, 0xff837030) +NSTUB(CreateTask, 0xff81e8a0) +NSTUB(DeleteFile_Fut, 0xff8369a8) +// ERROR: EnterToCompensationEVF is not found! +NSTUB(ExecuteEventProcedure, 0xff89270c) +// ERROR: ExitFromCompensationEVF is not found! +// Best match: 57% +NSTUB(ExitTask, 0xff81eb30) +NSTUB(Fclose_Fut, 0xff836b24) +NSTUB(Feof_Fut, 0xff836d10) +NSTUB(Fflush_Fut, 0xff836d4c) +NSTUB(Fgets_Fut, 0xff836c78) +NSTUB(Fopen_Fut, 0xff836ae4) +NSTUB(Fread_Fut, 0xff836bd0) +NSTUB(FreeMemory, 0xffafaeac) +// Best match: 91% +NSTUB(FreeUncacheableMemory, 0xff83ae08) +NSTUB(Fseek_Fut, 0xff836cc4) +NSTUB(Fwrite_Fut, 0xff836c24) +// Best match: 52% +NSTUB(GetBatteryTemperature, 0xff869038) +// Best match: 52% +NSTUB(GetCCDTemperature, 0xff868fc4) +// Best match: 85% +NSTUB(GetCurrentAvValue, 0xff97e4b4) +// Best match: 66% +NSTUB(GetDrive_ClusterSize, 0xff8769c8) +// ERROR: GetDrive_FreeClusters is not found! +// Best match: 60% +NSTUB(GetDrive_TotalClusters, 0xff8769fc) +// Best match: 64% +NSTUB(GetFocusLensSubjectDistance, 0xff97cb44) +// Best match: 83% +NSTUB(GetFocusLensSubjectDistanceFromLens, 0xff97cf90) +NSTUB(GetMemInfo, 0xff81a264) +// Best match: 88% +NSTUB(GetOpticalTemperature, 0xff8690ac) +// ERROR: GetParameterData is not found! +// Best match: 72% +NSTUB(GetPropertyCase, 0xff896414) +// Best match: 96% +NSTUB(GetSystemTime, 0xffafaf0c) +// Best match: 74% +NSTUB(GetZoomLensCurrentPoint, 0xff980d38) +// Best match: 59% +NSTUB(GetZoomLensCurrentPosition, 0xff9817d4) +// Best match: 64% +NSTUB(IsStrobeChargeCompleted, 0xff8eae58) +NSTUB(LocalTime, 0xff88fff4) +// Best match: 82% +NSTUB(LockMainPower, 0xff89d078) +// ERROR: Lseek is not found! +// Best match: 92% +NSTUB(MakeDirectory_Fut, 0xff836a1c) +// Best match: 57% +NSTUB(MoveFocusLensToDistance, 0xffb5e5c4) +// Best match: 58% +NSTUB(MoveZoomLensWithPoint, 0xffaf7b2c) +// Best match: 62% +NSTUB(NewTaskShell, 0xff895e30) +// Best match: 69% +NSTUB(Open, 0xff873c7c) +// Best match: 85% +NSTUB(PB2Rec, 0xff8a0008) +// ERROR: PT_PlaySound is not found! +// Best match: 86% +NSTUB(PostLogicalEventForNotPowerType, 0xff89aa88) +// Best match: 92% +NSTUB(PostLogicalEventToUI, 0xff89aad4) +NSTUB(Read, 0xff81ad74) +// ERROR: ReadFastDir is not found! +// Best match: 86% +NSTUB(Rec2PB, 0xff8a0048) +// ERROR: RefreshPhysicalScreen is not found! +// ERROR: Remove is not found! +// Best match: 53% +NSTUB(RenameFile_Fut, 0xff836ae0) +// ALT: NSTUB(RenameFile_Fut, 0xffabecd4) // 8/7 +// ALT: NSTUB(RenameFile_Fut, 0xffabed24) // 8/7 +// Best match: 92% +NSTUB(Restart, 0xff83c5bc) +// Best match: 80% +NSTUB(SetAutoShutdownTime, 0xff89d0ec) +// Best match: 81% +NSTUB(SetCurrentCaptureModeType, 0xff8a5444) +// Best match: 55% +NSTUB(SetFileTimeStamp, 0xff96cc90) +// Best match: 64% +NSTUB(SetLogicalEventActive, 0xff89cdb4) +// ERROR: SetParameterData is not found! +// Best match: 68% +NSTUB(SetPropertyCase, 0xff8962ec) +// Best match: 92% +NSTUB(SleepTask, 0xff83aa4c) +// Best match: 60% +NSTUB(TakeSemaphore, 0xff83a714) +// ERROR: TurnOffBackLight is not found! +// ERROR: TurnOnBackLight is not found! +// ERROR: UIFS_WriteFirmInfoToFile is not found! +// Best match: 83% +NSTUB(UnlockMainPower, 0xff89cfcc) +// Best match: 96% +NSTUB(UpdateMBROnFlash, 0xff876848) +// Best match: 85% +NSTUB(VbattGet, 0xff833188) +NSTUB(Write, 0xff8370c0) +NSTUB(_log, 0xffba0c74) +NSTUB(_log10, 0xffb9f900) +NSTUB(_pow, 0xffb9fa70) +NSTUB(_sqrt, 0xffba287c) +NSTUB(add_ptp_handler, 0xffa8e800) +NSTUB(close, 0xff81ab8c) +// Best match: 71% +NSTUB(closedir, 0xffad4180) +// Best match: 71% +NSTUB(closefastdir, 0xffad4180) +// ERROR: free is not found! +// Best match: 60% +NSTUB(kbd_p1_f, 0xff834a04) +// Best match: 58% +NSTUB(kbd_p1_f_cont, 0xff834a10) +// Best match: 86% +NSTUB(kbd_p2_f, 0xff83424c) +// ERROR: kbd_pwr_off is not found! +// ERROR: kbd_pwr_on is not found! +// ERROR: kbd_read_keys is not found! +// Best match: 81% +NSTUB(kbd_read_keys_r2, 0xff864ee8) +// Best match: 68% +NSTUB(lseek, 0xff837158) +NSTUB(malloc, 0xff8141e8) +NSTUB(memcmp, 0xff8206e0) +NSTUB(memcpy, 0xff840588) +NSTUB(memset, 0xffa4fd7c) +// Best match: 74% +NSTUB(mkdir, 0xff8374cc) +NSTUB(mktime_ext, 0xff8b8c58) +NSTUB(open, 0xff81aadc) +// Best match: 81% +NSTUB(opendir, 0xffad3fe8) +// ERROR: openfastdir is not found! +// ERROR: qsort is not found! +// ERROR: rand is not found! +NSTUB(read, 0xff81ad74) +// ERROR: readfastdir is not found! +// Best match: 62% +NSTUB(reboot_fw_update, 0xffad955c) +// ERROR: rename is not found! +// Best match: 93% +NSTUB(set_control_event, 0xff89c9a4) +// ERROR: srand is not found! +NSTUB(stat, 0xff837194) +// Best match: 61% +NSTUB(strcat, 0xff81402c) +// Best match: 56% +NSTUB(strchr, 0xff8140b4) +NSTUB(strcmp, 0xff82069c) +NSTUB(strcpy, 0xff820684) +NSTUB(strftime, 0xff8b8660) +// Best match: 79% +NSTUB(strlen, 0xff8206bc) +NSTUB(strncmp, 0xff814068) +// Best match: 73% +NSTUB(strncpy, 0xff81402c) +// Best match: 71% +NSTUB(strrchr, 0xff840560) +// ALT: NSTUB(strrchr, 0xff8b8428) // 18/8 +// ERROR: strtol is not found! +NSTUB(strtolx, 0xff84066c) +// Best match: 83% +NSTUB(time, 0xff8905d4) +NSTUB(vsprintf, 0xff820648) +NSTUB(write, 0xff81add4) Index: /trunk/platform/s95/sub/100k/stubs_entry_2.S =================================================================== --- /trunk/platform/s95/sub/100k/stubs_entry_2.S (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_entry_2.S (revision 1215) @@ -0,0 +1,104 @@ +// Note : This file generated by CHDK-PT. +#include "stubs_asm.h" +#define NULL_STUB 0xFF8391E0 + +NHSTUB(EnterToCompensationEVF, 0xff838b40) +NHSTUB(ExitFromCompensationEVF, 0xff838be4) +NHSTUB(GetDrive_FreeClusters, 0xff876a28) +NHSTUB(GetParameterData, 0xff9bbea4) +NHSTUB(Lseek, 0xff83714c) +NHSTUB(PT_PlaySound, 0xff88b0a8) +NHSTUB(ReadFastDir, 0xffad413c) +NHSTUB(RefreshPhysicalScreen, 0xff8b81c4) +NHSTUB(Remove, 0xff837064) +NHSTUB(SetParameterData, 0xff9bbd7c) +NHSTUB(TurnOffBackLight, 0xff8af278) +NHSTUB(TurnOnBackLight, 0xff8af260) +NHSTUB(UIFS_WriteFirmInfoToFile, 0xff9a7d6c) +NHSTUB(free, 0xff814244) +NHSTUB(kbd_read_keys, 0xff83498c) +NHSTUB(openfastdir, 0xffad3fe8) +NHSTUB(qsort, 0xffb4c060) +NHSTUB(readfastdir, 0xffad413c) +NHSTUB(rename, 0xff83710c) +NHSTUB(strtol, 0xff840868) +NHSTUB(Restart, 0xff83c5b8) +NHSTUB(Close, 0xff837030) +NHSTUB(ExitTask, 0xff81eb30) +NHSTUB(FreeUncacheableMemory, 0xff83ae08) +NHSTUB(GetBatteryTemperature, 0xff869038) +NHSTUB(GetCCDTemperature, 0xff868fc4) +NHSTUB(GetCurrentAvValue, 0xff97e4b4) +NHSTUB(GetDrive_ClusterSize, 0xff8769c8) +NHSTUB(GetDrive_TotalClusters, 0xff8769fc) +NHSTUB(GetFocusLensSubjectDistance, 0xff97cb44) +NHSTUB(GetFocusLensSubjectDistanceFromLens, 0xff97cf90) +NHSTUB(GetOpticalTemperature, 0xff8690ac) +NHSTUB(GetPropertyCase, 0xff896414) +NHSTUB(GetSystemTime, 0xffafaf0c) +NHSTUB(GetZoomLensCurrentPoint, 0xff980d38) +NHSTUB(GetZoomLensCurrentPosition, 0xffae90f4) +NHSTUB(IsStrobeChargeCompleted, 0xff8eae58) +NHSTUB(LockMainPower, 0xff89d078) +NHSTUB(MakeDirectory_Fut, 0xff836a1c) +NHSTUB(MoveFocusLensToDistance, 0xffb5e5c4) +NHSTUB(MoveZoomLensWithPoint, 0xffaf7b2c) +NHSTUB(NewTaskShell, 0xff895e30) +NHSTUB(Open, 0xff836fc4) +NHSTUB(PostLogicalEventForNotPowerType, 0xff89aa88) +NHSTUB(PostLogicalEventToUI, 0xff89aad4) +NHSTUB(RenameFile_Fut, 0xff836914) +NHSTUB(SetAutoShutdownTime, 0xff89d0ec) +NHSTUB(SetCurrentCaptureModeType, 0xff8a5444) +NHSTUB(SetFileTimeStamp, 0xff8372cc) +NHSTUB(SetLogicalEventActive, 0xff89cdb4) +NHSTUB(SetPropertyCase, 0xff8962ec) +NHSTUB(SleepTask, 0xff83aa4c) +NHSTUB(TakeSemaphore, 0xff83a714) +NHSTUB(UnlockMainPower, 0xff89cfcc) +NHSTUB(VbattGet, 0xff833188) +NHSTUB(closedir, 0xffad3f98) +NHSTUB(closefastdir, 0xffad3f98) +NHSTUB(kbd_p1_f, 0xff834a04) +NHSTUB(kbd_p1_f_cont, 0xff834a10) +NHSTUB(kbd_p2_f, 0xff83424c) +NHSTUB(kbd_read_keys_r2, 0xff864ee8) +NHSTUB(lseek, 0xff83714c) +NHSTUB(mkdir, 0xff8374cc) +NHSTUB(opendir, 0xffad3fe8) +NHSTUB(strcat, 0xff8b8414) +NHSTUB(strchr, 0xff8140b4) +NHSTUB(strncpy, 0xff81402c) +NHSTUB(strlen, 0xff814100) +NHSTUB(time, 0xff8905d4) +NHSTUB(LEDDrive, 0xff987124) +NHSTUB(SetScriptMode, 0xff89ce04) +NHSTUB(ScreenLock, 0xff8b7e50) +NHSTUB(ScreenUnlock, 0xff8b7eb4) +NHSTUB(apex2us, 0xffa50d94) +NHSTUB(MakeAFScan, 0xff9896c0) +NHSTUB(WriteSDCard, 0xff96dd64) +NHSTUB(UnlockAF, 0xff8388d8) +NHSTUB(DoAFLock, 0xff8388a0) +NHSTUB(UnsetZoomForMovie, 0xff8ab114) +NHSTUB(GetKbdState, 0xff8655f0) +NHSTUB(ExpCtrlTool_StartContiAE, 0xff84734c) +// added for PTP support +NHSTUB(add_ptp_handler, 0xffa8e800) +NHSTUB(set_control_event, 0xff89c9a4) +NHSTUB(PB2Rec, 0xff8a0008) +NHSTUB(Rec2PB, 0xff8a0048) +NHSTUB(reboot_fw_update, 0xffad955c) + +// still need NSTUBs to keep finsig happy - reyalp +NSTUB(srand, NULL_STUB) +NSTUB(rand, NULL_STUB) + +// could not find on s90 or s95 - ignore +NHSTUB(kbd_pwr_on, NULL_STUB) +NHSTUB(kbd_pwr_off, NULL_STUB) +NHSTUB(rewinddir, NULL_STUB) +NHSTUB(SetZoomActuatorSpeedPercent, NULL_STUB) +NHSTUB(Unmount_FileSystem, NULL_STUB) +NHSTUB(Mount_FileSystem, NULL_STUB) + Index: /trunk/platform/s95/sub/100k/boot.c =================================================================== --- /trunk/platform/s95/sub/100k/boot.c (revision 1215) +++ /trunk/platform/s95/sub/100k/boot.c (revision 1215) @@ -0,0 +1,2825 @@ +#include "lolevel.h" +#include "platform.h" +#include "core.h" +#include "stdlib.h" + +const char * const new_sa = &_end; + + +// Forward declarations +void CreateTask_PhySw(); +void CreateTask_spytask(); +extern volatile int jogdial_stopped; +void JogDial_task_my(void); + + +/*--------------------------------------------------------------------- + Memory Map: + 00001900 MEMBASEADDR start of data - used for initialized vars + 00010FE3 end of inited data + 00010FE4 start of bss - used for zeroed/uninited vars + 00016E2F end of bss + 0016EE30 MEMISOSTART start of CHDK code / data / bss + 001B0000 end of CHDK data (approx) + 001B0001 start of DRYOS heap (approx) + 0037FFFF end of heap (?) + + 41269150 raw buffer 0 + 46000000 raw buffer 1 + + C0xxxxxx I/O + + FF810000 ROMBASEADDR start of rom + FFFFFFFF end of rom +----------------------------------------------------------------------*/ + + +/*---------------------------------------------------------------------- + taskCreateHook() +-----------------------------------------------------------------------*/ +void taskCreateHook(int *p) +{ + p-=17; + + if (p[0] == 0xFF88322C) + p[0] = (int) capt_seq_task; + + if (p[0] == 0xFF98642C) + + + + + + + + + + + + + + p[0] = (int) movie_record_task; + + if (p[0] == 0xFF8A0AA0) + p[0] = (int) init_file_modules_task; + + if (p[0] == 0xFF8CF1A8) + + + + + + p[0] = (int) exp_drv_task; + + if (p[0] == 0xFF865894) + p[0] = (int) JogDial_task_my; +} + + + + +/*---------------------------------------------------------------------- + boot() + + Main entry point for the CHDK code +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) boot() +{ + asm volatile ( + +/* // LED Test + "LDR R1, =0xC0220134\n" // Orange LED + "MOV R0, #0x46\n" + "STR R0, [R1]\n" + "LDR R1, =0xC0223030\n" // AF LED + "MOV R0, #0x46\n" + "STR R0, [R1]\n" + "LDR R0, =0x100000 \n" +"loop1: \n" + "nop\n" + "SUBS R0,R0,#1 \n" + "BNE loop1 \n" + // End LED Test +*/ +" LDR R1, =0xC0410000 \n" +" MOV R0, #0 \n" +" STR R0, [R1] \n" +" MOV R1, #0x78 \n" +" MCR p15, 0, R1, c1, c0 \n" +" MOV R1, #0 \n" +" MCR p15, 0, R1, c7, c10, 4 \n" +" MCR p15, 0, R1, c7, c5 \n" +" MCR p15, 0, R1, c7, c6 \n" +" MOV R0, #0x3D \n" +" MCR p15, 0, R0, c6, c0 \n" +" MOV R0, #0xC000002F \n" +" MCR p15, 0, R0, c6, c1 \n" +" MOV R0, #0x35 \n" +" MCR p15, 0, R0, c6, c2 \n" +" MOV R0, #0x40000035 \n" +" MCR p15, 0, R0, c6, c3 \n" +" MOV R0, #0x80000017 \n" +" MCR p15, 0, R0, c6, c4 \n" +" LDR R0, =0xFF80002D \n" +" MCR p15, 0, R0, c6, c5 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c2, c0 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c2, c0, 1 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c3, c0 \n" +" LDR R0, =0x3333330 \n" +" MCR p15, 0, R0, c5, c0, 2 \n" +" LDR R0, =0x3333330 \n" +" MCR p15, 0, R0, c5, c0, 3 \n" +" MRC p15, 0, R0, c1, c0 \n" +" ORR R0, R0, #0x1000 \n" +" ORR R0, R0, #4 \n" +" ORR R0, R0, #1 \n" +" MCR p15, 0, R0, c1, c0 \n" +" MOV R1, #0x80000006 \n" +" MCR p15, 0, R1, c9, c1 \n" +" MOV R1, #6 \n" +" MCR p15, 0, R1, c9, c1, 1 \n" +" MRC p15, 0, R1, c1, c0 \n" +" ORR R1, R1, #0x50000 \n" +" MCR p15, 0, R1, c1, c0 \n" +" LDR R2, =0xC0200000 \n" +" MOV R1, #1 \n" +" STR R1, [R2, #0x10C] \n" +" MOV R1, #0xFF \n" +" STR R1, [R2, #0xC] \n" +" STR R1, [R2, #0x1C] \n" +" STR R1, [R2, #0x2C] \n" +" STR R1, [R2, #0x3C] \n" +" STR R1, [R2, #0x4C] \n" +" STR R1, [R2, #0x5C] \n" +" STR R1, [R2, #0x6C] \n" +" STR R1, [R2, #0x7C] \n" +" STR R1, [R2, #0x8C] \n" +" STR R1, [R2, #0x9C] \n" +" STR R1, [R2, #0xAC] \n" +" STR R1, [R2, #0xBC] \n" +" STR R1, [R2, #0xCC] \n" +" STR R1, [R2, #0xDC] \n" +" STR R1, [R2, #0xEC] \n" +" STR R1, [R2, #0xFC] \n" +" LDR R1, =0xC0400008 \n" +" LDR R2, =0x430005 \n" +" STR R2, [R1] \n" +" MOV R1, #1 \n" +" LDR R2, =0xC0243100 \n" +" STR R2, [R1] \n" +" LDR R2, =0xC0242010 \n" +" LDR R1, [R2] \n" +" ORR R1, R1, #1 \n" +" STR R1, [R2] \n" +" LDR R0, =0xFFC9A254 \n" + +" LDR R1, =0x1900 \n" +" LDR R3, =0x10FE4 \n" +"loc_FF81013C:\n" +" CMP R1, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF81013C \n" +" LDR R1, =0x16EE30 \n" +" MOV R2, #0 \n" +"loc_FF810154:\n" +" CMP R3, R1 \n" +" STRCC R2, [R3], #4 \n" +" BCC loc_FF810154 \n" +//" B sub_FF810354 \n" +" B sub_FF810354_my \n" + ); +}; + + +/*---------------------------------------------------------------------- + sub_FF810354_my 0xFF810354 +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) sub_FF810354_my() +{ + *(int*)0x1938 = (int)taskCreateHook; + *(int*)0x193C = (int)taskCreateHook; + + + // s95 @FF864D68 + // fix for correct power-on + // must also comment out function in taskcreate_Startup_my + + if ((*(int*) 0xC0220128) & 1) // look at play switch + *(int*)(0x25E8) = 0x200000; // start in play mode + else + *(int*)(0x25E8) = 0x100000; // start in rec mode + + + + asm volatile ( +" LDR R0, =0xFF8103CC \n" +" MOV R1, #0 \n" +" LDR R3, =0xFF810404 \n" +"loc_FF810360:\n" +" CMP R0, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF810360 \n" +" LDR R0, =0xFF810404 \n" +" MOV R1, #0x4B0 \n" +" LDR R3, =0xFF810618 \n" +"loc_FF81037C:\n" +" CMP R0, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF81037C \n" +" MOV R0, #0xD2 \n" +" MSR CPSR_cxsf, R0 \n" +" MOV SP, #0x1000 \n" +" MOV R0, #0xD3 \n" +" MSR CPSR_cxsf, R0 \n" +" MOV SP, #0x1000 \n" +" LDR R0, =0x6C4 \n" +" LDR R2, =0xEEEEEEEE \n" +" MOV R3, #0x1000 \n" +"loc_FF8103B0:\n" +" CMP R0, R3 \n" +" STRCC R2, [R0], #4 \n" +" BCC loc_FF8103B0 \n" +//" BL sub_FF811198 \n" +" BL sub_FF811198_my \n" // patched + ); +} + +/*---------------------------------------------------------------------- + ** sub_FF811198_my @ 0xFF811198 +-----------------------------------------------------------------------*/ + + + +void __attribute__((naked,noinline)) sub_FF811198_my( ) { +asm volatile ( +" STR LR, [SP, #-4]! \n" +" SUB SP, SP, #0x74 \n" +" MOV R0, SP \n" +" MOV R1, #0x74 \n" +" BL sub_FFB9F348 \n" + +" MOV R0, #0x53000 \n" +" STR R0, [SP, #4] \n" +//" LDR R0, =0x16EE30 \n" +" LDR R0, =new_sa \n" // patched +" LDR R0, [R0] \n" + +" LDR R1, =0x379C00 \n" +" STR R0, [SP, #8] \n" +" RSB R0, R0, #0x1F80 \n" +" ADD R0, R0, #0x370000 \n" +" STR R0, [SP, #0xC] \n" +" LDR R0, =0x371F80 \n" +" STR R1, [SP] \n" +" STRD R0, [SP, #0x10] \n" +" MOV R0, #0x22 \n" +" STR R0, [SP, #0x18] \n" +" MOV R0, #0x68 \n" +" STR R0, [SP, #0x1C] \n" +" LDR R0, =0x19B \n" +//" LDR R1, =sub_FF815EE0 \n" +" LDR R1, =sub_FF815EE0_my \n" // patched + +" STR R0, [SP, #0x20] \n" +" MOV R0, #0x96 \n" +" STR R0, [SP, #0x24] \n" +" STR R0, [SP, #0x28] \n" +" MOV R0, #0x64 \n" +" STR R0, [SP, #0x2C] \n" +" MOV R0, #0 \n" +" STR R0, [SP, #0x30] \n" +" STR R0, [SP, #0x34] \n" +" MOV R0, #0x10 \n" +" STR R0, [SP, #0x5C] \n" +" MOV R0, #0x800 \n" +" STR R0, [SP, #0x60] \n" +" MOV R0, #0xA0 \n" +" STR R0, [SP, #0x64] \n" +" MOV R0, #0x280 \n" +" STR R0, [SP, #0x68] \n" +" MOV R0, SP \n" +" MOV R2, #0 \n" +" BL sub_FF8134B8 \n" +" ADD SP, SP, #0x74 \n" +" LDR PC, [SP], #4 \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF815EE0_my 0xFF815EE0 +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) sub_FF815EE0_my() +{ + asm volatile ( +" STMFD SP!, {R4,LR} \n" +" BL sub_FF810B20 \n" +" BL sub_FF81A33C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF815FF4 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF815B1C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF815FFC \n" +" BLLT sub_FF815FD4 \n" +" LDR R0, =0xFF81600C \n" +" BL sub_FF815C04 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816014 \n" +" BLLT sub_FF815FD4 \n" +" LDR R0, =0xFF81600C \n" +" BL sub_FF813CA4 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816028 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF819CC4 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816034 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF81167C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816040 \n" +" BLLT sub_FF815FD4 \n" +" LDMFD SP!, {R4,LR} \n" +//" B sub_FF81FB54 \n" +" B taskcreate_Startup_my \n" +" MOV R0, #0 \n" +" LDMFD SP!, {R3-R5,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + taskcreate_Startup_my 0xFF81FB54 +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) taskcreate_Startup_my() +{ + asm volatile ( +" STMFD SP!, {R3-R5,LR} \n" +" BL sub_FF8346CC \n" +" BL sub_FF83C6B0 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF8360B8 \n" +" CMP R0, #0 \n" +" BEQ loc_FF81FBA8 \n" +" LDR R4, =0xC0220000 \n" +" LDR R0, [R4, #0x12C] \n" +" TST R0, #1 \n" +" MOVEQ R0, #0x12C \n" +" BLEQ sub_FF83AA4C \n" +" BL sub_FF8346C8 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF833D5C \n" +" MOV R0, #0x44 \n" +" STR R0, [R4, #0x1C] \n" +" BL sub_FF833F4C \n" +"loc_FF81FBA4:\n" +" B loc_FF81FBA4 \n" +"loc_FF81FBA8:\n" +// we must remove this for power-on mode handling in sub_FF810354_my to work +//" BL sub_FF8346D4 \n" +" BL sub_FF8346D0 \n" +" BL sub_FF83A8C4 \n" +" LDR R1, =0x3CE000 \n" +" MOV R0, #0 \n" +" BL sub_FF83AD0C \n" +" BL sub_FF83AAB8 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +//" LDR R3, =0xFF81FAF0 \n" +" LDR R3, =task_Startup_my \n" // patched + +" MOV R2, #0 \n" +" MOV R1, #0x19 \n" +" LDR R0, =0xFF81FBF0 \n" +" BL sub_FF81E8A0 \n" +" MOV R0, #0 \n" +" LDMFD SP!, {R3-R5,PC} \n" + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ); +} + + +/*---------------------------------------------------------------------- + task_Startup_my 0xFF81FAF0 +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) task_Startup_my() +{ + asm volatile ( +" STMFD SP!, {R4,LR} \n" +" BL sub_FF816594 \n" +" BL sub_FF835830 \n" +" BL sub_FF8339B4 \n" +" BL sub_FF83C6F4 \n" +" BL sub_FF83C8E0 \n" +//" BL sub_FF83C788 \n" +" BL sub_FF83CA88 \n" +" BL sub_FF832484 \n" +" BL sub_FF83C910 \n" +" BL sub_FF83A068 \n" +" BL sub_FF83CA8C \n" +//" BL sub_FF8345B0 \n" + ); + + CreateTask_PhySw(); // our keyboard task + CreateTask_spytask(); // chdk initialization + + asm volatile ( +" BL sub_FF837D14 \n" +" BL sub_FF83CAA4 \n" +" BL sub_FF831888 \n" +" BL sub_FF833318 \n" +" BL sub_FF83C478 \n" +" BL sub_FF833968 \n" +" BL sub_FF8332B4 \n" +" BL sub_FF8324B8 \n" +" BL sub_FF83D670 \n" +" BL sub_FF833278 \n" +" LDMFD SP!, {R4,LR} \n" +" B sub_FF8166B4 \n" + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ); +} + + +/*---------------------------------------------------------------------- + spytask +-----------------------------------------------------------------------*/ +void spytask(long ua, long ub, long uc, long ud, long ue, long uf) +{ + core_spytask(); +} + + +/*---------------------------------------------------------------------- + CreateTask_spytask +-----------------------------------------------------------------------*/ +void CreateTask_spytask() +{ + _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0); +} + + + +/*---------------------------------------------------------------------- + CreateTask_PhySw 0xFF8345A8 +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) CreateTask_PhySw() +{ + asm volatile ( + + +" STMFD SP!, {R3-R5,LR} \n" +" LDR R4, =0x1C30 \n" +" LDR R0, [R4, #0x10] \n" +" CMP R0, #0 \n" +" BNE loc_FF8345E4 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +//" LDR R3, =sub_FF83457C \n" +" LDR R3, =mykbd_task \n" // PhySw Task patch +" MOV R2, #0x2000 \n" // larger stack + + +" MOV R1, #0x17 \n" +" LDR R0, =0xFF8347DC \n" +" BL sub_FF83AB0C \n" +" STR R0, [R4, #0x10] \n" +"loc_FF8345E4:\n" +" BL sub_FF865BC0 \n" +" BL sub_FF894834 \n" +" BL sub_FF836030 \n" +" CMP R0, #0 \n" +" LDREQ R1, =0x34CC0 \n" +" LDMEQFD SP!, {R3-R5,LR} \n" +" BEQ sub_FF8947BC \n" +" LDMFD SP!, {R3-R5,PC} \n" + + + + + + + + + + + + + + + + + + + ); +} + + +/*---------------------------------------------------------------------- + init_file_modules_task() 0xFF8A0AA0 +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) init_file_modules_task() +{ + asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" BL sub_FF896CE0 \n" +" LDR R5, =0x5006 \n" +" MOVS R4, R0 \n" +" MOVNE R1, #0 \n" +" MOVNE R0, R5 \n" +" BLNE sub_FF89AAD4 \n" +//" BL sub_FF896D0C \n" +" BL sub_FF896D0C_my \n" // patched +" BL core_spytask_can_start\n" // added +" CMP R4, #0 \n" +" MOVEQ R0, R5 \n" +" LDMEQFD SP!, {R4-R6,LR} \n" +" MOVEQ R1, #0 \n" +" BEQ sub_FF89AAD4 \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF896D0C_my() +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) sub_FF896D0C_my() +{ + asm volatile ( +" STMFD SP!, {R4,LR} \n" +" MOV R0, #3 \n" +//" BL sub_FF876598 \n" +" BL sub_FF876598_my \n" // patched +" BL sub_FF96A8E8 \n" +" LDR R4, =0x3244 \n" +" LDR R0, [R4, #4] \n" +" CMP R0, #0 \n" +" BNE loc_FF896D44 \n" +" BL sub_FF8757DC \n" +" BL sub_FF95D878 \n" +" BL sub_FF8757DC \n" +" BL sub_FF871B80 \n" +" BL sub_FF8756DC \n" +" BL sub_FF95D914 \n" +"loc_FF896D44:\n" +" MOV R0, #1 \n" +" STR R0, [R4] \n" +" LDMFD SP!, {R4,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF876598_my() +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) sub_FF876598_my() +{ + asm volatile ( +" STMFD SP!, {R4-R8,LR} \n" +" MOV R8, R0 \n" +" BL sub_FF876518 \n" +" LDR R1, =0x3B0A8 \n" +" MOV R6, R0 \n" +" ADD R4, R1, R0, LSL #7 \n" +" LDR R0, [R4, #0x6C] \n" +" CMP R0, #4 \n" +" LDREQ R1, =0x83F \n" +" LDREQ R0, =0xFF876058 \n" +" BLEQ sub_FF81EB78 \n" +" MOV R1, R8 \n" +" MOV R0, R6 \n" +" BL sub_FF875DCC \n" +" LDR R0, [R4, #0x38] \n" +" BL sub_FF876C3C \n" +" CMP R0, #0 \n" +" STREQ R0, [R4, #0x6C] \n" +" MOV R0, R6 \n" +" BL sub_FF875E5C \n" +" MOV R0, R6 \n" +//" BL sub_FF8761C0 \n" +" BL sub_FF8761C0_my \n" // patched + +" MOV R5, R0 \n" +" MOV R0, R6 \n" +" BL sub_FF8763F0 \n" +" LDR R6, [R4, #0x3C] \n" +" AND R7, R5, R0 \n" +" CMP R6, #0 \n" +" LDR R1, [R4, #0x38] \n" +" MOVEQ R0, #0x80000001 \n" +" MOV R5, #0 \n" +" BEQ loc_FF876648 \n" +" MOV R0, R1 \n" +" BL sub_FF875944 \n" +" CMP R0, #0 \n" +" MOVNE R5, #4 \n" +" CMP R6, #5 \n" +" ORRNE R0, R5, #1 \n" +" BICEQ R0, R5, #1 \n" +" CMP R7, #0 \n" +" BICEQ R0, R0, #2 \n" +" ORREQ R0, R0, #0x80000000 \n" +" BICNE R0, R0, #0x80000000 \n" +" ORRNE R0, R0, #2 \n" +"loc_FF876648:\n" +" CMP R8, #7 \n" +" STR R0, [R4, #0x40] \n" +" LDMNEFD SP!, {R4-R8,PC} \n" +" MOV R0, R8 \n" +" BL sub_FF876568 \n" +" CMP R0, #0 \n" +" LDMEQFD SP!, {R4-R8,LR} \n" +" LDREQ R0, =0xFF876694 \n" +" BEQ sub_FF81177C \n" +" LDMFD SP!, {R4-R8,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF8761C0_my() +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) sub_FF8761C0_my() +{ + asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" MOV R5, R0 \n" +" LDR R0, =0x3B0A8 \n" +" ADD R4, R0, R5, LSL #7 \n" +" LDR R0, [R4, #0x6C] \n" +" TST R0, #2 \n" +" MOVNE R0, #1 \n" +" LDMNEFD SP!, {R4-R6,PC} \n" +" LDR R0, [R4, #0x38] \n" +" MOV R1, R5 \n" +//" BL sub_FF875EE0 \n" +" BL sub_FF875EE0_my \n" // patched + +" CMP R0, #0 \n" +" LDRNE R0, [R4, #0x38] \n" +" MOVNE R1, R5 \n" +" BLNE sub_FF87607C \n" +" LDR R2, =0x3B128 \n" +" ADD R1, R5, R5, LSL #4 \n" +" LDR R1, [R2, R1, LSL #2] \n" +" CMP R1, #4 \n" +" BEQ loc_FF876220 \n" +" CMP R0, #0 \n" +" LDMEQFD SP!, {R4-R6,PC} \n" +" MOV R0, R5 \n" +" BL sub_FF8759D4 \n" +"loc_FF876220:\n" +" CMP R0, #0 \n" +" LDRNE R1, [R4, #0x6C] \n" +" ORRNE R1, R1, #2 \n" +" STRNE R1, [R4, #0x6C] \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + sub_FF875EE0_my() +-----------------------------------------------------------------------*/ + +void __attribute__((naked,noinline)) sub_FF875EE0_my() +{ + asm volatile ( +" STMFD SP!, {R4-R10,LR} \n" +" MOV R9, R0 \n" +" LDR R0, =0x3B0A8 \n" +" MOV R8, #0 \n" +" ADD R5, R0, R1, LSL #7 \n" +" LDR R0, [R5, #0x3C] \n" +" MOV R7, #0 \n" +" CMP R0, #7 \n" +" MOV R6, #0 \n" +" ADDLS PC, PC, R0, LSL #2 \n" +" B loc_FF876038 \n" +" B loc_FF875F44 \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF876030 \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +"loc_FF875F2C:\n" +" MOV R2, #0 \n" +" MOV R1, #0x200 \n" +" MOV R0, #2 \n" +" BL sub_FF890D90 \n" +" MOVS R4, R0 \n" +" BNE loc_FF875F4C \n" +"loc_FF875F44:\n" +" MOV R0, #0 \n" +" LDMFD SP!, {R4-R10,PC} \n" +"loc_FF875F4C:\n" +" LDR R12, [R5, #0x50] \n" +" MOV R3, R4 \n" +" MOV R2, #1 \n" +" MOV R1, #0 \n" +" MOV R0, R9 \n" +" BLX R12 \n" +" CMP R0, #1 \n" +" BNE loc_FF875F78 \n" +" MOV R0, #2 \n" +" BL sub_FF890EE0 \n" +" B loc_FF875F44 \n" +"loc_FF875F78:\n" +" LDR R1, [R5, #0x64] \n" +" MOV R0, R9 \n" +" BLX R1 \n" +//------------------ begin added code --------------- + "MOV R1, R4\n" // pointer to MBR in R1 + "BL mbr_read_dryos\n" // total sectors count in R0 before and after call + + // Start of DataGhost's FAT32 autodetection code + // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage + // According to the code below, we can use R1, R2, R3 and R12. + // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing + // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :) + "MOV R12, R4\n" // Copy the MBR start address so we have something to work with + "MOV LR, R4\n" // Save old offset for MBR signature + "MOV R1, #1\n" // Note the current partition number + "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet! + "dg_sd_fat32:\n" + "CMP R1, #4\n" // Did we already see the 4th partition? + "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything. + "ADD R12, R12, #0x10\n" // Second partition + "ADD R1, R1, #1\n" // Second partition for the loop + "dg_sd_fat32_enter:\n" + "LDRB R2, [R12, #0x1BE]\n" // Partition status + "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB) + "CMP R3, #0xB\n" // Is this a FAT32 partition? + "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then? + "BNE dg_sd_fat32\n" // No, it isn't. + "CMP R2, #0x00\n" // It is, check the validity of the partition type + "CMPNE R2, #0x80\n" + "BNE dg_sd_fat32\n" // Invalid, go to next partition + // This partition is valid, it's the first one, bingo! + "MOV R4, R12\n" // Move the new MBR offset for the partition detection. + + "dg_sd_fat32_end:\n" + // End of DataGhost's FAT32 autodetection code +//------------------ end added code --------------- +" LDRB R1, [R4, #0x1C9] \n" +" LDRB R3, [R4, #0x1C8] \n" +" LDRB R12, [R4, #0x1CC] \n" +" MOV R1, R1, LSL #0x18 \n" +" ORR R1, R1, R3, LSL #0x10 \n" +" LDRB R3, [R4, #0x1C7] \n" +" LDRB R2, [R4, #0x1BE] \n" +//" LDRB LR, [R4, #0x1FF] \n" // replaced, see below + +" ORR R1, R1, R3, LSL #8 \n" +" LDRB R3, [R4, #0x1C6] \n" +" CMP R2, #0 \n" +" CMPNE R2, #0x80 \n" +" ORR R1, R1, R3 \n" +" LDRB R3, [R4, #0x1CD] \n" +" MOV R3, R3, LSL #0x18 \n" +" ORR R3, R3, R12, LSL #0x10 \n" +" LDRB R12, [R4, #0x1CB] \n" +" ORR R3, R3, R12, LSL #8 \n" +" LDRB R12, [R4, #0x1CA] \n" +" ORR R3, R3, R12 \n" +//" LDRB R12, [R4, #0x1FE] \n" +" LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55) +" LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA) +" BNE loc_FF876004 \n" +" CMP R0, R1 \n" +" BCC loc_FF876004 \n" +" ADD R2, R1, R3 \n" +" CMP R2, R0 \n" +" CMPLS R12, #0x55 \n" +" CMPEQ LR, #0xAA \n" +" MOVEQ R7, R1 \n" +" MOVEQ R6, R3 \n" +" MOVEQ R4, #1 \n" +" BEQ loc_FF876008 \n" +"loc_FF876004:\n" +" MOV R4, R8 \n" +"loc_FF876008:\n" +" MOV R0, #2 \n" +" BL sub_FF890EE0 \n" +" CMP R4, #0 \n" +" BNE loc_FF876044 \n" +" LDR R1, [R5, #0x64] \n" +" MOV R7, #0 \n" +" MOV R0, R9 \n" +" BLX R1 \n" +" MOV R6, R0 \n" +" B loc_FF876044 \n" +"loc_FF876030:\n" +" MOV R6, #0x40 \n" +" B loc_FF876044 \n" +"loc_FF876038:\n" +" LDR R1, =0x597 \n" +" LDR R0, =0xFF876058 \n" +" BL sub_FF81EB78 \n" +"loc_FF876044:\n" +" STR R7, [R5, #0x44]! \n" +" STMIB R5, {R6,R8} \n" +" MOV R0, #1 \n" +" LDMFD SP!, {R4-R10,PC} \n" + ); +} + + +/*---------------------------------------------------------------------- + JogDial_task_my() 0xFF865894 + + Patched jog dial task +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) JogDial_task_my() +{ + asm volatile ( +" STMFD SP!, {R4-R11,LR} \n" +" SUB SP, SP, #0x24 \n" +" BL sub_FF865C2C \n" +" LDR R1, =0x25FC \n" +" LDR R6, =0xFFBA548C \n" + +" MOV R0, #0 \n" +" ADD R3, SP, #0x18 \n" +" ADD R12, SP, #0x1C \n" +" ADD R10, SP, #8 \n" +" MOV R2, #0 \n" +" ADD R9, SP, #0x10 \n" +"loc_FF8658C0:\n" +" ADD R12, SP, #0x1C \n" +" ADD LR, R12, R0, LSL #1 \n" +" MOV R2, #0 \n" +" ADD R3, SP, #0x18 \n" +" STRH R2, [LR] \n" +" ADD LR, R3, R0, LSL #1 \n" +" STRH R2, [LR] \n" +" STR R2, [R9, R0, LSL #2] \n" +" STR R2, [R10, R0, LSL #2] \n" +" ADD R0, R0, #1 \n" +" CMP R0, #2 \n" +" BLT loc_FF8658C0 \n" +"loc_FF8658F0:\n" +" LDR R0, =0x25FC \n" +" MOV R2, #0 \n" +" LDR R0, [R0, #8] \n" +" MOV R1, SP \n" +" BL sub_FF83A2F8 \n" +" CMP R0, #0 \n" +" LDRNE R1, =0x262 \n" +" LDRNE R0, =0xFF865B50 \n" +" BLNE sub_FF81EB78 \n" +//------------------ begin added code --------------- +"labelA:\n" + "LDR R0, =jogdial_stopped\n" + "LDR R0, [R0]\n" + "CMP R0, #1\n" + "BNE labelB\n" // continue on if jogdial_stopped = 0 + "MOV R0, #40\n" + "BL _SleepTask\n" // jogdial_stopped=1 -- give time back to OS and suspend jogdial task + "B labelA\n" +"labelB:\n" +//------------------ end added code ----------------- +" LDR R0, [SP] \n" +" AND R4, R0, #0xFF \n" +" AND R0, R0, #0xFF00 \n" +" CMP R0, #0x100 \n" +" BEQ loc_FF865960 \n" +" CMP R0, #0x200 \n" +" BEQ loc_FF865998 \n" +" CMP R0, #0x300 \n" +" BEQ loc_FF865B90 \n" +" CMP R0, #0x400 \n" +" BNE loc_FF8658F0 \n" +" CMP R4, #0 \n" +" LDRNE R1, =0x2ED \n" +" LDRNE R0, =0xFF865B50 \n" +" BLNE sub_FF81EB78 \n" +" RSB R0, R4, R4, LSL #3 \n" +" LDR R0, [R6, R0, LSL #2] \n" +"loc_FF865958:\n" +" BL sub_FF865C10 \n" +" B loc_FF8658F0 \n" +"loc_FF865960:\n" +" LDR R7, =0x260C \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657E0 \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x200 \n" +" MOV R0, #0x28 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R10, R4, LSL #2] \n" +" BEQ loc_FF8658F0 \n" +" MOV R1, #0x274 \n" +" B loc_FF865B3C \n" +"loc_FF865998:\n" +" RSB R5, R4, R4, LSL #3 \n" +" LDR R0, [R6, R5, LSL #2] \n" +" LDR R1, =0xC0240104 \n" +" LDR R0, [R1, R0, LSL #8] \n" +" MOV R2, R0, ASR #0x10 \n" +" ADD R0, SP, #0x1C \n" +" ADD R0, R0, R4, LSL #1 \n" +" STR R0, [SP, #0x20] \n" +" STRH R2, [R0] \n" +" ADD R0, SP, #0x18 \n" +" ADD R11, R0, R4, LSL #1 \n" +" LDRSH R3, [R11] \n" +" SUB R0, R2, R3 \n" +" CMP R0, #0 \n" +" BNE loc_FF865A18 \n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" BEQ loc_FF865AF8 \n" +" LDR R7, =0x260C \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657EC \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x300 \n" +" MOV R0, #0x1F4 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R7, R4, LSL #2] \n" +" BEQ loc_FF865AF8 \n" +" LDR R1, =0x28D \n" +" B loc_FF865AF0 \n" +"loc_FF865A18:\n" +" MOV R1, R0 \n" +" RSBLT R0, R0, #0 \n" +" MOVLE R7, #0 \n" +" MOVGT R7, #1 \n" +" CMP R0, #0xFF \n" +" BLS loc_FF865A58 \n" +" CMP R1, #0 \n" +" RSBLE R0, R3, #0xFF \n" +" ADDLE R0, R0, #0x7F00 \n" +" ADDLE R0, R0, R2 \n" +" RSBGT R0, R2, #0xFF \n" +" ADDGT R0, R0, #0x7F00 \n" +" ADDGT R0, R0, R3 \n" +" ADD R0, R0, #0x8000 \n" +" ADD R0, R0, #1 \n" +" EOR R7, R7, #1 \n" +"loc_FF865A58:\n" +" STR R0, [SP, #4] \n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" ADDEQ R0, R6, R5, LSL #2 \n" +" LDREQ R0, [R0, #8] \n" +" BEQ loc_FF865A90 \n" +" ADD R8, R6, R5, LSL #2 \n" +" ADD R1, R8, R7, LSL #2 \n" +" LDR R1, [R1, #0x10] \n" +" CMP R1, R0 \n" +" BEQ loc_FF865A94 \n" +" LDR R0, [R8, #0xC] \n" +" BL sub_FF89CCA4 \n" +" LDR R0, [R8, #8] \n" +"loc_FF865A90:\n" +" BL sub_FF89CCA4 \n" +"loc_FF865A94:\n" +" ADD R0, R6, R5, LSL #2 \n" +" ADD R7, R0, R7, LSL #2 \n" +" LDR R0, [R7, #0x10] \n" +" LDR R1, [SP, #4] \n" +" BL sub_FF89CBCC \n" +" LDR R0, [R7, #0x10] \n" +" LDR R7, =0x260C \n" +" STR R0, [R9, R4, LSL #2] \n" +" LDR R0, [SP, #0x20] \n" +" LDRH R0, [R0] \n" +" STRH R0, [R11] \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657EC \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x300 \n" +" MOV R0, #0x1F4 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R7, R4, LSL #2] \n" +" BEQ loc_FF865AF8 \n" +" LDR R1, =0x2CF \n" +"loc_FF865AF0:\n" +" LDR R0, =0xFF865B50 \n" +" BL sub_FF81EB78 \n" +"loc_FF865AF8:\n" +" ADD R0, R6, R5, LSL #2 \n" +" LDR R0, [R0, #0x18] \n" +" CMP R0, #1 \n" +" BNE loc_FF865B88 \n" +" LDR R0, =0x25FC \n" +" LDR R0, [R0, #0xC] \n" +" CMP R0, #0 \n" +" BEQ loc_FF865B88 \n" +" LDR R2, =0xFF8657E0 \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x400 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R10, R4, LSL #2] \n" +" BEQ loc_FF8658F0 \n" +" LDR R1, =0x2D6 \n" +"loc_FF865B3C:\n" +" LDR R0, =0xFF865B50 \n" +" BL sub_FF81EB78 \n" +" B loc_FF8658F0 \n" +" NOP \n" + + + + + + + + + + + + + + + + +"loc_FF865B88:\n" +" LDR R0, [R6, R5, LSL #2] \n" +" B loc_FF865958 \n" +"loc_FF865B90:\n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" MOVEQ R1, #0x2E0 \n" +" LDREQ R0, =0xFF865B50 \n" +" BLEQ sub_FF81EB78 \n" +" RSB R0, R4, R4, LSL #3 \n" +" ADD R0, R6, R0, LSL #2 \n" +" LDR R0, [R0, #0xC] \n" +" BL sub_FF89CCA4 \n" +" MOV R2, #0 \n" +" STR R2, [R9, R4, LSL #2] \n" +" B loc_FF8658F0 \n" + + + + + + + + + + + + + + + + + + + ); +}; + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Index: /trunk/platform/s95/sub/100k/stubs_min.S =================================================================== --- /trunk/platform/s95/sub/100k/stubs_min.S (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_min.S (revision 1215) @@ -0,0 +1,17 @@ +#include "stubs_asm.h" + +DEF(zoom_busy, 0x7070+0x14) // @FF9809C8 +DEF(focus_busy, 0x6f28 + 8) // @FF97BEC8 +DEF(zoom_status, 0x835C) // @FF9C21FC +DEF(canon_menu_active, 0x324c + 4) // @FF896FC0 +DEF(movie_status, 0x7128 + 0x44) // @FF985B90 +DEF(enabled_refresh_physical_screen, 0xA0D4) // @FFA4760C +DEF(playrec_mode, 0x2f74+0x4) // @FF889094 +DEF(FlashParamsTable,0xFFC72314) // @FFB0F360 +DEF(physw_status, 0x34CB4) // @FF8340C8 +DEF(physw_run, 0x1C30 + 0x0C) // @FF8340A4 +DEF(led_table, 0x25d4 + 0x04) // @FF864814 +DEF(some_flag_for_af_scan, 0x7534) // @FF9894C0 +DEF(canon_shoot_menu_active, 0x8758 + 1) // @FF9D7B7C +DEF(levent_table,0xFFBF5E24) // @FF9B8354 +DEF(recreview_hold, 0x81f8+0xE8) // @FF9BDC84 Index: /trunk/platform/s95/sub/100k/makefile.inc =================================================================== --- /trunk/platform/s95/sub/100k/makefile.inc (revision 1215) +++ /trunk/platform/s95/sub/100k/makefile.inc (revision 1215) @@ -0,0 +1,23 @@ +# S95 PID = 3212 (hex) +PLATFORMID=12818 + +PLATFORMOS=dryos + +# address where wif or diskboot code will be loaded by camera +MEMBASEADDR=0x1900 + +# size of memory region for CHDK +RESTARTSTART=0x50000 + +# points to the start of the memory pool used by the firmware +MEMISOSTART=0x16EE30 + +# start of firmware +ROMBASEADDR=0xff810000 + +NEED_ENCODED_DISKBOOT=5 + +PLFLAGS=-DMEMBASEADDR=$(MEMBASEADDR) -DMEMISOSTART=$(MEMISOSTART) -DMEMISOSIZE=$(MEMISOSIZE) +PLFLAGS+=-DRESTARTSTART=$(RESTARTSTART) + +KEYSYS=d4b Index: /trunk/platform/s95/sub/100k/stubs_asm.h =================================================================== --- /trunk/platform/s95/sub/100k/stubs_asm.h (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_asm.h (revision 1215) @@ -0,0 +1,20 @@ + .text + +#define DEF(n,a) \ + .globl n; n = a + +#define NSTUB(name, addr)\ + .globl _##name ;\ + .weak _##name ;\ + _##name: ;\ + ldr pc, = ## addr + +#define NHSTUB(name, addr)\ + .globl _##name ;\ + _##name: ;\ + ldr pc, = ## addr + +#define STUB(addr)\ + .globl sub_ ## addr ;\ + sub_ ## addr: ;\ + ldr pc, =0x ## addr Index: /trunk/platform/s95/sub/100k/stubs_tasks.c =================================================================== --- /trunk/platform/s95/sub/100k/stubs_tasks.c (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_tasks.c (revision 1215) @@ -0,0 +1,2577 @@ + + +//** boot @ 0xFF81000C + +void __attribute__((naked,noinline)) boot( ) { +asm volatile ( +" LDR R1, =0xC0410000 \n" +" MOV R0, #0 \n" +" STR R0, [R1] \n" +" MOV R1, #0x78 \n" +" MCR p15, 0, R1, c1, c0 \n" +" MOV R1, #0 \n" +" MCR p15, 0, R1, c7, c10, 4 \n" +" MCR p15, 0, R1, c7, c5 \n" +" MCR p15, 0, R1, c7, c6 \n" +" MOV R0, #0x3D \n" +" MCR p15, 0, R0, c6, c0 \n" +" MOV R0, #0xC000002F \n" +" MCR p15, 0, R0, c6, c1 \n" +" MOV R0, #0x35 \n" +" MCR p15, 0, R0, c6, c2 \n" +" MOV R0, #0x40000035 \n" +" MCR p15, 0, R0, c6, c3 \n" +" MOV R0, #0x80000017 \n" +" MCR p15, 0, R0, c6, c4 \n" +" LDR R0, =0xFF80002D \n" +" MCR p15, 0, R0, c6, c5 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c2, c0 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c2, c0, 1 \n" +" MOV R0, #0x34 \n" +" MCR p15, 0, R0, c3, c0 \n" +" LDR R0, =0x3333330 \n" +" MCR p15, 0, R0, c5, c0, 2 \n" +" LDR R0, =0x3333330 \n" +" MCR p15, 0, R0, c5, c0, 3 \n" +" MRC p15, 0, R0, c1, c0 \n" +" ORR R0, R0, #0x1000 \n" +" ORR R0, R0, #4 \n" +" ORR R0, R0, #1 \n" +" MCR p15, 0, R0, c1, c0 \n" +" MOV R1, #0x80000006 \n" +" MCR p15, 0, R1, c9, c1 \n" +" MOV R1, #6 \n" +" MCR p15, 0, R1, c9, c1, 1 \n" +" MRC p15, 0, R1, c1, c0 \n" +" ORR R1, R1, #0x50000 \n" +" MCR p15, 0, R1, c1, c0 \n" +" LDR R2, =0xC0200000 \n" +" MOV R1, #1 \n" +" STR R1, [R2, #0x10C] \n" +" MOV R1, #0xFF \n" +" STR R1, [R2, #0xC] \n" +" STR R1, [R2, #0x1C] \n" +" STR R1, [R2, #0x2C] \n" +" STR R1, [R2, #0x3C] \n" +" STR R1, [R2, #0x4C] \n" +" STR R1, [R2, #0x5C] \n" +" STR R1, [R2, #0x6C] \n" +" STR R1, [R2, #0x7C] \n" +" STR R1, [R2, #0x8C] \n" +" STR R1, [R2, #0x9C] \n" +" STR R1, [R2, #0xAC] \n" +" STR R1, [R2, #0xBC] \n" +" STR R1, [R2, #0xCC] \n" +" STR R1, [R2, #0xDC] \n" +" STR R1, [R2, #0xEC] \n" +" STR R1, [R2, #0xFC] \n" +" LDR R1, =0xC0400008 \n" +" LDR R2, =0x430005 \n" +" STR R2, [R1] \n" +" MOV R1, #1 \n" +" LDR R2, =0xC0243100 \n" +" STR R2, [R1] \n" +" LDR R2, =0xC0242010 \n" +" LDR R1, [R2] \n" +" ORR R1, R1, #1 \n" +" STR R1, [R2] \n" +" LDR R0, =0xFFC9A254 \n" +" LDR R1, =0x1900 \n" +" LDR R3, =0x10FE4 \n" +"loc_FF81013C:\n" +" CMP R1, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF81013C \n" +" LDR R1, =0x16EE30 \n" +" MOV R2, #0 \n" +"loc_FF810154:\n" +" CMP R3, R1 \n" +" STRCC R2, [R3], #4 \n" +" BCC loc_FF810154 \n" +" B sub_FF810354 \n" + ); +} + + +//** sub_FF810354_my @ 0xFF810354 + +void __attribute__((naked,noinline)) sub_FF810354_my( ) { +asm volatile ( +" LDR R0, =0xFF8103CC \n" +" MOV R1, #0 \n" +" LDR R3, =0xFF810404 \n" +"loc_FF810360:\n" +" CMP R0, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF810360 \n" +" LDR R0, =0xFF810404 \n" +" MOV R1, #0x4B0 \n" +" LDR R3, =0xFF810618 \n" +"loc_FF81037C:\n" +" CMP R0, R3 \n" +" LDRCC R2, [R0], #4 \n" +" STRCC R2, [R1], #4 \n" +" BCC loc_FF81037C \n" +" MOV R0, #0xD2 \n" +" MSR CPSR_cxsf, R0 \n" +" MOV SP, #0x1000 \n" +" MOV R0, #0xD3 \n" +" MSR CPSR_cxsf, R0 \n" +" MOV SP, #0x1000 \n" +" LDR R0, =0x6C4 \n" +" LDR R2, =0xEEEEEEEE \n" +" MOV R3, #0x1000 \n" +"loc_FF8103B0:\n" +" CMP R0, R3 \n" +" STRCC R2, [R0], #4 \n" +" BCC loc_FF8103B0 \n" +" BL sub_FF811198 \n" + ); +} + + +//** sub_FF811198_my @ 0xFF811198 + +void __attribute__((naked,noinline)) sub_FF811198_my( ) { +asm volatile ( +" STR LR, [SP, #-4]! \n" +" SUB SP, SP, #0x74 \n" +" MOV R0, SP \n" +" MOV R1, #0x74 \n" +" BL sub_FFB9F348 \n" +" MOV R0, #0x53000 \n" +" STR R0, [SP, #4] \n" +" LDR R0, =0x16EE30 \n" +" LDR R1, =0x379C00 \n" +" STR R0, [SP, #8] \n" +" RSB R0, R0, #0x1F80 \n" +" ADD R0, R0, #0x370000 \n" +" STR R0, [SP, #0xC] \n" +" LDR R0, =0x371F80 \n" +" STR R1, [SP] \n" +" STRD R0, [SP, #0x10] \n" +" MOV R0, #0x22 \n" +" STR R0, [SP, #0x18] \n" +" MOV R0, #0x68 \n" +" STR R0, [SP, #0x1C] \n" +" LDR R0, =0x19B \n" +" LDR R1, =0xFF815EE0 \n" +" STR R0, [SP, #0x20] \n" +" MOV R0, #0x96 \n" +" STR R0, [SP, #0x24] \n" +" STR R0, [SP, #0x28] \n" +" MOV R0, #0x64 \n" +" STR R0, [SP, #0x2C] \n" +" MOV R0, #0 \n" +" STR R0, [SP, #0x30] \n" +" STR R0, [SP, #0x34] \n" +" MOV R0, #0x10 \n" +" STR R0, [SP, #0x5C] \n" +" MOV R0, #0x800 \n" +" STR R0, [SP, #0x60] \n" +" MOV R0, #0xA0 \n" +" STR R0, [SP, #0x64] \n" +" MOV R0, #0x280 \n" +" STR R0, [SP, #0x68] \n" +" MOV R0, SP \n" +" MOV R2, #0 \n" +" BL sub_FF8134B8 \n" +" ADD SP, SP, #0x74 \n" +" LDR PC, [SP], #4 \n" + ); +} + + +//** sub_FF815EE0_my @ 0xFF815EE0 + +void __attribute__((naked,noinline)) sub_FF815EE0_my( ) { +asm volatile ( +" STMFD SP!, {R4,LR} \n" +" BL sub_FF810B20 \n" +" BL sub_FF81A33C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF815FF4 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF815B1C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF815FFC \n" +" BLLT sub_FF815FD4 \n" +" LDR R0, =0xFF81600C \n" +" BL sub_FF815C04 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816014 \n" +" BLLT sub_FF815FD4 \n" +" LDR R0, =0xFF81600C \n" +" BL sub_FF813CA4 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816028 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF819CC4 \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816034 \n" +" BLLT sub_FF815FD4 \n" +" BL sub_FF81167C \n" +" CMP R0, #0 \n" +" LDRLT R0, =0xFF816040 \n" +" BLLT sub_FF815FD4 \n" +" LDMFD SP!, {R4,LR} \n" +" B sub_FF81FB54 \n" + ); +} + + +//** taskcreate_Startup_my @ 0xFF81FB54 + +void __attribute__((naked,noinline)) taskcreate_Startup_my( ) { +asm volatile ( +" STMFD SP!, {R3-R5,LR} \n" +" BL sub_FF8346CC \n" +" BL sub_FF83C6B0 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF8360B8 \n" +" CMP R0, #0 \n" +" BEQ loc_FF81FBA8 \n" +" LDR R4, =0xC0220000 \n" +" LDR R0, [R4, #0x12C] \n" +" TST R0, #1 \n" +" MOVEQ R0, #0x12C \n" +" BLEQ sub_FF83AA4C \n" +" BL sub_FF8346C8 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF833D5C \n" +" MOV R0, #0x44 \n" +" STR R0, [R4, #0x1C] \n" +" BL sub_FF833F4C \n" +"loc_FF81FBA4:\n" +" B loc_FF81FBA4 \n" +"loc_FF81FBA8:\n" +" BL sub_FF8346D4 \n" +" BL sub_FF8346D0 \n" +" BL sub_FF83A8C4 \n" +" LDR R1, =0x3CE000 \n" +" MOV R0, #0 \n" +" BL sub_FF83AD0C \n" +" BL sub_FF83AAB8 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +" LDR R3, =0xFF81FAF0 \n" +" MOV R2, #0 \n" +" MOV R1, #0x19 \n" +" LDR R0, =0xFF81FBF0 \n" +" BL sub_FF81E8A0 \n" +" MOV R0, #0 \n" +" LDMFD SP!, {R3-R5,PC} \n" +"dword_FF81FBE8 DCD 0xC0220000 \n" +"dword_FF81FBEC DCD 0x3CE000 \n" +"dword_FF81FBF0 DCD 0x72617453 \n" +"dword_FF81FBF4 DCD 0x707574 \n" +"dword_FF81FBF8 DCD 0xE92D4011 \n" +"dword_FF81FBFC DCD 0xE24DD01C \n" +"dword_FF81FC00 DCD 0xE28D1004 \n" +"dword_FF81FC04 DCD 0xE28F0F75 \n" +"dword_FF81FC08 DCD 0xEB005D61 \n" +"dword_FF81FC0C DCD 0xE3700001 \n" +"dword_FF81FC10 DCD 0x159D000C \n" +"dword_FF81FC14 DCD 0x13500000 \n" +"dword_FF81FC18 DCD 0xA00000B \n" +"dword_FF81FC1C DCD 0xE28F1F72 \n" +"dword_FF81FC20 DCD 0xE28F0F72 \n" +"dword_FF81FC24 DCD 0xEB005BAE \n" +"dword_FF81FC28 DCD 0xE1B04000 \n" +"dword_FF81FC2C DCD 0xA000006 \n" +"dword_FF81FC30 DCD 0xE1A03004 \n" +"dword_FF81FC34 DCD 0xE3A02001 \n" +"dword_FF81FC38 DCD 0xE3A01001 \n" +"dword_FF81FC3C DCD 0xE28D001C \n" +"dword_FF81FC40 DCD 0xEB005BF7 \n" +"dword_FF81FC44 DCD 0xE1A00004 \n" +"dword_FF81FC48 DCD 0xEB005BB5 \n" +"loc_FF81FC4C:\n" +" ADD SP, SP, #0x20 \n" +" LDMFD SP!, {R4,PC} \n" + ); +} + + +//** task_Startup_my @ 0xFF81FAF0 + +void __attribute__((naked,noinline)) task_Startup_my( ) { +asm volatile ( +" STMFD SP!, {R4,LR} \n" +" BL sub_FF816594 \n" +" BL sub_FF835830 \n" +" BL sub_FF8339B4 \n" +" BL sub_FF83C6F4 \n" +" BL sub_FF83C8E0 \n" +" BL sub_FF83C788 \n" +" BL sub_FF83CA88 \n" +" BL sub_FF832484 \n" +" BL sub_FF83C910 \n" +" BL sub_FF83A068 \n" +" BL sub_FF83CA8C \n" +" BL sub_FF8345B0 \n" +" BL sub_FF837D14 \n" +" BL sub_FF83CAA4 \n" +" BL sub_FF831888 \n" +" BL sub_FF833318 \n" +" BL sub_FF83C478 \n" +" BL sub_FF833968 \n" +" BL sub_FF8332B4 \n" +" BL sub_FF8324B8 \n" +" BL sub_FF83D670 \n" +" BL sub_FF833278 \n" +" LDMFD SP!, {R4,LR} \n" +" B sub_FF8166B4 \n" +" STMFD SP!, {R3-R5,LR} \n" +" BL sub_FF8346CC \n" +" BL sub_FF83C6B0 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF8360B8 \n" +" CMP R0, #0 \n" +" BEQ loc_FF81FBA8 \n" +" LDR R4, =0xC0220000 \n" +" LDR R0, [R4, #0x12C] \n" +" TST R0, #1 \n" +" MOVEQ R0, #0x12C \n" +" BLEQ sub_FF83AA4C \n" +" BL sub_FF8346C8 \n" +" CMP R0, #0 \n" +" BNE loc_FF81FBA8 \n" +" BL sub_FF833D5C \n" +" MOV R0, #0x44 \n" +" STR R0, [R4, #0x1C] \n" +" BL sub_FF833F4C \n" +"loc_FF81FBA4:\n" +" B loc_FF81FBA4 \n" +"loc_FF81FBA8:\n" +" BL sub_FF8346D4 \n" +" BL sub_FF8346D0 \n" +" BL sub_FF83A8C4 \n" +" LDR R1, =0x3CE000 \n" +" MOV R0, #0 \n" +" BL sub_FF83AD0C \n" +" BL sub_FF83AAB8 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +" LDR R3, =0xFF81FAF0 \n" +" MOV R2, #0 \n" +" MOV R1, #0x19 \n" +" LDR R0, =0xFF81FBF0 \n" +" BL sub_FF81E8A0 \n" +" MOV R0, #0 \n" +" LDMFD SP!, {R3-R5,PC} \n" +"dword_FF81FBE8 DCD 0xC0220000 \n" +"dword_FF81FBEC DCD 0x3CE000 \n" + ); +} + + +//** taskcreatePhySw_my @ 0xFF8345A8 + +void __attribute__((naked,noinline)) taskcreatePhySw_my( ) { +asm volatile ( +" LDMFD SP!, {R4,LR} \n" +" B sub_FF81EB30 \n" +" STMFD SP!, {R3-R5,LR} \n" +" LDR R4, =0x1C30 \n" +" LDR R0, [R4, #0x10] \n" +" CMP R0, #0 \n" +" BNE loc_FF8345E4 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +" LDR R3, =0xFF83457C \n" +" MOV R2, #0x800 \n" +" MOV R1, #0x17 \n" +" LDR R0, =0xFF8347DC \n" +" BL sub_FF83AB0C \n" +" STR R0, [R4, #0x10] \n" +"loc_FF8345E4:\n" +" BL sub_FF865BC0 \n" +" BL sub_FF894834 \n" +" BL sub_FF836030 \n" +" CMP R0, #0 \n" +" LDREQ R1, =0x34CC0 \n" +" LDMEQFD SP!, {R3-R5,LR} \n" +" BEQ sub_FF8947BC \n" +" LDMFD SP!, {R3-R5,PC} \n" +" CMP R0, #3 \n" +" STMFD SP!, {R4,LR} \n" +" MOV R4, R0 \n" +" LDRCS R0, =0xFF8347E4 \n" +" MOVCS R1, #0x144 \n" +" BLCS sub_FF81EB78 \n" +" LDR R0, =0x34CB4 \n" +" LDR R0, [R0, R4, LSL #2] \n" +" LDMFD SP!, {R4,PC} \n" +" LDR R3, =0x34CC0 \n" +" MOV R1, #2 \n" +"loc_FF834630:\n" +" LDR R2, [R3, R1, LSL #2] \n" +" STR R2, [R0, R1, LSL #2] \n" +" SUBS R1, R1, #1 \n" +" BPL loc_FF834630 \n" +" BX LR \n" +" MOV R0, #0x20 \n" + ); +} + + +//** init_file_modules_task @ 0xFF8A0AA0 + +void __attribute__((naked,noinline)) init_file_modules_task( ) { +asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" BL sub_FF896CE0 \n" +" LDR R5, =0x5006 \n" +" MOVS R4, R0 \n" +" MOVNE R1, #0 \n" +" MOVNE R0, R5 \n" +" BLNE sub_FF89AAD4 \n" +" BL sub_FF896D0C \n" +" CMP R4, #0 \n" +" MOVEQ R0, R5 \n" +" LDMEQFD SP!, {R4-R6,LR} \n" +" MOVEQ R1, #0 \n" +" BEQ sub_FF89AAD4 \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} + + +//** sub_FF896D0C_my @ 0xFF896D0C + +void __attribute__((naked,noinline)) sub_FF896D0C_my( ) { +asm volatile ( +" STMFD SP!, {R4,LR} \n" +" MOV R0, #3 \n" +" BL sub_FF876598 \n" +" BL sub_FF96A8E8 \n" +" LDR R4, =0x3244 \n" +" LDR R0, [R4, #4] \n" +" CMP R0, #0 \n" +" BNE loc_FF896D44 \n" +" BL sub_FF8757DC \n" +" BL sub_FF95D878 \n" +" BL sub_FF8757DC \n" +" BL sub_FF871B80 \n" +" BL sub_FF8756DC \n" +" BL sub_FF95D914 \n" +"loc_FF896D44:\n" +" MOV R0, #1 \n" +" STR R0, [R4] \n" +" LDMFD SP!, {R4,PC} \n" + ); +} + + +//** sub_FF876598_my @ 0xFF876598 + +void __attribute__((naked,noinline)) sub_FF876598_my( ) { +asm volatile ( +" STMFD SP!, {R4-R8,LR} \n" +" MOV R8, R0 \n" +" BL sub_FF876518 \n" +" LDR R1, =0x3B0A8 \n" +" MOV R6, R0 \n" +" ADD R4, R1, R0, LSL #7 \n" +" LDR R0, [R4, #0x6C] \n" +" CMP R0, #4 \n" +" LDREQ R1, =0x83F \n" +" LDREQ R0, =0xFF876058 \n" +" BLEQ sub_FF81EB78 \n" +" MOV R1, R8 \n" +" MOV R0, R6 \n" +" BL sub_FF875DCC \n" +" LDR R0, [R4, #0x38] \n" +" BL sub_FF876C3C \n" +" CMP R0, #0 \n" +" STREQ R0, [R4, #0x6C] \n" +" MOV R0, R6 \n" +" BL sub_FF875E5C \n" +" MOV R0, R6 \n" +" BL sub_FF8761C0 \n" +" MOV R5, R0 \n" +" MOV R0, R6 \n" +" BL sub_FF8763F0 \n" +" LDR R6, [R4, #0x3C] \n" +" AND R7, R5, R0 \n" +" CMP R6, #0 \n" +" LDR R1, [R4, #0x38] \n" +" MOVEQ R0, #0x80000001 \n" +" MOV R5, #0 \n" +" BEQ loc_FF876648 \n" +" MOV R0, R1 \n" +" BL sub_FF875944 \n" +" CMP R0, #0 \n" +" MOVNE R5, #4 \n" +" CMP R6, #5 \n" +" ORRNE R0, R5, #1 \n" +" BICEQ R0, R5, #1 \n" +" CMP R7, #0 \n" +" BICEQ R0, R0, #2 \n" +" ORREQ R0, R0, #0x80000000 \n" +" BICNE R0, R0, #0x80000000 \n" +" ORRNE R0, R0, #2 \n" +"loc_FF876648:\n" +" CMP R8, #7 \n" +" STR R0, [R4, #0x40] \n" +" LDMNEFD SP!, {R4-R8,PC} \n" +" MOV R0, R8 \n" +" BL sub_FF876568 \n" +" CMP R0, #0 \n" +" LDMEQFD SP!, {R4-R8,LR} \n" +" LDREQ R0, =0xFF876694 \n" +" BEQ sub_FF81177C \n" +" LDMFD SP!, {R4-R8,PC} \n" + ); +} + + +//** sub_FF8761C0_my @ 0xFF8761C0 + +void __attribute__((naked,noinline)) sub_FF8761C0_my( ) { +asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" MOV R5, R0 \n" +" LDR R0, =0x3B0A8 \n" +" ADD R4, R0, R5, LSL #7 \n" +" LDR R0, [R4, #0x6C] \n" +" TST R0, #2 \n" +" MOVNE R0, #1 \n" +" LDMNEFD SP!, {R4-R6,PC} \n" +" LDR R0, [R4, #0x38] \n" +" MOV R1, R5 \n" +" BL sub_FF875EE0 \n" +" CMP R0, #0 \n" +" LDRNE R0, [R4, #0x38] \n" +" MOVNE R1, R5 \n" +" BLNE sub_FF87607C \n" +" LDR R2, =0x3B128 \n" +" ADD R1, R5, R5, LSL #4 \n" +" LDR R1, [R2, R1, LSL #2] \n" +" CMP R1, #4 \n" +" BEQ loc_FF876220 \n" +" CMP R0, #0 \n" +" LDMEQFD SP!, {R4-R6,PC} \n" +" MOV R0, R5 \n" +" BL sub_FF8759D4 \n" +"loc_FF876220:\n" +" CMP R0, #0 \n" +" LDRNE R1, [R4, #0x6C] \n" +" ORRNE R1, R1, #2 \n" +" STRNE R1, [R4, #0x6C] \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} + + +//** sub_FF875EE0_my @ 0xFF875EE0 + +void __attribute__((naked,noinline)) sub_FF875EE0_my( ) { +asm volatile ( +" STMFD SP!, {R4-R10,LR} \n" +" MOV R9, R0 \n" +" LDR R0, =0x3B0A8 \n" +" MOV R8, #0 \n" +" ADD R5, R0, R1, LSL #7 \n" +" LDR R0, [R5, #0x3C] \n" +" MOV R7, #0 \n" +" CMP R0, #7 \n" +" MOV R6, #0 \n" +" ADDLS PC, PC, R0, LSL #2 \n" +" B loc_FF876038 \n" +" B loc_FF875F44 \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +" B loc_FF876030 \n" +" B loc_FF875F2C \n" +" B loc_FF875F2C \n" +"loc_FF875F2C:\n" +" MOV R2, #0 \n" +" MOV R1, #0x200 \n" +" MOV R0, #2 \n" +" BL sub_FF890D90 \n" +" MOVS R4, R0 \n" +" BNE loc_FF875F4C \n" +"loc_FF875F44:\n" +" MOV R0, #0 \n" +" LDMFD SP!, {R4-R10,PC} \n" +"loc_FF875F4C:\n" +" LDR R12, [R5, #0x50] \n" +" MOV R3, R4 \n" +" MOV R2, #1 \n" +" MOV R1, #0 \n" +" MOV R0, R9 \n" +" BLX R12 \n" +" CMP R0, #1 \n" +" BNE loc_FF875F78 \n" +" MOV R0, #2 \n" +" BL sub_FF890EE0 \n" +" B loc_FF875F44 \n" +"loc_FF875F78:\n" +" LDR R1, [R5, #0x64] \n" +" MOV R0, R9 \n" +" BLX R1 \n" +" LDRB R1, [R4, #0x1C9] \n" +" LDRB R3, [R4, #0x1C8] \n" +" LDRB R12, [R4, #0x1CC] \n" +" MOV R1, R1, LSL #0x18 \n" +" ORR R1, R1, R3, LSL #0x10 \n" +" LDRB R3, [R4, #0x1C7] \n" +" LDRB R2, [R4, #0x1BE] \n" +" LDRB LR, [R4, #0x1FF] \n" +" ORR R1, R1, R3, LSL #8 \n" +" LDRB R3, [R4, #0x1C6] \n" +" CMP R2, #0 \n" +" CMPNE R2, #0x80 \n" +" ORR R1, R1, R3 \n" +" LDRB R3, [R4, #0x1CD] \n" +" MOV R3, R3, LSL #0x18 \n" +" ORR R3, R3, R12, LSL #0x10 \n" +" LDRB R12, [R4, #0x1CB] \n" +" ORR R3, R3, R12, LSL #8 \n" +" LDRB R12, [R4, #0x1CA] \n" +" ORR R3, R3, R12 \n" +" LDRB R12, [R4, #0x1FE] \n" +" BNE loc_FF876004 \n" +" CMP R0, R1 \n" +" BCC loc_FF876004 \n" +" ADD R2, R1, R3 \n" +" CMP R2, R0 \n" +" CMPLS R12, #0x55 \n" +" CMPEQ LR, #0xAA \n" +" MOVEQ R7, R1 \n" +" MOVEQ R6, R3 \n" +" MOVEQ R4, #1 \n" +" BEQ loc_FF876008 \n" +"loc_FF876004:\n" +" MOV R4, R8 \n" +"loc_FF876008:\n" +" MOV R0, #2 \n" +" BL sub_FF890EE0 \n" +" CMP R4, #0 \n" +" BNE loc_FF876044 \n" +" LDR R1, [R5, #0x64] \n" +" MOV R7, #0 \n" +" MOV R0, R9 \n" +" BLX R1 \n" +" MOV R6, R0 \n" +" B loc_FF876044 \n" +"loc_FF876030:\n" +" MOV R6, #0x40 \n" +" B loc_FF876044 \n" +"loc_FF876038:\n" +" LDR R1, =0x597 \n" +" LDR R0, =0xFF876058 \n" +" BL sub_FF81EB78 \n" +"loc_FF876044:\n" +" STR R7, [R5, #0x44]! \n" +" STMIB R5, {R6,R8} \n" +" MOV R0, #1 \n" +" LDMFD SP!, {R4-R10,PC} \n" + ); +} + + +//** JogDial_task_my @ 0xFF865894 + +void __attribute__((naked,noinline)) JogDial_task_my( ) { +asm volatile ( +" STMFD SP!, {R4-R11,LR} \n" +" SUB SP, SP, #0x24 \n" +" BL sub_FF865C2C \n" +" LDR R1, =0x25FC \n" +" LDR R6, =0xFFBA548C \n" +" MOV R0, #0 \n" +" ADD R3, SP, #0x18 \n" +" ADD R12, SP, #0x1C \n" +" ADD R10, SP, #8 \n" +" MOV R2, #0 \n" +" ADD R9, SP, #0x10 \n" +"loc_FF8658C0:\n" +" ADD R12, SP, #0x1C \n" +" ADD LR, R12, R0, LSL #1 \n" +" MOV R2, #0 \n" +" ADD R3, SP, #0x18 \n" +" STRH R2, [LR] \n" +" ADD LR, R3, R0, LSL #1 \n" +" STRH R2, [LR] \n" +" STR R2, [R9, R0, LSL #2] \n" +" STR R2, [R10, R0, LSL #2] \n" +" ADD R0, R0, #1 \n" +" CMP R0, #2 \n" +" BLT loc_FF8658C0 \n" +"loc_FF8658F0:\n" +" LDR R0, =0x25FC \n" +" MOV R2, #0 \n" +" LDR R0, [R0, #8] \n" +" MOV R1, SP \n" +" BL sub_FF83A2F8 \n" +" CMP R0, #0 \n" +" LDRNE R1, =0x262 \n" +" LDRNE R0, =0xFF865B50 \n" +" BLNE sub_FF81EB78 \n" +" LDR R0, [SP] \n" +" AND R4, R0, #0xFF \n" +" AND R0, R0, #0xFF00 \n" +" CMP R0, #0x100 \n" +" BEQ loc_FF865960 \n" +" CMP R0, #0x200 \n" +" BEQ loc_FF865998 \n" +" CMP R0, #0x300 \n" +" BEQ loc_FF865B90 \n" +" CMP R0, #0x400 \n" +" BNE loc_FF8658F0 \n" +" CMP R4, #0 \n" +" LDRNE R1, =0x2ED \n" +" LDRNE R0, =0xFF865B50 \n" +" BLNE sub_FF81EB78 \n" +" RSB R0, R4, R4, LSL #3 \n" +" LDR R0, [R6, R0, LSL #2] \n" +"loc_FF865958:\n" +" BL sub_FF865C10 \n" +" B loc_FF8658F0 \n" +"loc_FF865960:\n" +" LDR R7, =0x260C \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657E0 \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x200 \n" +" MOV R0, #0x28 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R10, R4, LSL #2] \n" +" BEQ loc_FF8658F0 \n" +" MOV R1, #0x274 \n" +" B loc_FF865B3C \n" +"loc_FF865998:\n" +" RSB R5, R4, R4, LSL #3 \n" +" LDR R0, [R6, R5, LSL #2] \n" +" LDR R1, =0xC0240104 \n" +" LDR R0, [R1, R0, LSL #8] \n" +" MOV R2, R0, ASR #0x10 \n" +" ADD R0, SP, #0x1C \n" +" ADD R0, R0, R4, LSL #1 \n" +" STR R0, [SP, #0x20] \n" +" STRH R2, [R0] \n" +" ADD R0, SP, #0x18 \n" +" ADD R11, R0, R4, LSL #1 \n" +" LDRSH R3, [R11] \n" +" SUB R0, R2, R3 \n" +" CMP R0, #0 \n" +" BNE loc_FF865A18 \n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" BEQ loc_FF865AF8 \n" +" LDR R7, =0x260C \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657EC \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x300 \n" +" MOV R0, #0x1F4 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R7, R4, LSL #2] \n" +" BEQ loc_FF865AF8 \n" +" LDR R1, =0x28D \n" +" B loc_FF865AF0 \n" +"loc_FF865A18:\n" +" MOV R1, R0 \n" +" RSBLT R0, R0, #0 \n" +" MOVLE R7, #0 \n" +" MOVGT R7, #1 \n" +" CMP R0, #0xFF \n" +" BLS loc_FF865A58 \n" +" CMP R1, #0 \n" +" RSBLE R0, R3, #0xFF \n" +" ADDLE R0, R0, #0x7F00 \n" +" ADDLE R0, R0, R2 \n" +" RSBGT R0, R2, #0xFF \n" +" ADDGT R0, R0, #0x7F00 \n" +" ADDGT R0, R0, R3 \n" +" ADD R0, R0, #0x8000 \n" +" ADD R0, R0, #1 \n" +" EOR R7, R7, #1 \n" +"loc_FF865A58:\n" +" STR R0, [SP, #4] \n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" ADDEQ R0, R6, R5, LSL #2 \n" +" LDREQ R0, [R0, #8] \n" +" BEQ loc_FF865A90 \n" +" ADD R8, R6, R5, LSL #2 \n" +" ADD R1, R8, R7, LSL #2 \n" +" LDR R1, [R1, #0x10] \n" +" CMP R1, R0 \n" +" BEQ loc_FF865A94 \n" +" LDR R0, [R8, #0xC] \n" +" BL sub_FF89CCA4 \n" +" LDR R0, [R8, #8] \n" +"loc_FF865A90:\n" +" BL sub_FF89CCA4 \n" +"loc_FF865A94:\n" +" ADD R0, R6, R5, LSL #2 \n" +" ADD R7, R0, R7, LSL #2 \n" +" LDR R0, [R7, #0x10] \n" +" LDR R1, [SP, #4] \n" +" BL sub_FF89CBCC \n" +" LDR R0, [R7, #0x10] \n" +" LDR R7, =0x260C \n" +" STR R0, [R9, R4, LSL #2] \n" +" LDR R0, [SP, #0x20] \n" +" LDRH R0, [R0] \n" +" STRH R0, [R11] \n" +" LDR R0, [R7, R4, LSL #2] \n" +" BL sub_FF83B290 \n" +" LDR R2, =0xFF8657EC \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x300 \n" +" MOV R0, #0x1F4 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R7, R4, LSL #2] \n" +" BEQ loc_FF865AF8 \n" +" LDR R1, =0x2CF \n" +"loc_FF865AF0:\n" +" LDR R0, =0xFF865B50 \n" +" BL sub_FF81EB78 \n" +"loc_FF865AF8:\n" +" ADD R0, R6, R5, LSL #2 \n" +" LDR R0, [R0, #0x18] \n" +" CMP R0, #1 \n" +" BNE loc_FF865B88 \n" +" LDR R0, =0x25FC \n" +" LDR R0, [R0, #0xC] \n" +" CMP R0, #0 \n" +" BEQ loc_FF865B88 \n" +" LDR R2, =0xFF8657E0 \n" +" ADD R1, R2, #0 \n" +" ORR R3, R4, #0x400 \n" +" BL sub_FF83B1AC \n" +" TST R0, #1 \n" +" CMPNE R0, #0x15 \n" +" STR R0, [R10, R4, LSL #2] \n" +" BEQ loc_FF8658F0 \n" +" LDR R1, =0x2D6 \n" +"loc_FF865B3C:\n" +" LDR R0, =0xFF865B50 \n" +" BL sub_FF81EB78 \n" +" B loc_FF8658F0 \n" +"dword_FF865B48 DCD 0x25FC \n" +"dword_FF865B4C DCD 0x313 \n" +"dword_FF865B50 DCD 0x61746F52 \n" +"dword_FF865B54 DCD 0x6E457972 \n" +"dword_FF865B58 DCD 0x65646F63 \n" +"dword_FF865B5C DCD 0x632E72 \n" +"dword_FF865B60 DCD 0x260C \n" +"dword_FF865B64 DCD 0xC0240108 \n" +"dword_FF865B68 DCD 0xFFBA548C \n" +"dword_FF865B6C DCD 0x20E \n" +"dword_FF865B70 DCD 0x262 \n" +"dword_FF865B74 DCD 0x2ED \n" +"dword_FF865B78 DCD 0xC0240104 \n" +"dword_FF865B7C DCD 0x28D \n" +"dword_FF865B80 DCD 0x2CF \n" +"dword_FF865B84 DCD 0x2D6 \n" +"loc_FF865B88:\n" +" LDR R0, [R6, R5, LSL #2] \n" +" B loc_FF865958 \n" +"loc_FF865B90:\n" +" LDR R0, [R9, R4, LSL #2] \n" +" CMP R0, #0 \n" +" MOVEQ R1, #0x2E0 \n" +" LDREQ R0, =0xFF865B50 \n" +" BLEQ sub_FF81EB78 \n" +" RSB R0, R4, R4, LSL #3 \n" +" ADD R0, R6, R0, LSL #2 \n" +" LDR R0, [R0, #0xC] \n" +" BL sub_FF89CCA4 \n" +" MOV R2, #0 \n" +" STR R2, [R9, R4, LSL #2] \n" +" B loc_FF8658F0 \n" +" STMFD SP!, {R3-R5,LR} \n" +" LDR R4, =0x25FC \n" +" LDR R0, [R4] \n" +" CMP R0, #0 \n" +" BNE loc_FF865BF4 \n" +" MOV R3, #0 \n" +" STR R3, [SP] \n" +" LDR R3, =0xFF865894 \n" +" MOV R2, #0x800 \n" +" MOV R1, #0x18 \n" +" LDR R0, =0xFF865CE4 \n" +" BL sub_FF83AB0C \n" +" STR R0, [R4] \n" +"loc_FF865BF4:\n" +" LDMFD SP!, {R3-R5,PC} \n" +" CMP R0, #0x28 \n" +" LDR R1, =0x25FC \n" +" SUBCS R0, R0, #0x28 \n" + ); +} + + +//** movie_record_task @ 0xFF98642C + +void __attribute__((naked,noinline)) movie_record_task( ) { +asm volatile ( +" STMFD SP!, {R2-R8,LR} \n" +" LDR R8, =0x2710 \n" +" LDR R4, =0x7128 \n" +" MOV R7, #1 \n" +" LDR R6, =0xFF98611C \n" +" MOV R5, #0 \n" +"loc_FF986444:\n" +" LDR R0, [R4, #0x24] \n" +" MOV R2, #0 \n" +" ADD R1, SP, #4 \n" +" BL sub_FF83A2F8 \n" +" LDR R0, [R4, #0x2C] \n" +" CMP R0, #0 \n" +" LDRNE R0, [R4, #0xC] \n" +" CMPNE R0, #2 \n" +" LDRNE R0, [R4, #0x44] \n" +" CMPNE R0, #6 \n" +" BNE loc_FF98655C \n" +" LDR R0, [SP, #4] \n" +" LDR R1, [R0] \n" +" SUB R1, R1, #2 \n" +" CMP R1, #0xA \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF98655C \n" +" B loc_FF986510 \n" +" B loc_FF986530 \n" +" B loc_FF986540 \n" +" B loc_FF986548 \n" +" B loc_FF986518 \n" +" B loc_FF986550 \n" +" B loc_FF986520 \n" +" B loc_FF98655C \n" +" B loc_FF986558 \n" +" B loc_FF9864E0 \n" +" B loc_FF9864B4 \n" +"loc_FF9864B4:\n" +" STR R5, [R4, #0x40] \n" +" STR R5, [R4, #0x30] \n" +" STR R5, [R4, #0x34] \n" +" STRH R5, [R4, #6] \n" +" STR R6, [R4, #0xB4] \n" +" LDR R0, [R4, #0xC] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R4, #0xC] \n" +" MOV R0, #6 \n" +" STR R0, [R4, #0x44] \n" +" B loc_FF9864FC \n" +"loc_FF9864E0:\n" +" STR R5, [R4, #0x40] \n" +" STR R5, [R4, #0x30] \n" +" STR R6, [R4, #0xB4] \n" +" LDR R0, [R4, #0xC] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R4, #0xC] \n" +" STR R7, [R4, #0x44] \n" +"loc_FF9864FC:\n" +" LDR R2, =0xFF985334 \n" +" LDR R1, =0xB45D0 \n" +" LDR R0, =0xFF985430 \n" +" BL sub_FF8530D0 \n" +" B loc_FF98655C \n" +"loc_FF986510:\n" +" BL sub_FF986244 \n" +" B loc_FF98655C \n" +"loc_FF986518:\n" +" BL sub_FF985B84 \n" +" B loc_FF98655C \n" +"loc_FF986520:\n" +" LDR R1, [R0, #0x18] \n" +" LDR R0, [R0, #4] \n" +" BL sub_FFAF2B4C \n" +" B loc_FF98655C \n" +"loc_FF986530:\n" +" LDR R0, [R4, #0x44] \n" +" CMP R0, #5 \n" +" STRNE R7, [R4, #0x34] \n" +" B loc_FF98655C \n" +"loc_FF986540:\n" +" BL sub_FF9857CC \n" +" B loc_FF98655C \n" +"loc_FF986548:\n" +" BL sub_FF98547C \n" +" B loc_FF98655C \n" +"loc_FF986550:\n" +" BL sub_FF9852C0 \n" +" B loc_FF98655C \n" +"loc_FF986558:\n" +" BL sub_FF98698C \n" +"loc_FF98655C:\n" +" LDR R1, [SP, #4] \n" +" MOV R3, #0x5F0 \n" +" STR R5, [R1] \n" +" STR R3, [SP] \n" +" LDR R0, [R4, #0x28] \n" +" LDR R3, =0xFF985124 \n" +" MOV R2, R8 \n" +" BL sub_FF83AC4C \n" +" B loc_FF986444 \n" +" STMFD SP!, {R3-R9,LR} \n" +" LDR R5, =0x7128 \n" +" MOV R6, #0 \n" +" STR R6, [R5, #0x2C] \n" +" LDR R0, [R5, #8] \n" +" LDR R8, =0x2710 \n" +" CMP R0, #0 \n" +" BNE sub_FF986648 \n" +" MOV R0, #1 \n" +" STR R0, [R5, #8] \n" +" MOV R0, #0 \n" + ); +} + + +//** sub_FF985B84_my @ 0xFF985B84 + +void __attribute__((naked,noinline)) sub_FF985B84_my( ) { +asm volatile ( +" STMFD SP!, {R4-R11,LR} \n" +" SUB SP, SP, #0x64 \n" +" MOV R8, #0 \n" +" LDR R6, =0x7128 \n" +" MOV R4, R0 \n" +" STR R8, [SP, #0x54] \n" +" STR R8, [SP, #0x4C] \n" +" LDR R0, [R6, #0x44] \n" +" MOV R11, #4 \n" +" CMP R0, #3 \n" +" STREQ R11, [R6, #0x44] \n" +" LDR R0, [R6, #0xB4] \n" +" MOV R9, #0 \n" +" MOV R7, #0 \n" +" MOV R5, #1 \n" +" BLX R0 \n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #6 \n" +" BEQ loc_FF985BE4 \n" +" LDR R1, [R6, #0xC] \n" +" CMP R1, #2 \n" +" BNE loc_FF985C04 \n" +" CMP R0, #5 \n" +" BEQ loc_FF985C7C \n" +"loc_FF985BE4:\n" +" LDR R1, =0x7F2 \n" +" MOV R7, #1 \n" +" LDR R0, =0xFF985124 \n" +" BL sub_FF81EB78 \n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #4 \n" +" MOVNE R5, #0 \n" +" B loc_FF985C0C \n" +"loc_FF985C04:\n" +" CMP R0, #4 \n" +" BNE loc_FF985C7C \n" +"loc_FF985C0C:\n" +" LDRH R0, [R6, #6] \n" +" CMP R0, #1 \n" +" LDREQ R1, =0x809 \n" +" LDREQ R0, =0xFF985124 \n" +" BLEQ sub_FF81EB78 \n" +" LDRH R0, [R6, #6] \n" +" CMP R0, #3 \n" +" BNE loc_FF985C40 \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R1, [R6, #0xB8] \n" +" BL sub_FFBA18B4 \n" +" CMP R1, #0 \n" +" MOVNE R5, #0 \n" +"loc_FF985C40:\n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #6 \n" +" CMPNE R0, #1 \n" +" CMPNE R0, #3 \n" +" BNE loc_FF985C84 \n" +" CMP R7, #1 \n" +" CMPEQ R5, #0 \n" +" BNE loc_FF985C84 \n" +" LDR R0, [R6, #0x18] \n" +" MOV R1, #0x3E8 \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BNE loc_FF9860A4 \n" +" MOV R0, #0x90000 \n" +" BL sub_FF89D31C \n" +"loc_FF985C7C:\n" +" ADD SP, SP, #0x64 \n" +" LDMFD SP!, {R4-R11,PC} \n" +"loc_FF985C84:\n" +" CMP R5, #1 \n" +" MOV R10, #1 \n" +" BNE loc_FF985CAC \n" +" ADD R3, SP, #0x4C \n" +" ADD R2, SP, #0x50 \n" +" ADD R1, SP, #0x54 \n" +" ADD R0, SP, #0x58 \n" +" BL sub_FFAF2C0C \n" +" MOVS R9, R0 \n" +" BNE loc_FF985CC8 \n" +"loc_FF985CAC:\n" +" LDR R0, [R6, #0x34] \n" +" CMP R0, #1 \n" +" BNE loc_FF985E24 \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R1, [R6, #0x48] \n" +" CMP R0, R1 \n" +" BCC loc_FF985E24 \n" +"loc_FF985CC8:\n" +" CMP R9, #0x80000001 \n" +" STREQ R11, [R6, #0x70] \n" +" BEQ loc_FF985D00 \n" +" CMP R9, #0x80000003 \n" +" STREQ R10, [R6, #0x70] \n" +" BEQ loc_FF985D00 \n" +" CMP R9, #0x80000005 \n" +" MOVEQ R0, #2 \n" +" BEQ loc_FF985CFC \n" +" CMP R9, #0x80000007 \n" +" STRNE R8, [R6, #0x70] \n" +" BNE loc_FF985D00 \n" +" MOV R0, #3 \n" +"loc_FF985CFC:\n" +" STR R0, [R6, #0x70] \n" +"loc_FF985D00:\n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" BNE loc_FF985D68 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B78 \n" +" BL sub_FFAAD410 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" MVN R3, #1 \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R0, =0xB4618 \n" +" MOV R3, #0 \n" +" MOV R2, #0 \n" +" MOV R1, #0x40 \n" +" BL sub_FFAAD368 \n" +" B loc_FF985DBC \n" +"loc_FF985D60:\n" +" MOV R1, #1 \n" +" B loc_FF986030 \n" +"loc_FF985D68:\n" +" BL sub_FF986A38 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" MVN R1, #1 \n" +" MOV R0, #0 \n" +" ADD R5, SP, #0x1C \n" +" STMIA R5, {R0-R3} \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R4, SP, #0xC \n" +" ADD R0, SP, #0x60 \n" +" STMIA R4, {R0-R3} \n" +" MOV R3, #0 \n" +" MOV R1, #0x40 \n" +" MOV R2, #0 \n" +" STMEA SP, {R1-R3} \n" +" LDR R3, =0xB4618 \n" +" MOV R1, #0 \n" +" MOV R0, #0 \n" +" BL sub_FFAAC1D8 \n" +"loc_FF985DBC:\n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BEQ loc_FF985DE4 \n" +"loc_FF985DDC:\n" +" MOV R1, #1 \n" +" B loc_FF986048 \n" +"loc_FF985DE4:\n" +" LDR R0, [R6, #0xC] \n" +" MOV R4, #5 \n" +" CMP R0, #2 \n" +" MOV R0, #1 \n" +" BNE loc_FF985E10 \n" +" BL sub_FFAAD3D0 \n" +" BL sub_FFAAD3F8 \n" +" STR R4, [R6, #0x44] \n" +" BL sub_FF986A38 \n" +" STR R10, [R6, #0x44] \n" +" B loc_FF985E1C \n" +"loc_FF985E10:\n" +" BL sub_FFAAC28C \n" +" BL sub_FFAAC2EC \n" +" STR R4, [R6, #0x44] \n" +"loc_FF985E1C:\n" +" STR R8, [R6, #0x34] \n" +" B loc_FF985C7C \n" +"loc_FF985E24:\n" +" CMP R5, #1 \n" +" BNE loc_FF9860A4 \n" +" STR R10, [R6, #0x38] \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R11, [R4, #0xC] \n" +" CMP R0, #0 \n" +" LDRNE R9, [SP, #0x58] \n" +" LDRNE R10, [SP, #0x54] \n" +" BNE loc_FF985F6C \n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" BNE loc_FF985EC8 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B78 \n" +" BL sub_FFAAD410 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" MVN R3, #0 \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R0, [SP, #0x58] \n" +" LDR R1, [SP, #0x54] \n" +" LDR R2, [SP, #0x50] \n" +" LDR R3, [SP, #0x4C] \n" +" BL sub_FFAAD368 \n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B6C \n" +" BL sub_FFAAD410 \n" +" B loc_FF985F30 \n" +"loc_FF985EC8:\n" +" LDR R0, [R4, #0x20] \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" MVN R1, #0 \n" +" ADD R9, SP, #0x1C \n" +" STMIA R9, {R0-R3} \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R0, SP, #0x60 \n" +" ADD R9, SP, #0xC \n" +" STMIA R9, {R0-R3} \n" +" LDR R1, [SP, #0x50] \n" +" LDR R2, [SP, #0x54] \n" +" LDR R3, [SP, #0x4C] \n" +" STMFA SP, {R1,R3} \n" +" STR R2, [SP] \n" +" LDMIB R4, {R0,R1} \n" +" LDR R3, [SP, #0x58] \n" +" MOV R2, R11 \n" +" BL sub_FFAAC1D8 \n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +"loc_FF985F30:\n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BNE loc_FF985DDC \n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" MOV R0, #1 \n" +" BNE loc_FF985F54 \n" +" BL sub_FFAAD3D0 \n" +" B loc_FF985F58 \n" +"loc_FF985F54:\n" +" BL sub_FFAAC28C \n" +"loc_FF985F58:\n" +" LDR R0, [SP, #0x60] \n" +" LDR R1, [SP, #0x58] \n" +" ADD R9, R1, R0 \n" +" LDR R1, [SP, #0x54] \n" +" SUB R10, R1, R0 \n" +"loc_FF985F6C:\n" +" LDR R0, [R6, #0xC] \n" +" LDR R2, [R6, #0x64] \n" +" CMP R0, #2 \n" +" ADD R3, SP, #0x5C \n" +" BNE loc_FF985FC0 \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" LDR R3, [R6, #0x68] \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R2, [SP, #0x50] \n" +" LDR R3, [SP, #0x4C] \n" +" MOV R1, R10 \n" +" MOV R0, R9 \n" +" BL sub_FFAAD368 \n" +" B loc_FF986018 \n" +"loc_FF985FC0:\n" +" LDR R1, [R6, #0x68] \n" +" LDR R0, [R4, #0x20] \n" +" STR R1, [SP, #0x20] \n" +" STR R0, [SP, #0x1C] \n" +" STR R2, [SP, #0x24] \n" +" STR R3, [SP, #0x28] \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R0, SP, #0x60 \n" +" STR R2, [SP, #0x14] \n" +" LDR R2, [SP, #0x50] \n" +" STR R1, [SP, #0x10] \n" +" STR R3, [SP, #0x18] \n" +" LDR R3, [SP, #0x4C] \n" +" STR R0, [SP, #0xC] \n" +" STMFA SP, {R2,R3} \n" +" STR R10, [SP] \n" +" LDMIB R4, {R0,R1} \n" +" MOV R3, R9 \n" +" MOV R2, R11 \n" +" BL sub_FFAAC1D8 \n" +"loc_FF986018:\n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BNE loc_FF986038 \n" +" MOV R1, #0 \n" +"loc_FF986030:\n" +" MOV R0, #0x90000 \n" +" B loc_FF98604C \n" +"loc_FF986038:\n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BEQ loc_FF986054 \n" +" MOV R1, #0 \n" +"loc_FF986048:\n" +" MOV R0, #0xA0000 \n" +"loc_FF98604C:\n" +" BL sub_FF985B0C \n" +" B loc_FF985C7C \n" +"loc_FF986054:\n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" MOV R0, #0 \n" +" BNE loc_FF98606C \n" +" BL sub_FFAAD3D0 \n" +" B loc_FF986070 \n" +"loc_FF98606C:\n" +" BL sub_FFAAC28C \n" +"loc_FF986070:\n" +" LDR R0, [SP, #0x58] \n" +" LDR R1, [SP, #0x60] \n" +" BL sub_FFAF2E44 \n" +" LDR R0, [R6, #0x68] \n" +" LDR R3, =0x71B0 \n" +" ADD R1, R0, #1 \n" +" STR R1, [R6, #0x68] \n" +" STR R3, [SP] \n" +" LDR R0, [R6, #0x64] \n" +" SUB R3, R3, #4 \n" +" AND R2, R0, #0xFF \n" +" LDR R0, [SP, #0x60] \n" +" BL sub_FFAF098C \n" +"loc_FF9860A4:\n" +" CMP R5, #1 \n" +" LDRNEH R0, [R6, #6] \n" +" CMPNE R0, #3 \n" +" BNE loc_FF985C7C \n" +" LDR R0, [R6, #0x6C] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R6, #0x6C] \n" +" LDRH R1, [R6, #6] \n" +" CMP R1, #3 \n" +" LDRNE R1, [R6, #0x54] \n" +" LDREQ R1, =0x3E9 \n" +" MUL R0, R1, R0 \n" +" LDREQ R1, =0x1770 \n" +" LDRNE R1, [R6, #0x50] \n" +" BL sub_FFBA18B4 \n" +" MOV R4, R0 \n" +" BL sub_FFAF31C0 \n" +" LDR R0, [R6, #0x8C] \n" +" CMP R0, R4 \n" +" BNE loc_FF986100 \n" +" LDR R0, [R6, #0x3C] \n" +" CMP R0, #1 \n" +" BNE loc_FF986114 \n" +"loc_FF986100:\n" +" LDR R1, [R6, #0x98] \n" +" MOV R0, R4 \n" +" BLX R1 \n" +" STR R4, [R6, #0x8C] \n" +" STR R8, [R6, #0x3C] \n" +"loc_FF986114:\n" +" STR R8, [R6, #0x38] \n" +" B loc_FF985C7C \n" +" BX LR \n" +" LDR R0, =0x7128 \n" +" LDR R1, =0xFF98611C \n" +" STR R1, [R0, #0xB4] \n" +" MOV R1, #3 \n" +" STR R1, [R0, #0x44] \n" +" BX LR \n" +" STMFD SP!, {R3-R7,LR} \n" +" LDR R5, =0x7128 \n" +" MOV R6, R1 \n" +" LDR R0, [R5, #0xBC] \n" +" MOV R4, R2 \n" +" CMP R0, R2 \n" +" BCC loc_FF986198 \n" +" STR R4, [R5, #0xBC] \n" +" BL sub_FF986960 \n" +" MOV R1, R0 \n" +" MOV R0, #8 \n" +" STMIA R1, {R0,R6} \n" +" STR R4, [R1, #0x18] \n" +" LDR R0, [R5, #0x24] \n" +" BL sub_FF83A4FC \n" +" LDR R0, [R5, #0x44] \n" +" CMP R0, #5 \n" +" BEQ loc_FF986198 \n" +" MOV R0, SP \n" +" BL sub_FFAF29EC \n" +" LDR R0, =0xB4600 \n" +" LDR R1, [R0, #0xC] \n" +" LDR R0, [SP] \n" +" BL sub_FF867B94 \n" +"loc_FF986198:\n" +" LDMFD SP!, {R3-R7,PC} \n" +" STMFD SP!, {R4,LR} \n" +" BL sub_FF986960 \n" +" MOV R1, R0 \n" +" MOV R0, #7 \n" +" STR R0, [R1] \n" +" LDR R0, =0x7128 \n" +" LDR R0, [R0, #0x24] \n" +" LDMFD SP!, {R4,LR} \n" +" B sub_FF83A4FC \n" +" STMFD SP!, {R4,LR} \n" + ); +} + + +//** capt_seq_task @ 0xFF88322C + +void __attribute__((naked,noinline)) capt_seq_task( ) { +asm volatile ( +" STMFD SP!, {R3-R7,LR} \n" +" LDR R7, =0x2E6C \n" +" LDR R4, =0x3CFBC \n" +" MOV R6, #0 \n" +"loc_FF88323C:\n" +" LDR R0, [R7, #4] \n" +" MOV R2, #0 \n" +" MOV R1, SP \n" +" BL sub_FF83A2F8 \n" +" TST R0, #1 \n" +" BEQ loc_FF883268 \n" +" LDR R1, =0x43F \n" +" LDR R0, =0xFF882CF4 \n" +" BL sub_FF81EB78 \n" +" BL sub_FF81EB30 \n" +" LDMFD SP!, {R3-R7,PC} \n" +"loc_FF883268:\n" +" LDR R0, [SP] \n" +" LDR R1, [R0] \n" +" CMP R1, #0x23 \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF8834A0 \n" +" B loc_FF88330C \n" +" B loc_FF883324 \n" +" B loc_FF883348 \n" +" B loc_FF88335C \n" +" B loc_FF883354 \n" +" B loc_FF883368 \n" +" B loc_FF883370 \n" +" B loc_FF883378 \n" +" B loc_FF883384 \n" +" B loc_FF8833AC \n" +" B loc_FF883390 \n" +" B loc_FF88339C \n" +" B loc_FF8833A4 \n" +" B loc_FF8833B4 \n" +" B loc_FF8833BC \n" +" B loc_FF8833C4 \n" +" B loc_FF8833CC \n" +" B loc_FF8833D4 \n" +" B loc_FF8833DC \n" +" B loc_FF8833E4 \n" +" B loc_FF8833EC \n" +" B loc_FF8833F4 \n" +" B loc_FF8833FC \n" +" B loc_FF883408 \n" +" B loc_FF883410 \n" +" B loc_FF88341C \n" +" B loc_FF883424 \n" +" B loc_FF88342C \n" +" B loc_FF883434 \n" +" B loc_FF88343C \n" +" B loc_FF883444 \n" +" B loc_FF88344C \n" +" B loc_FF883454 \n" +" B loc_FF88345C \n" +" B loc_FF883468 \n" +" B loc_FF8834AC \n" +"loc_FF88330C:\n" +" BL sub_FF8839D4 \n" +" BL sub_FF880B34 \n" +" LDR R0, [R4, #0x24] \n" +" CMP R0, #0 \n" +" BLNE sub_FF98AEC0 \n" +" B loc_FF8834AC \n" +"loc_FF883324:\n" +" LDRH R1, [R4] \n" +" LDR R0, [R0, #0xC] \n" +" SUB R12, R1, #0x4200 \n" +" SUBS R12, R12, #0x2E \n" +" BNE loc_FF883340 \n" +" BL sub_FF98BCA8 \n" +" B loc_FF8834AC \n" +"loc_FF883340:\n" +" BL sub_FF98ACEC \n" +" B loc_FF8834AC \n" +"loc_FF883348:\n" +" MOV R0, #1 \n" +" BL sub_FF883CB8 \n" +" B loc_FF8834AC \n" +"loc_FF883354:\n" +" BL sub_FF88366C \n" +" B loc_FF883360 \n" +"loc_FF88335C:\n" +" BL sub_FF8839B4 \n" +"loc_FF883360:\n" +" STR R6, [R4, #0x24] \n" +" B loc_FF8834AC \n" +"loc_FF883368:\n" +" BL sub_FF8839BC \n" +" B loc_FF8834AC \n" +"loc_FF883370:\n" +" BL sub_FF883BBC \n" +" B loc_FF883388 \n" +"loc_FF883378:\n" +" LDR R0, [R0, #0xC] \n" +" BL sub_FF98AF28 \n" +" B loc_FF8834AC \n" +"loc_FF883384:\n" +" BL sub_FF883C28 \n" +"loc_FF883388:\n" +" BL sub_FF880B34 \n" +" B loc_FF8834AC \n" +"loc_FF883390:\n" +" LDR R0, [R4, #0x54] \n" +" BL sub_FF884614 \n" +" B loc_FF8834AC \n" +"loc_FF88339C:\n" +" BL sub_FF884968 \n" +" B loc_FF8834AC \n" +"loc_FF8833A4:\n" +" BL sub_FF8849CC \n" +" B loc_FF8834AC \n" +"loc_FF8833AC:\n" +" BL sub_FF8839B4 \n" +" B loc_FF8834AC \n" +"loc_FF8833B4:\n" +" BL sub_FF989FFC \n" +" B loc_FF8834AC \n" +"loc_FF8833BC:\n" +" BL sub_FF98A208 \n" +" B loc_FF8834AC \n" +"loc_FF8833C4:\n" +" BL sub_FF98A2A0 \n" +" B loc_FF8834AC \n" +"loc_FF8833CC:\n" +" BL sub_FF98A38C \n" +" B loc_FF8834AC \n" +"loc_FF8833D4:\n" +" BL sub_FF98A484 \n" +" B loc_FF8834AC \n" +"loc_FF8833DC:\n" +" MOV R0, #0 \n" +" B loc_FF883400 \n" +"loc_FF8833E4:\n" +" BL sub_FF98A6C0 \n" +" B loc_FF8834AC \n" +"loc_FF8833EC:\n" +" BL sub_FF98A764 \n" +" B loc_FF8834AC \n" +"loc_FF8833F4:\n" +" BL sub_FF98A844 \n" +" B loc_FF8834AC \n" +"loc_FF8833FC:\n" +" MOV R0, #1 \n" +"loc_FF883400:\n" +" BL sub_FF98A548 \n" +" B loc_FF8834AC \n" +"loc_FF883408:\n" +" BL sub_FF883EC4 \n" +" B loc_FF8834AC \n" +"loc_FF883410:\n" +" BL sub_FF883F6C \n" +" BL sub_FF98C1D0 \n" +" B loc_FF8834AC \n" +"loc_FF88341C:\n" +" BL sub_FF884350 \n" +" B loc_FF8834AC \n" +"loc_FF883424:\n" +" BL sub_FF884490 \n" +" B loc_FF8834AC \n" +"loc_FF88342C:\n" +" BL sub_FF98C2A0 \n" +" B loc_FF8834AC \n" +"loc_FF883434:\n" +" BL sub_FF837C6C \n" +" B loc_FF8834AC \n" +"loc_FF88343C:\n" +" BL sub_FF886FE4 \n" +" B loc_FF8834AC \n" +"loc_FF883444:\n" +" BL sub_FF887070 \n" +" B loc_FF8834AC \n" +"loc_FF88344C:\n" +" BL sub_FF98A97C \n" +" B loc_FF8834AC \n" +"loc_FF883454:\n" +" BL sub_FF98A9E0 \n" +" B loc_FF8834AC \n" +"loc_FF88345C:\n" +" BL sub_FF8870CC \n" +" BL sub_FF88708C \n" +" B loc_FF8834AC \n" +"loc_FF883468:\n" +" MOV R0, #1 \n" +" BL sub_FF98B6D0 \n" +" MOV R0, #1 \n" +" BL sub_FF98B800 \n" +" LDRH R0, [R4, #0x9C] \n" +" CMP R0, #4 \n" +" LDRNEH R0, [R4] \n" +" SUBNE R12, R0, #0x4200 \n" +" SUBNES R12, R12, #0x2A \n" +" BNE loc_FF8834AC \n" +" BL sub_FF887070 \n" +" BL sub_FF887670 \n" +" BL sub_FF8874EC \n" +" B loc_FF8834AC \n" +"loc_FF8834A0:\n" +" LDR R1, =0x591 \n" +" LDR R0, =0xFF882CF4 \n" +" BL sub_FF81EB78 \n" +"loc_FF8834AC:\n" +" LDR R0, [SP] \n" +" LDR R1, [R0, #4] \n" +" LDR R0, [R7] \n" +" BL sub_FF88E1E4 \n" +" LDR R5, [SP] \n" +" LDR R0, [R5, #8] \n" +" CMP R0, #0 \n" +" LDREQ R1, =0x115 \n" +" LDREQ R0, =0xFF882CF4 \n" +" BLEQ sub_FF81EB78 \n" +" STR R6, [R5, #8] \n" +" B loc_FF88323C \n" +" STMFD SP!, {R3-R5,LR} \n" +" LDR R2, =0x3CED0 \n" +" MOV R0, #0 \n" +" MOV R1, #0 \n" +"loc_FF8834EC:\n" +" ADD R3, R2, R0, LSL #4 \n" +" ADD R0, R0, #1 \n" +" CMP R0, #5 \n" +" STR R1, [R3, #8] \n" +" BCC loc_FF8834EC \n" +" LDR R0, =0x3CF20 \n" +" STR R1, [R0, #8] \n" +" ADD R0, R0, #0x10 \n" +" STR R1, [R0, #8] \n" +" BL sub_FF8840F0 \n" +" BL sub_FF98AF90 \n" +" BL sub_FF98B940 \n" +" MOV R1, #5 \n" + ); +} + + +//** sub_FF98ACEC_my @ 0xFF98ACEC + +void __attribute__((naked,noinline)) sub_FF98ACEC_my( ) { +asm volatile ( +" STMFD SP!, {R3-R7,LR} \n" +" LDR R5, =0x3CFBC \n" +" MOV R4, R0 \n" +" LDR R0, [R5, #0x24] \n" +" MOV R6, #0 \n" +" CMP R0, #0 \n" +" BNE loc_FF98AD28 \n" +" MOV R0, #0xC \n" +" BL sub_FF889040 \n" +" TST R0, #1 \n" +" MOVNE R2, R4 \n" +" LDMNEFD SP!, {R3-R7,LR} \n" +" MOVNE R1, #1 \n" +" MOVNE R0, #1 \n" +" BNE sub_FF8811F8 \n" +"loc_FF98AD28:\n" +" LDR R0, [R4, #8] \n" +" LDR R7, =0x420C \n" +" ORR R0, R0, #1 \n" +" STR R0, [R4, #8] \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" BEQ loc_FF98ADB8 \n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +" LDR R0, [R4, #0xC] \n" +" CMP R0, #1 \n" +" BLS loc_FF98ADC4 \n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #2 \n" +" BNE loc_FF98ADD0 \n" +" BL sub_FF88402C \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" BEQ loc_FF98ADB8 \n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +" LDR R0, [R4, #0xC] \n" +" CMP R0, #1 \n" +" BLS loc_FF98ADC4 \n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #2 \n" +" BEQ loc_FF98ADFC \n" +" B loc_FF98ADD0 \n" +"loc_FF98ADB8:\n" +" LDRH R0, [R5, #0x9A] \n" +" CMP R0, #3 \n" +" BEQ loc_FF98AE00 \n" +"loc_FF98ADC4:\n" +" LDRH R0, [R5, #0x98] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE00 \n" +"loc_FF98ADD0:\n" +" LDRH R0, [R5, #0x94] \n" +" CMP R0, #1 \n" +" BNE loc_FF98AE00 \n" +" LDRH R0, [R5] \n" +" CMP R0, R7 \n" +" LDRNE R0, [R4, #0xC] \n" +" CMPNE R0, #1 \n" +" BLS loc_FF98AE00 \n" +" LDR R0, [R4, #0x10] \n" +" CMP R0, #1 \n" +" BNE loc_FF98AE00 \n" +"loc_FF98ADFC:\n" +" BL sub_FF98C2D8 \n" +"loc_FF98AE00:\n" +" BL sub_FF98C2A0 \n" +" BL sub_FF8839C4 \n" +" LDR R0, [R5, #0x24] \n" +" CMP R0, #0 \n" +" BNE loc_FF98AE98 \n" +" MOV R0, R4 \n" +" BL sub_FFAF90A4 \n" +" TST R0, #1 \n" +" BNE loc_FF98AEBC \n" +" MOV R0, R4 \n" +" BL sub_FFAF94C4 \n" +" BL sub_FF98B498 \n" +" MOV R6, #1 \n" +" MOV R0, #2 \n" +" BL sub_FF87EFF8 \n" +" LDRH R0, [R5] \n" +" SUB R12, R0, #0x8200 \n" +" SUBS R12, R12, #0x2D \n" +" BNE loc_FF98AE88 \n" +" MOV R2, #2 \n" +" ADD R0, R2, #0x15C \n" +" MOV R1, SP \n" +" STR R6, [SP] \n" +" BL sub_FF896414 \n" +" TST R0, #1 \n" +" MOVNE R1, #0xC3 \n" +" LDRNE R0, =0xFF98AF9C \n" +" BLNE sub_FF81EB78 \n" +" LDRH R0, [SP] \n" +" CMP R0, #1 \n" +" STRHI R6, [R4, #0xE4] \n" +" BHI loc_FF98AEA8 \n" +" MOV R0, #0 \n" +" STR R0, [R4, #0xE4] \n" +"loc_FF98AE88:\n" +" MOV R0, R4 \n" +" BL sub_FFAF99B8 \n" +" MOV R6, R0 \n" +" B loc_FF98AEAC \n" +"loc_FF98AE98:\n" +" LDR R0, =0x7514 \n" +" LDR R0, [R0] \n" +" CMP R0, #0 \n" +" BEQ loc_FF98AEAC \n" +"loc_FF98AEA8:\n" +" MOV R6, #0x1D \n" +"loc_FF98AEAC:\n" +" MOV R1, R6 \n" +" MOV R0, R4 \n" +" LDMFD SP!, {R3-R7,LR} \n" +" B sub_FFAF91B0 \n" +"loc_FF98AEBC:\n" +" LDMFD SP!, {R3-R7,PC} \n" +" STMFD SP!, {R4-R6,LR} \n" +" BL sub_FF8829C4 \n" +" MOV R4, R0 \n" +" LDR R0, =0x3CFBC \n" +" LDR R5, =0x7514 \n" +" LDR R0, [R0, #0x24] \n" +" MOV R6, #1 \n" +" CMP R0, #0 \n" +" BEQ loc_FF98AF04 \n" +" MOV R0, #0xC \n" +" BL sub_FF889040 \n" +" TST R0, #1 \n" +" STRNE R6, [R5] \n" +" LDRNE R0, [R4, #8] \n" +" ORRNE R0, R0, #0x40000000 \n" +" STRNE R0, [R4, #8] \n" +" LDMNEFD SP!, {R4-R6,PC} \n" +"loc_FF98AF04:\n" +" MOV R0, R4 \n" +" BL sub_FF98AAC4 \n" +" MOV R0, R4 \n" +" BL sub_FFAF902C \n" +" MOV R0, R4 \n" +" BL sub_FFAF99B8 \n" + ); +} + + +//** sub_FF8733D0_my @ 0xFF8733D0 + +void __attribute__((naked,noinline)) sub_FF8733D0_my( ) { +asm volatile ( +" BL sub_FF8732A8 \n" +" B sub_FF8733AC \n" +" STMFD SP!, {R4-R6,LR} \n" +" LDR R1, [R0, #0x58] \n" +" CMP R1, #0 \n" +" BEQ loc_FF87343C \n" +" LDR R4, =0x2BB0 \n" +" LDRH R2, [R4] \n" +" ADD R1, R2, #1 \n" +" BIC R1, R1, #0x10000 \n" +" CMP R1, #0x14 \n" +" STRH R1, [R4] \n" +" MOVCS R1, #0 \n" +" STRCSH R1, [R4] \n" +" LDR R1, =0x3A2A8 \n" +" ADD R2, R2, R2, LSL #1 \n" +" ADD R5, R1, R2, LSL #5 \n" +" MOV R1, R0 \n" +" MOV R0, R5 \n" +" MOV R2, #0x60 \n" +" BL sub_FFB9F254 \n" +" LDR R0, [R4, #8] \n" +" MOV R1, R5 \n" +" BL sub_FF83A4FC \n" +" CMP R0, #0 \n" +" MOVNE R0, #0 \n" +" LDMNEFD SP!, {R4-R6,PC} \n" +"loc_FF87343C:\n" +" MOV R0, #1 \n" +" LDMFD SP!, {R4-R6,PC} \n" +" STMFD SP!, {R4-R8,LR} \n" +" MOV R6, #0 \n" +" MOV R4, R0 \n" +" STR R6, [R0, #0x5C] \n" +" MOV R0, R1 \n" +" MOV R7, R1 \n" +" BL sub_FF814100 \n" +" CMP R0, #0x1F \n" +" MOV R5, R0 \n" +" ADDCC R0, R4, #4 \n" +" MOVCC R1, R7 \n" +" LDMCCFD SP!, {R4-R8,LR} \n" +" MOVCC R2, #0x1F \n" +" BCC sub_FF81402C \n" +" ADD R0, R5, #1 \n" +" BL sub_FF83AD14 \n" +" MOV R2, R5 \n" +" MOV R1, R7 \n" +" STR R0, [R4, #0x5C] \n" +" BL sub_FFB9F0EC \n" +" LDR R0, [R4, #0x5C] \n" +" STRB R6, [R0, R5] \n" +" LDMFD SP!, {R4-R8,PC} \n" +" STMFD SP!, {R3-R5,LR} \n" +" MOVS R1, R0 \n" +" LDR R4, =0x2BB0 \n" +" MOVNE R1, #1 \n" +" CMP R1, #0 \n" +" STR R1, [R4, #4] \n" +" BEQ sub_FF87350C \n" +" MOV R1, R0 \n" +" LDR R0, =0x39ED8 \n" +" LDMIA R1, {R2,R3,R5,R12} \n" +" STMIA R0, {R2,R3,R5,R12} \n" +" LDR R0, [R4, #8] \n" +" CMP R0, #0 \n" +" BNE sub_FF87350C \n" +" MOV R1, #0x14 \n" + ); +} + + +//** exp_drv_task @ 0xFF8CF1A8 + +void __attribute__((naked,noinline)) exp_drv_task( ) { +asm volatile ( +" STMFD SP!, {R4-R8,LR} \n" +" SUB SP, SP, #0x20 \n" +" LDR R8, =0xBB8 \n" +" LDR R7, =0x4888 \n" +" LDR R5, =0x59818 \n" +" MOV R0, #0 \n" +" ADD R6, SP, #0x10 \n" +" STR R0, [SP, #0xC] \n" +"loc_FF8CF1C8:\n" +" LDR R0, [R7, #0x20] \n" +" MOV R2, #0 \n" +" ADD R1, SP, #0x1C \n" +" BL sub_FF83A2F8 \n" +" LDR R0, [SP, #0xC] \n" +" CMP R0, #1 \n" +" BNE loc_FF8CF214 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R0, [R0] \n" +" CMP R0, #0x14 \n" +" CMPNE R0, #0x15 \n" +" CMPNE R0, #0x16 \n" +" CMPNE R0, #0x17 \n" +" BEQ loc_FF8CF378 \n" +" CMP R0, #0x29 \n" +" BEQ loc_FF8CF300 \n" +" ADD R1, SP, #0xC \n" +" MOV R0, #0 \n" +" BL sub_FF8CF158 \n" +"loc_FF8CF214:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0] \n" +" CMP R1, #0x2F \n" +" BNE loc_FF8CF244 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D053C \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #1 \n" +" BL sub_FF88E1E4 \n" +" BL sub_FF81EB30 \n" +" ADD SP, SP, #0x20 \n" +" LDMFD SP!, {R4-R8,PC} \n" +"loc_FF8CF244:\n" +" CMP R1, #0x2E \n" +" BNE loc_FF8CF260 \n" +" LDR R2, [R0, #0x8C]! \n" +" LDR R1, [R0, #4] \n" +" MOV R0, R1 \n" +" BLX R2 \n" +" B loc_FF8CF824 \n" +"loc_FF8CF260:\n" +" CMP R1, #0x27 \n" +" BNE loc_FF8CF2B0 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x80 \n" +" BL sub_FF88E218 \n" +" LDR R0, =0xFF8CAFB4 \n" +" MOV R1, #0x80 \n" +" BL sub_FF97D684 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #0x80 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x1096 \n" +" BNE loc_FF8CF36C \n" +"loc_FF8CF29C:\n" +" LDR R1, [SP, #0x1C] \n" +" LDR R0, [R1, #0x90] \n" +" LDR R1, [R1, #0x8C] \n" +" BLX R1 \n" +" B loc_FF8CF824 \n" +"loc_FF8CF2B0:\n" +" CMP R1, #0x28 \n" +" BNE loc_FF8CF2F8 \n" +" ADD R1, SP, #0xC \n" +" BL sub_FF8CF158 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x100 \n" +" BL sub_FF88E218 \n" +" LDR R0, =0xFF8CAFC4 \n" +" MOV R1, #0x100 \n" +" BL sub_FF97E014 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #0x100 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" BEQ loc_FF8CF29C \n" +" LDR R1, =0x10A0 \n" +" B loc_FF8CF36C \n" +"loc_FF8CF2F8:\n" +" CMP R1, #0x29 \n" +" BNE loc_FF8CF310 \n" +"loc_FF8CF300:\n" +" LDR R0, [SP, #0x1C] \n" +" ADD R1, SP, #0xC \n" +" BL sub_FF8CF158 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF310:\n" +" CMP R1, #0x2C \n" +" BNE loc_FF8CF328 \n" +" BL sub_FF8BD5E0 \n" +" BL sub_FF8BE1EC \n" +" BL sub_FF8BDD58 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF328:\n" +" CMP R1, #0x2D \n" +" BNE loc_FF8CF378 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #4 \n" +" BL sub_FF88E218 \n" +" LDR R1, =0xFF8CAFE4 \n" +" LDR R0, =0xFFFFF400 \n" +" MOV R2, #4 \n" +" BL sub_FF8BD05C \n" +" BL sub_FF8BD2E4 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R8 \n" +" MOV R1, #4 \n" +" BL sub_FF88E040 \n" +" TST R0, #1 \n" +" BEQ loc_FF8CF29C \n" +" LDR R1, =0x10C8 \n" +"loc_FF8CF36C:\n" +" LDR R0, =0xFF8CB66C \n" +" BL sub_FF81EB78 \n" +" B loc_FF8CF29C \n" +"loc_FF8CF378:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R4, #1 \n" +" LDR R1, [R0] \n" +" CMP R1, #0x12 \n" +" CMPNE R1, #0x13 \n" +" BNE loc_FF8CF3E8 \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R1, R0, R1, LSL #2 \n" +" SUB R1, R1, #8 \n" +" LDMIA R1, {R2-R4} \n" +" STMIA R6, {R2-R4} \n" +" BL sub_FF8CD8C0 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D0950 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x94] \n" +" LDR R2, [R0, #0x98] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF3E8:\n" +" CMP R1, #0x14 \n" +" CMPNE R1, #0x15 \n" +" CMPNE R1, #0x16 \n" +" CMPNE R1, #0x17 \n" +" BNE loc_FF8CF4A0 \n" +" ADD R3, SP, #0xC \n" +" MOV R2, SP \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FF8CDB2C \n" +" CMP R0, #1 \n" +" MOV R4, R0 \n" +" CMPNE R4, #5 \n" +" BNE loc_FF8CF43C \n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, R4 \n" +" LDR R1, [R0, #0x7C]! \n" +" LDR R12, [R0, #0x10]! \n" +" LDR R3, [R0, #4] \n" +" MOV R0, SP \n" +" BLX R12 \n" +" B loc_FF8CF474 \n" +"loc_FF8CF43C:\n" +" LDR R0, [SP, #0x1C] \n" +" CMP R4, #2 \n" +" LDR R3, [R0, #0x90] \n" +" CMPNE R4, #6 \n" +" BNE loc_FF8CF488 \n" +" LDR R12, [R0, #0x8C] \n" +" MOV R0, SP \n" +" MOV R2, R4 \n" +" MOV R1, #1 \n" +" BLX R12 \n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, SP \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FF8CEEA4 \n" +"loc_FF8CF474:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R2, [SP, #0xC] \n" +" MOV R1, R4 \n" +" BL sub_FF8CF0F8 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF488:\n" +" LDR R1, [R0, #0x7C] \n" +" LDR R12, [R0, #0x8C] \n" +" ADD R0, R0, #4 \n" +" MOV R2, R4 \n" +" BLX R12 \n" +" B loc_FF8CF760 \n" +"loc_FF8CF4A0:\n" +" CMP R1, #0x23 \n" +" CMPNE R1, #0x24 \n" +" BNE loc_FF8CF540 \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R1, R0, R1, LSL #2 \n" +" SUB R1, R1, #8 \n" +" LDMIA R1, {R2-R4} \n" +" STMIA R6, {R2-R4} \n" +" BL sub_FF8CC948 \n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8CCD94 \n" +" B loc_FF8CF760 \n" +"dword_FF8CF4EC DCD 0xFF8CAFE4 \n" +"dword_FF8CF4F0 DCD 0x4888 \n" +"dword_FF8CF4F4 DCD 0xFFFFF400 \n" +"dword_FF8CF4F8 DCD 0xEDE \n" +"dword_FF8CF4FC DCD 0xEEC \n" +"dword_FF8CF500 DCD 0xF7E \n" +"dword_FF8CF504 DCD 0xF93 \n" +"dword_FF8CF508 DCD 0xFED \n" +"dword_FF8CF50C DCD 0xFF2 \n" +"dword_FF8CF510 DCD 0xFF7 \n" +"dword_FF8CF514 DCD 0x1006 \n" +"dword_FF8CF518 DCD 0x1063 \n" +"dword_FF8CF51C DCD 0x1089 \n" +"dword_FF8CF520 DCD 0x108C \n" +"dword_FF8CF524 DCD 0xFF8CAFD4 \n" +"dword_FF8CF528 DCD 0x10BD \n" +"dword_FF8CF52C DCD 0x59818 \n" +"dword_FF8CF530 DCD 0x1096 \n" +"dword_FF8CF534 DCD 0xFF8CAFC4 \n" +"dword_FF8CF538 DCD 0x10A0 \n" +"dword_FF8CF53C DCD 0x10C8 \n" +"loc_FF8CF540:\n" +" ADD R1, R0, #4 \n" +" LDMIA R1, {R2,R3,R12} \n" +" STMIA R6, {R2,R3,R12} \n" +" LDR R1, [R0] \n" +" CMP R1, #0x26 \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF600 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF5F8 \n" +" B loc_FF8CF600 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF608 \n" +" B loc_FF8CF620 \n" +" B loc_FF8CF620 \n" +" B loc_FF8CF72C \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF734 \n" +" B loc_FF8CF73C \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF610 \n" +" B loc_FF8CF618 \n" +" B loc_FF8CF618 \n" +" B loc_FF8CF62C \n" +" B loc_FF8CF62C \n" +" B loc_FF8CF634 \n" +" B loc_FF8CF66C \n" +" B loc_FF8CF6A4 \n" +" B loc_FF8CF6DC \n" +" B loc_FF8CF714 \n" +" B loc_FF8CF714 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF740 \n" +" B loc_FF8CF71C \n" +" B loc_FF8CF724 \n" +"loc_FF8CF5F8:\n" +" BL sub_FF8CB4F4 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF600:\n" +" BL sub_FF8CB790 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF608:\n" +" BL sub_FF8CB9B8 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF610:\n" +" BL sub_FF8CBC90 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF618:\n" +" BL sub_FF8CBEA8 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF620:\n" +" BL sub_FF8CC1CC \n" +" MOV R4, #0 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF62C:\n" +" BL sub_FF8CC314 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF634:\n" +" LDRH R1, [R0, #4] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R0, #0xC] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0648 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF66C:\n" +" LDRH R1, [R0, #4] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R5, #8] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0750 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF6A4:\n" +" LDRH R1, [R5] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R0, #6] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R5, #8] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D0804 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF6DC:\n" +" LDRH R1, [R5] \n" +" STRH R1, [SP, #0x10] \n" +" LDRH R1, [R5, #2] \n" +" STRH R1, [SP, #0x12] \n" +" LDRH R1, [R5, #4] \n" +" STRH R1, [SP, #0x14] \n" +" LDRH R1, [R5, #6] \n" +" STRH R1, [SP, #0x16] \n" +" LDRH R1, [R0, #0xC] \n" +" STRH R1, [SP, #0x18] \n" +" LDRH R1, [R5, #0xA] \n" +" STRH R1, [SP, #0x1A] \n" +" BL sub_FF8D08AC \n" +" B loc_FF8CF740 \n" +"loc_FF8CF714:\n" +" BL sub_FF8CC720 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF71C:\n" +" BL sub_FF8CCE98 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF724:\n" +" BL sub_FF8CD134 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF72C:\n" +" BL sub_FF8CD314 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF734:\n" +" BL sub_FF8CD548 \n" +" B loc_FF8CF740 \n" +"loc_FF8CF73C:\n" +" BL sub_FF8CD6B8 \n" +"loc_FF8CF740:\n" +" LDR R0, [SP, #0x1C] \n" +" LDR R1, [R0, #0x7C] \n" +" LDR R3, [R0, #0x8C] \n" +" LDR R2, [R0, #0x90] \n" +" ADD R0, R0, #4 \n" +" BLX R3 \n" +" CMP R4, #1 \n" +" BNE loc_FF8CF7A8 \n" +"loc_FF8CF760:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R2, #0xC \n" +" LDR R1, [R0, #0x7C] \n" +" ADD R1, R1, R1, LSL #1 \n" +" ADD R0, R0, R1, LSL #2 \n" +" SUB R4, R0, #8 \n" +" LDR R0, =0x59818 \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FFB9F0EC \n" +" LDR R0, =0x59824 \n" +" MOV R2, #0xC \n" +" ADD R1, SP, #0x10 \n" +" BL sub_FFB9F0EC \n" +" LDR R0, =0x59830 \n" +" MOV R2, #0xC \n" +" MOV R1, R4 \n" +" BL sub_FFB9F0EC \n" +" B loc_FF8CF824 \n" +"loc_FF8CF7A8:\n" +" LDR R0, [SP, #0x1C] \n" +" MOV R3, #1 \n" +" LDR R0, [R0] \n" +" CMP R0, #0xB \n" +" BNE loc_FF8CF7F0 \n" +" MOV R2, #0 \n" +" STRD R2, [SP] \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #0 \n" +" BL sub_FF8CB2D4 \n" +" MOV R3, #1 \n" +" MOV R2, #0 \n" +" STRD R2, [SP] \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #0 \n" +" B loc_FF8CF820 \n" +"loc_FF8CF7F0:\n" +" MOV R2, #1 \n" +" STRD R2, [SP] \n" +" MOV R3, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #1 \n" +" BL sub_FF8CB2D4 \n" +" MOV R3, #1 \n" +" MOV R2, #1 \n" +" MOV R1, #1 \n" +" MOV R0, #1 \n" +" STR R3, [SP] \n" +" STR R3, [SP, #4] \n" +"loc_FF8CF820:\n" +" BL sub_FF8CB43C \n" +"loc_FF8CF824:\n" +" LDR R0, [SP, #0x1C] \n" +" BL sub_FF8D053C \n" +" B loc_FF8CF1C8 \n" +" STMFD SP!, {R0-R11,LR} \n" +" LDR R8, =0x4888 \n" +" SUB SP, SP, #4 \n" +" LDR R0, [R8, #0x18] \n" +" LDR R6, [SP, #0x40] \n" +" CMP R0, #1 \n" +" LDRNE R1, =0x11EA \n" +" LDRNE R0, =0xFF8CB66C \n" +" LDR R10, [SP, #0x44] \n" +" LDR R7, [SP, #0x48] \n" +" LDR R11, [SP, #0x4C] \n" +" LDR R9, [SP, #0x3C] \n" + ); +} + + +//** sub_FF8CC1CC_my @ 0xFF8CC1CC + +void __attribute__((naked,noinline)) sub_FF8CC1CC_my( ) { +asm volatile ( +" STMFD SP!, {R4-R8,LR} \n" +" LDR R7, =0x4888 \n" +" MOV R4, R0 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x3E \n" +" BL sub_FF88E218 \n" +" LDRSH R0, [R4, #4] \n" +" MOV R2, #0 \n" +" MOV R1, #0 \n" +" BL sub_FF8CB038 \n" +" MOV R5, R0 \n" +" LDRSH R0, [R4, #6] \n" +" BL sub_FF8CB148 \n" +" LDRSH R0, [R4, #8] \n" +" BL sub_FF8CB1A0 \n" +" LDRSH R0, [R4, #0xA] \n" +" BL sub_FF8CB1F8 \n" +" LDRSH R0, [R4, #0xC] \n" +" MOV R1, #0 \n" +" BL sub_FF8CB250 \n" +" MOV R6, R0 \n" +" LDRSH R0, [R4, #0xE] \n" +" BL sub_FF8D05E8 \n" +" LDR R0, [R4] \n" +" LDR R8, =0x59830 \n" +" CMP R0, #0xB \n" +" MOVEQ R5, #0 \n" +" MOVEQ R6, #0 \n" +" BEQ loc_FF8CC268 \n" +" CMP R5, #1 \n" +" BNE loc_FF8CC268 \n" +" LDRSH R0, [R4, #4] \n" +" LDR R1, =0xFF8CAFA4 \n" +" MOV R2, #2 \n" +" BL sub_FF97D9D0 \n" +" STRH R0, [R4, #4] \n" +" MOV R0, #0 \n" +" STR R0, [R7, #0x28] \n" +" B loc_FF8CC270 \n" +"loc_FF8CC268:\n" +" LDRH R0, [R8] \n" +" STRH R0, [R4, #4] \n" +"loc_FF8CC270:\n" +" CMP R6, #1 \n" +" LDRNEH R0, [R8, #8] \n" +" BNE loc_FF8CC28C \n" +" LDRSH R0, [R4, #0xC] \n" +" LDR R1, =0xFF8CB028 \n" +" MOV R2, #0x20 \n" +" BL sub_FF8D0604 \n" +"loc_FF8CC28C:\n" +" STRH R0, [R4, #0xC] \n" +" LDRSH R0, [R4, #6] \n" +" BL sub_FF8BD350 \n" +" LDRSH R0, [R4, #8] \n" +" MOV R1, #1 \n" +" BL sub_FF8BDAA0 \n" +" MOV R1, #0 \n" +" ADD R0, R4, #8 \n" +" BL sub_FF8BDB28 \n" +" LDRSH R0, [R4, #0xE] \n" +" BL sub_FF8C5F98 \n" +" LDR R4, =0xBB8 \n" +" CMP R5, #1 \n" +" BNE loc_FF8CC2E4 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R4 \n" +" MOV R1, #2 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x61E \n" +" LDRNE R0, =0xFF8CB66C \n" +" BLNE sub_FF81EB78 \n" +"loc_FF8CC2E4:\n" +" CMP R6, #1 \n" +" LDMNEFD SP!, {R4-R8,PC} \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R2, R4 \n" +" MOV R1, #0x20 \n" +" BL sub_FF88E124 \n" +" TST R0, #1 \n" +" LDRNE R1, =0x623 \n" +" LDRNE R0, =0xFF8CB66C \n" +" LDMNEFD SP!, {R4-R8,LR} \n" +" BNE sub_FF81EB78 \n" +" LDMFD SP!, {R4-R8,PC} \n" +" STMFD SP!, {R1-R11,LR} \n" +" LDR R7, =0x4888 \n" +" MOV R4, R0 \n" +" LDR R0, [R7, #0x1C] \n" +" MOV R1, #0x3E \n" +" BL sub_FF88E218 \n" + ); +} + + +//** sub_FF8BD350_my @ 0xFF8BD350 + +void __attribute__((naked,noinline)) sub_FF8BD350_my( ) { +asm volatile ( +" STMFD SP!, {R4-R6,LR} \n" +" LDR R5, =0x456C \n" +" MOV R4, R0 \n" +" LDR R0, [R5, #4] \n" +" CMP R0, #1 \n" +" LDRNE R1, =0x146 \n" +" LDRNE R0, =0xFF8BD154 \n" +" BLNE sub_FF81EB78 \n" +" CMN R4, #0xC00 \n" +" LDREQSH R4, [R5, #2] \n" +" CMN R4, #0xC00 \n" +" MOVEQ R1, #0x14C \n" +" LDREQ R0, =0xFF8BD154 \n" +" STRH R4, [R5, #2] \n" +" BLEQ sub_FF81EB78 \n" +" MOV R0, R4 \n" +" BL sub_FFA50D94 \n" +" MOV R4, R0 \n" +" BL sub_FF90988C \n" +" MOV R0, R4 \n" +" BL sub_FF9162BC \n" +" TST R0, #1 \n" +" LDRNE R1, =0x151 \n" +" LDMNEFD SP!, {R4-R6,LR} \n" +" LDRNE R0, =0xFF8BD154 \n" +" BNE sub_FF81EB78 \n" +" LDMFD SP!, {R4-R6,PC} \n" + ); +} Index: /trunk/platform/s95/sub/100k/lib.c =================================================================== --- /trunk/platform/s95/sub/100k/lib.c (revision 1215) +++ /trunk/platform/s95/sub/100k/lib.c (revision 1215) @@ -0,0 +1,116 @@ +#include "platform.h" +#include "stdlib.h" +#include "lolevel.h" + +/* +sensor size from code at FFB64E84 = (3744*2784)*(12/8) = 0xee9200 = 15634944 + +@FFB64AAC = 0xea0 = 3744 // raw sensor size +@FFB64AB4 = 0xae0 = 2784 +@FFB64ABC = 0xe40 = 3648 // cropped size ?? +@FFB64AC4 = 0xab0 = 2736 +*/ + + +char *hook_raw_image_addr() +{ + if (*((int*)0x2ECC) != 0) + return (char*) 0x46000000; + else + return (char*) 0x41269150; +} + + +long hook_raw_size() +{ + return 0xEE9200; // @FFB64E84 - ok +} + + +void *vid_get_viewport_live_fb() +{ + return (void*) 0; + + // TODO - implement for s95 ? + +#if 0 + void **fb=(void **)0x94E18; + unsigned char buff = *((unsigned char*)0x9114+6); + if (buff == 0) buff = 2; else buff--; + return fb[buff]; +#endif +} + + +void *vid_get_bitmap_fb() +{ + return (void*) 0x40471000; // @FF85E704 - ok +} + + +void *vid_get_viewport_fb() +{ + return (void*) 0x40587700; // @FFB619C4 - ok +} + + +// Histo etc. when in play mode maybe ? +void *vid_get_viewport_fb_d() +{ + return (void*)(*(int*) (0x2c20+0x58)); // @FF87822C, FF878264 - ok +} + + +void JogDial_CW(void){ + _PostLogicalEventForNotPowerType(0x874, 2); // RotateJogDialRight +} + + +void JogDial_CCW(void){ + _PostLogicalEventForNotPowerType(0x875, 2); // RotateJogDialLeft +} + + +char *camera_jpeg_count_str() +{ + return (char*) 0xBBC9C; // @FFA3ACC4 - ok +} + + +long vid_get_bitmap_screen_width() +{ + return 320; +} + + +long vid_get_bitmap_screen_height() +{ + return 240; +} + + +int vid_get_viewport_width() +{ + return 720; +} + + +long vid_get_viewport_height() +{ + return 240; + +} + + +// used when drawing to lcd +long vid_get_bitmap_buffer_width() +{ + return 960; +} + + +long vid_get_bitmap_buffer_height() +{ + return 270; +} + Index: /trunk/platform/s95/sub/100k/movie_rec.c =================================================================== --- /trunk/platform/s95/sub/100k/movie_rec.c (revision 1215) +++ /trunk/platform/s95/sub/100k/movie_rec.c (revision 1215) @@ -0,0 +1,554 @@ +#include "conf.h" + +int *video_quality = &conf.video_quality; +int *video_mode = &conf.video_mode; + + +/*---------------------------------------------------------------------- + set_quality() +-----------------------------------------------------------------------*/ +void set_quality (int *x) // -17 highest; +12 lowest +{ + if (conf.video_mode) + *x = 12 - ((conf.video_quality-1) * (12+17) / (99-1)); +} + + +/*---------------------------------------------------------------------- + change_video_tables() +-----------------------------------------------------------------------*/ +void change_video_tables(int a, int b) +{ +} + + +/*---------------------------------------------------------------------- + movie_record_task() 0xFF98642C +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) movie_record_task() +{ + asm volatile ( +" STMFD SP!, {R2-R8,LR} \n" + +" LDR R8, =0x2710 \n" +" LDR R4, =0x7128 \n" +" MOV R7, #1 \n" +" LDR R6, =0xFF98611C \n" +" MOV R5, #0 \n" +"loc_FF986444:\n" +" LDR R0, [R4, #0x24] \n" +" MOV R2, #0 \n" +" ADD R1, SP, #4 \n" +" BL sub_FF83A2F8 \n" +" LDR R0, [R4, #0x2C] \n" +" CMP R0, #0 \n" +" LDRNE R0, [R4, #0xC] \n" +" CMPNE R0, #2 \n" +" LDRNE R0, [R4, #0x44] \n" +" CMPNE R0, #6 \n" +" BNE loc_FF98655C \n" +" LDR R0, [SP, #4] \n" +" LDR R1, [R0] \n" +" SUB R1, R1, #2 \n" +" CMP R1, #0xA \n" +" ADDLS PC, PC, R1, LSL #2 \n" +" B loc_FF98655C \n" +" B loc_FF986510 \n" +" B loc_FF986530 \n" +" B loc_FF986540 \n" +" B loc_FF986548 \n" +" B loc_FF986518 \n" +" B loc_FF986550 \n" +" B loc_FF986520 \n" +" B loc_FF98655C \n" +" B loc_FF986558 \n" +" B loc_FF9864E0 \n" +" B loc_FF9864B4 \n" + +"loc_FF9864B4:\n" +" STR R5, [R4, #0x40] \n" +" STR R5, [R4, #0x30] \n" +" STR R5, [R4, #0x34] \n" +" STRH R5, [R4, #6] \n" +" STR R6, [R4, #0xB4] \n" +" LDR R0, [R4, #0xC] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R4, #0xC] \n" +" MOV R0, #6 \n" +" STR R0, [R4, #0x44] \n" +" B loc_FF9864FC \n" + +"loc_FF9864E0:\n" +" STR R5, [R4, #0x40] \n" +" STR R5, [R4, #0x30] \n" +" STR R6, [R4, #0xB4] \n" +" LDR R0, [R4, #0xC] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R4, #0xC] \n" +" STR R7, [R4, #0x44] \n" +"loc_FF9864FC:\n" +" LDR R2, =0xFF985334 \n" +" LDR R1, =0xB45D0 \n" + +//" LDR R0, =sub_FF985430 \n" +" LDR R0, =0xFF985430 \n" + +" BL sub_FF8530D0 \n" +" B loc_FF98655C \n" + +"loc_FF986510:\n" +" BL unlock_optical_zoom\n" // added to unlock the zoom +" BL sub_FF986244 \n" +" B loc_FF98655C \n" + +"loc_FF986518:\n" +//" BL sub_FF985B84 \n" +" BL sub_FF985B84_my \n" // patched +" B loc_FF98655C \n" + +"loc_FF986520:\n" +" LDR R1, [R0, #0x18] \n" +" LDR R0, [R0, #4] \n" +" BL sub_FFAF2B4C \n" +" B loc_FF98655C \n" + +"loc_FF986530:\n" +" LDR R0, [R4, #0x44] \n" +" CMP R0, #5 \n" +" STRNE R7, [R4, #0x34] \n" +" B loc_FF98655C \n" + +"loc_FF986540:\n" +" BL sub_FF9857CC \n" +" B loc_FF98655C \n" + +"loc_FF986548:\n" +" BL sub_FF98547C \n" +" B loc_FF98655C \n" + +"loc_FF986550:\n" +" BL sub_FF9852C0 \n" +" B loc_FF98655C \n" + +"loc_FF986558:\n" +" BL sub_FF98698C \n" + +"loc_FF98655C:\n" +" LDR R1, [SP, #4] \n" +" MOV R3, #0x5F0 \n" +" STR R5, [R1] \n" +" STR R3, [SP] \n" +" LDR R0, [R4, #0x28] \n" +" LDR R3, =0xFF985124 \n" +" MOV R2, R8 \n" +" BL sub_FF83AC4C \n" +" B loc_FF986444 \n" + ); +} + +/*---------------------------------------------------------------------- + sub_FF985B84_my() +-----------------------------------------------------------------------*/ +void __attribute__((naked,noinline)) sub_FF985B84_my() +{ + asm volatile ( +" STMFD SP!, {R4-R11,LR} \n" +" SUB SP, SP, #0x64 \n" +" MOV R8, #0 \n" +" LDR R6, =0x7128 \n" +" MOV R4, R0 \n" +" STR R8, [SP, #0x54] \n" +" STR R8, [SP, #0x4C] \n" +" LDR R0, [R6, #0x44] \n" +" MOV R11, #4 \n" +" CMP R0, #3 \n" +" STREQ R11, [R6, #0x44] \n" +" LDR R0, [R6, #0xB4] \n" +" MOV R9, #0 \n" +" MOV R7, #0 \n" +" MOV R5, #1 \n" +" BLX R0 \n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #6 \n" +" BEQ loc_FF985BE4 \n" +" LDR R1, [R6, #0xC] \n" +" CMP R1, #2 \n" +" BNE loc_FF985C04 \n" +" CMP R0, #5 \n" +" BEQ loc_FF985C7C \n" +"loc_FF985BE4:\n" +" LDR R1, =0x7F2 \n" +" MOV R7, #1 \n" +" LDR R0, =0xFF985124 \n" +" BL sub_FF81EB78 \n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #4 \n" +" MOVNE R5, #0 \n" +" B loc_FF985C0C \n" +"loc_FF985C04:\n" +" CMP R0, #4 \n" +" BNE loc_FF985C7C \n" +"loc_FF985C0C:\n" +" LDRH R0, [R6, #6] \n" +" CMP R0, #1 \n" +" LDREQ R1, =0x809 \n" +" LDREQ R0, =0xFF985124 \n" +" BLEQ sub_FF81EB78 \n" +" LDRH R0, [R6, #6] \n" +" CMP R0, #3 \n" +" BNE loc_FF985C40 \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R1, [R6, #0xB8] \n" +" BL sub_FFBA18B4 \n" +" CMP R1, #0 \n" +" MOVNE R5, #0 \n" +"loc_FF985C40:\n" +" LDR R0, [R6, #0x44] \n" +" CMP R0, #6 \n" +" CMPNE R0, #1 \n" +" CMPNE R0, #3 \n" +" BNE loc_FF985C84 \n" +" CMP R7, #1 \n" +" CMPEQ R5, #0 \n" +" BNE loc_FF985C84 \n" +" LDR R0, [R6, #0x18] \n" +" MOV R1, #0x3E8 \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BNE loc_FF9860A4 \n" +" MOV R0, #0x90000 \n" +" BL sub_FF89D31C \n" +"loc_FF985C7C:\n" +" ADD SP, SP, #0x64 \n" +" LDMFD SP!, {R4-R11,PC} \n" +"loc_FF985C84:\n" +" CMP R5, #1 \n" +" MOV R10, #1 \n" +" BNE loc_FF985CAC \n" +" ADD R3, SP, #0x4C \n" +" ADD R2, SP, #0x50 \n" +" ADD R1, SP, #0x54 \n" +" ADD R0, SP, #0x58 \n" +" BL sub_FFAF2C0C \n" +" MOVS R9, R0 \n" +" BNE loc_FF985CC8 \n" +"loc_FF985CAC:\n" +" LDR R0, [R6, #0x34] \n" +" CMP R0, #1 \n" +" BNE loc_FF985E24 \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R1, [R6, #0x48] \n" +" CMP R0, R1 \n" +" BCC loc_FF985E24 \n" +"loc_FF985CC8:\n" +" CMP R9, #0x80000001 \n" +" STREQ R11, [R6, #0x70] \n" +" BEQ loc_FF985D00 \n" +" CMP R9, #0x80000003 \n" +" STREQ R10, [R6, #0x70] \n" +" BEQ loc_FF985D00 \n" +" CMP R9, #0x80000005 \n" +" MOVEQ R0, #2 \n" +" BEQ loc_FF985CFC \n" +" CMP R9, #0x80000007 \n" +" STRNE R8, [R6, #0x70] \n" +" BNE loc_FF985D00 \n" +" MOV R0, #3 \n" +"loc_FF985CFC:\n" +" STR R0, [R6, #0x70] \n" +"loc_FF985D00:\n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" BNE loc_FF985D68 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B78 \n" +" BL sub_FFAAD410 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" MVN R3, #1 \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R0, =0xB4618 \n" +" MOV R3, #0 \n" +" MOV R2, #0 \n" +" MOV R1, #0x40 \n" +" BL sub_FFAAD368 \n" +" B loc_FF985DBC \n" +"loc_FF985D60:\n" +" MOV R1, #1 \n" +" B loc_FF986030 \n" +"loc_FF985D68:\n" +" BL loc_FF986A38 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" MVN R1, #1 \n" +" MOV R0, #0 \n" +" ADD R5, SP, #0x1C \n" +" STMIA R5, {R0-R3} \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R4, SP, #0xC \n" +" ADD R0, SP, #0x60 \n" +" STMIA R4, {R0-R3} \n" +" MOV R3, #0 \n" +" MOV R1, #0x40 \n" +" MOV R2, #0 \n" +" STMEA SP, {R1-R3} \n" +" LDR R3, =0xB4618 \n" +" MOV R1, #0 \n" +" MOV R0, #0 \n" +" BL sub_FFAAC1D8 \n" +"loc_FF985DBC:\n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BEQ loc_FF985DE4 \n" +"loc_FF985DDC:\n" +" MOV R1, #1 \n" +" B loc_FF986048 \n" +"loc_FF985DE4:\n" +" LDR R0, [R6, #0xC] \n" +" MOV R4, #5 \n" +" CMP R0, #2 \n" +" MOV R0, #1 \n" +" BNE loc_FF985E10 \n" +" BL sub_FFAAD3D0 \n" +" BL sub_FFAAD3F8 \n" +" STR R4, [R6, #0x44] \n" +" BL loc_FF986A38 \n" +" STR R10, [R6, #0x44] \n" +" B loc_FF985E1C \n" +"loc_FF985E10:\n" +" BL sub_FFAAC28C \n" +" BL sub_FFAAC2EC \n" +" STR R4, [R6, #0x44] \n" +"loc_FF985E1C:\n" +" STR R8, [R6, #0x34] \n" +" B loc_FF985C7C \n" +"loc_FF985E24:\n" +" CMP R5, #1 \n" +" BNE loc_FF9860A4 \n" +" STR R10, [R6, #0x38] \n" +" LDR R0, [R6, #0x6C] \n" +" LDR R11, [R4, #0xC] \n" +" CMP R0, #0 \n" +" LDRNE R9, [SP, #0x58] \n" +" LDRNE R10, [SP, #0x54] \n" +" BNE loc_FF985F6C \n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" BNE loc_FF985EC8 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B78 \n" +" BL sub_FFAAD410 \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" MVN R3, #0 \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R0, [SP, #0x58] \n" +" LDR R1, [SP, #0x54] \n" +" LDR R2, [SP, #0x50] \n" +" LDR R3, [SP, #0x4C] \n" +" BL sub_FFAAD368 \n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +" MOV R1, #0 \n" +" LDR R0, =0xFF985B6C \n" +" BL sub_FFAAD410 \n" +" B loc_FF985F30 \n" +"loc_FF985EC8:\n" +" LDR R0, [R4, #0x20] \n" +" LDR R2, [R6, #0x64] \n" +" ADD R3, SP, #0x5C \n" +" MVN R1, #0 \n" +" ADD R9, SP, #0x1C \n" +" STMIA R9, {R0-R3} \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R0, SP, #0x60 \n" +" ADD R9, SP, #0xC \n" +" STMIA R9, {R0-R3} \n" +" LDR R1, [SP, #0x50] \n" +" LDR R2, [SP, #0x54] \n" +" LDR R3, [SP, #0x4C] \n" +" STMFA SP, {R1,R3} \n" +" STR R2, [SP] \n" +" LDMIB R4, {R0,R1} \n" +" LDR R3, [SP, #0x58] \n" +" MOV R2, R11 \n" +" BL sub_FFAAC1D8 \n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BEQ loc_FF985D60 \n" +"loc_FF985F30:\n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BNE loc_FF985DDC \n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" MOV R0, #1 \n" +" BNE loc_FF985F54 \n" +" BL sub_FFAAD3D0 \n" +" B loc_FF985F58 \n" +"loc_FF985F54:\n" +" BL sub_FFAAC28C \n" +"loc_FF985F58:\n" +" LDR R0, [SP, #0x60] \n" +" LDR R1, [SP, #0x58] \n" +" ADD R9, R1, R0 \n" +" LDR R1, [SP, #0x54] \n" +" SUB R10, R1, R0 \n" +"loc_FF985F6C:\n" +" LDR R0, [R6, #0xC] \n" +" LDR R2, [R6, #0x64] \n" +" CMP R0, #2 \n" +" ADD R3, SP, #0x5C \n" +" BNE loc_FF985FC0 \n" +" STRD R2, [SP, #0x28] \n" +" MOV R2, #0x18 \n" +" ADD R1, SP, #0x34 \n" +" ADD R0, SP, #0x10 \n" +" BL sub_FFB9F254 \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" LDR R3, [R6, #0x68] \n" +" ADD R0, SP, #0x60 \n" +" STMEA SP, {R0-R3} \n" +" LDR R2, [SP, #0x50] \n" +" LDR R3, [SP, #0x4C] \n" +" MOV R1, R10 \n" +" MOV R0, R9 \n" +" BL sub_FFAAD368 \n" +" B loc_FF986018 \n" +"loc_FF985FC0:\n" +" LDR R1, [R6, #0x68] \n" +" LDR R0, [R4, #0x20] \n" +" STR R1, [SP, #0x20] \n" +" STR R0, [SP, #0x1C] \n" +" STR R2, [SP, #0x24] \n" +" STR R3, [SP, #0x28] \n" +" LDR R3, [R4, #0x1C] \n" +" LDR R1, [R6, #0x84] \n" +" LDR R2, [R6, #0x88] \n" +" ADD R0, SP, #0x60 \n" +" STR R2, [SP, #0x14] \n" +" LDR R2, [SP, #0x50] \n" +" STR R1, [SP, #0x10] \n" +" STR R3, [SP, #0x18] \n" +" LDR R3, [SP, #0x4C] \n" +" STR R0, [SP, #0xC] \n" +" STMFA SP, {R2,R3} \n" +" STR R10, [SP] \n" +" LDMIB R4, {R0,R1} \n" +" MOV R3, R9 \n" +" MOV R2, R11 \n" +" BL sub_FFAAC1D8 \n" +"loc_FF986018:\n" +" LDR R0, [R6, #0x18] \n" +" LDR R1, [R6, #0x60] \n" +" BL sub_FF83A714 \n" +" CMP R0, #9 \n" +" BNE loc_FF986038 \n" +" MOV R1, #0 \n" +"loc_FF986030:\n" +" MOV R0, #0x90000 \n" +" B loc_FF98604C \n" +"loc_FF986038:\n" +" LDR R0, [SP, #0x5C] \n" +" CMP R0, #0 \n" +" BEQ loc_FF986054 \n" +" MOV R1, #0 \n" +"loc_FF986048:\n" +" MOV R0, #0xA0000 \n" +"loc_FF98604C:\n" +" BL sub_FF985B0C \n" +" B loc_FF985C7C \n" +"loc_FF986054:\n" +" LDR R0, [R6, #0xC] \n" +" CMP R0, #2 \n" +" MOV R0, #0 \n" +" BNE loc_FF98606C \n" +" BL sub_FFAAD3D0 \n" +" B loc_FF986070 \n" +"loc_FF98606C:\n" +" BL sub_FFAAC28C \n" +"loc_FF986070:\n" +" LDR R0, [SP, #0x58] \n" +" LDR R1, [SP, #0x60] \n" +" BL sub_FFAF2E44 \n" +" LDR R0, [R6, #0x68] \n" +" LDR R3, =0x71B0 \n" +" ADD R1, R0, #1 \n" +" STR R1, [R6, #0x68] \n" +" STR R3, [SP] \n" +" LDR R0, [R6, #0x64] \n" +" SUB R3, R3, #4 \n" +" AND R2, R0, #0xFF \n" +" LDR R0, [SP, #0x60] \n" +" BL sub_FFAF098C \n" +" LDR R0, =0x71AC \n" // added (71b0 - 4) +" BL set_quality \n" // added +"loc_FF9860A4:\n" +" CMP R5, #1 \n" +" LDRNEH R0, [R6, #6] \n" +" CMPNE R0, #3 \n" +" BNE loc_FF985C7C \n" +" LDR R0, [R6, #0x6C] \n" +" ADD R0, R0, #1 \n" +" STR R0, [R6, #0x6C] \n" +" LDRH R1, [R6, #6] \n" +" CMP R1, #3 \n" +" LDRNE R1, [R6, #0x54] \n" +" LDREQ R1, =0x3E9 \n" +" MUL R0, R1, R0 \n" +" LDREQ R1, =0x1770 \n" +" LDRNE R1, [R6, #0x50] \n" +" BL sub_FFBA18B4 \n" +" MOV R4, R0 \n" +" BL sub_FFAF31C0 \n" +" LDR R0, [R6, #0x8C] \n" +" CMP R0, R4 \n" +" BNE loc_FF986100 \n" +" LDR R0, [R6, #0x3C] \n" +" CMP R0, #1 \n" +" BNE loc_FF986114 \n" +"loc_FF986100:\n" +" LDR R1, [R6, #0x98] \n" +" MOV R0, R4 \n" +" BLX R1 \n" +" STR R4, [R6, #0x8C] \n" +" STR R8, [R6, #0x3C] \n" +"loc_FF986114:\n" +" STR R8, [R6, #0x38] \n" +" B loc_FF985C7C \n" + +"loc_FF986A38: \n" +" B sub_FF986A38 \n" + ); +} Index: /trunk/platform/s95/sub/100k/stubs_auto.S =================================================================== --- /trunk/platform/s95/sub/100k/stubs_auto.S (revision 1215) +++ /trunk/platform/s95/sub/100k/stubs_auto.S (revision 1215) @@ -0,0 +1,226 @@ +/* THIS FILE IS GENERATED */ +/* DO NOT EDIT THIS FILE! */ + +#include "stubs_asm.h" + +STUB(FF810354) +STUB(FF810B20) +STUB(FF811198) +STUB(FF81167C) +STUB(FF81177C) +STUB(FF8134B8) +STUB(FF813CA4) +STUB(FF815B1C) +STUB(FF815C04) +STUB(FF815FD4) +STUB(FF816594) +STUB(FF8166B4) +STUB(FF819CC4) +STUB(FF81A33C) +STUB(FF81E8A0) +STUB(FF81EB30) +STUB(FF81EB78) +STUB(FF81FB54) +STUB(FF831888) +STUB(FF832484) +STUB(FF8324B8) +STUB(FF833278) +STUB(FF8332B4) +STUB(FF833318) +STUB(FF833968) +STUB(FF8339B4) +STUB(FF833D5C) +STUB(FF833F4C) +STUB(FF8345B0) +STUB(FF8346C8) +STUB(FF8346CC) +STUB(FF8346D0) +STUB(FF8346D4) +STUB(FF835830) +STUB(FF836030) +STUB(FF8360B8) +STUB(FF837C6C) +STUB(FF837D14) +STUB(FF83A068) +STUB(FF83A2F8) +STUB(FF83A714) +STUB(FF83A8C4) +STUB(FF83AA4C) +STUB(FF83AAB8) +STUB(FF83AB0C) +STUB(FF83AC4C) +STUB(FF83AD0C) +STUB(FF83B1AC) +STUB(FF83B290) +STUB(FF83C478) +STUB(FF83C6B0) +STUB(FF83C6F4) +STUB(FF83C788) +STUB(FF83C8E0) +STUB(FF83C910) +STUB(FF83CA88) +STUB(FF83CA8C) +STUB(FF83CAA4) +STUB(FF83D670) +STUB(FF8530D0) +STUB(FF865BC0) +STUB(FF865C10) +STUB(FF865C2C) +STUB(FF871B80) +STUB(FF8756DC) +STUB(FF8757DC) +STUB(FF875944) +STUB(FF8759D4) +STUB(FF875DCC) +STUB(FF875E5C) +STUB(FF875EE0) +STUB(FF87607C) +STUB(FF8761C0) +STUB(FF8763F0) +STUB(FF876518) +STUB(FF876568) +STUB(FF876598) +STUB(FF876C3C) +STUB(FF87EFF8) +STUB(FF880B34) +STUB(FF8811F8) +STUB(FF88366C) +STUB(FF8839B4) +STUB(FF8839BC) +STUB(FF8839C4) +STUB(FF8839D4) +STUB(FF883BBC) +STUB(FF883C28) +STUB(FF883CB8) +STUB(FF883EC4) +STUB(FF883F6C) +STUB(FF88402C) +STUB(FF884350) +STUB(FF884490) +STUB(FF884614) +STUB(FF884968) +STUB(FF8849CC) +STUB(FF886FE4) +STUB(FF887070) +STUB(FF88708C) +STUB(FF8870CC) +STUB(FF8874EC) +STUB(FF887670) +STUB(FF889040) +STUB(FF88E040) +STUB(FF88E124) +STUB(FF88E1E4) +STUB(FF88E218) +STUB(FF890D90) +STUB(FF890EE0) +STUB(FF8947BC) +STUB(FF894834) +STUB(FF896414) +STUB(FF896CE0) +STUB(FF896D0C) +STUB(FF89AAD4) +STUB(FF89CBCC) +STUB(FF89CCA4) +STUB(FF89D31C) +STUB(FF8BD05C) +STUB(FF8BD2E4) +STUB(FF8BD350) +STUB(FF8BD5E0) +STUB(FF8BDAA0) +STUB(FF8BDB28) +STUB(FF8BDD58) +STUB(FF8BE1EC) +STUB(FF8C5F98) +STUB(FF8CB038) +STUB(FF8CB148) +STUB(FF8CB1A0) +STUB(FF8CB1F8) +STUB(FF8CB250) +STUB(FF8CB2D4) +STUB(FF8CB43C) +STUB(FF8CB4F4) +STUB(FF8CB790) +STUB(FF8CB9B8) +STUB(FF8CBC90) +STUB(FF8CBEA8) +STUB(FF8CC1CC) +STUB(FF8CC314) +STUB(FF8CC720) +STUB(FF8CC948) +STUB(FF8CCD94) +STUB(FF8CCE98) +STUB(FF8CD134) +STUB(FF8CD314) +STUB(FF8CD548) +STUB(FF8CD6B8) +STUB(FF8CD8C0) +STUB(FF8CDB2C) +STUB(FF8CEEA4) +STUB(FF8CF0F8) +STUB(FF8CF158) +STUB(FF8D053C) +STUB(FF8D05E8) +STUB(FF8D0604) +STUB(FF8D0648) +STUB(FF8D0750) +STUB(FF8D0804) +STUB(FF8D08AC) +STUB(FF8D0950) +STUB(FF90988C) +STUB(FF9162BC) +STUB(FF95D878) +STUB(FF95D914) +STUB(FF96A8E8) +STUB(FF97D684) +STUB(FF97D9D0) +STUB(FF97E014) +STUB(FF9852C0) +STUB(FF98547C) +STUB(FF9857CC) +STUB(FF985B0C) +STUB(FF985B84) +STUB(FF986244) +STUB(FF98698C) +STUB(FF986A38) +STUB(FF989FFC) +STUB(FF98A208) +STUB(FF98A2A0) +STUB(FF98A38C) +STUB(FF98A484) +STUB(FF98A548) +STUB(FF98A6C0) +STUB(FF98A764) +STUB(FF98A844) +STUB(FF98A97C) +STUB(FF98A9E0) +STUB(FF98ACEC) +STUB(FF98AEC0) +STUB(FF98AF28) +STUB(FF98B498) +STUB(FF98B6D0) +STUB(FF98B800) +STUB(FF98BCA8) +STUB(FF98C1D0) +STUB(FF98C2A0) +STUB(FF98C2D8) +STUB(FFA50D94) +STUB(FFAAC1D8) +STUB(FFAAC28C) +STUB(FFAAC2EC) +STUB(FFAAD368) +STUB(FFAAD3D0) +STUB(FFAAD3F8) +STUB(FFAAD410) +STUB(FFAF098C) +STUB(FFAF2B4C) +STUB(FFAF2C0C) +STUB(FFAF2E44) +STUB(FFAF31C0) +STUB(FFAF90A4) +STUB(FFAF91B0) +STUB(FFAF94C4) +STUB(FFAF99B8) +STUB(FFB9F0EC) +STUB(FFB9F254) +STUB(FFB9F348) +STUB(FFBA18B4) Index: /trunk/platform/s95/sub/100k/Makefile =================================================================== --- /trunk/platform/s95/sub/100k/Makefile (revision 1215) +++ /trunk/platform/s95/sub/100k/Makefile (revision 1215) @@ -0,0 +1,6 @@ +topdir=../../../../ + +OBJS=boot.o stubs_min.o stubs_auto.o stubs_entry.o lib.o stubs_entry_2.o capt_seq.o movie_rec.o +STUBS_AUTO_DEPS=boot.c capt_seq.c movie_rec.c + +include $(topdir)platform/makefile_sub.inc Index: /trunk/makefile.inc =================================================================== --- /trunk/makefile.inc (revision 1214) +++ /trunk/makefile.inc (revision 1215) @@ -340,4 +340,7 @@ #PLATFORM=s95 #PLATFORMSUB=100i + +#PLATFORM=s95 +#PLATFORMSUB=100k #PLATFORM=ixus300_sd4000 Index: /trunk/Makefile =================================================================== --- /trunk/Makefile (revision 1214) +++ /trunk/Makefile (revision 1215) @@ -273,4 +273,5 @@ $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100h NO_INC_BUILD=1 firzipsub $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100i NO_INC_BUILD=1 firzipsub + $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100k NO_INC_BUILD=1 firzipsub #$(MAKE) -s --no-print-directory PLATFORM=ixus300_sd4000 PLATFORMSUB=100d NO_INC_BUILD=1 firzipsub @echo "**** All firmwares created successfully" @@ -323,4 +324,5 @@ mv $(topdir)bin/$(VER)-s95-100h-$(BUILD_NUMBER).zip $(topdir)bin/s95-100h-$(BUILD_NUMBER)_BETA.zip mv $(topdir)bin/$(VER)-s95-100i-$(BUILD_NUMBER).zip $(topdir)bin/s95-100i-$(BUILD_NUMBER)_BETA.zip + mv $(topdir)bin/$(VER)-s95-100k-$(BUILD_NUMBER).zip $(topdir)bin/s95-100k-$(BUILD_NUMBER)_BETA.zip mv $(topdir)bin/$(VER)-ixus750_sd550-100h-$(BUILD_NUMBER).zip $(topdir)bin/$(VER)-ixus750_sd550-100h-$(BUILD_NUMBER)_BETA.zip mv $(topdir)bin/$(VER)-a490-100f-$(BUILD_NUMBER).zip $(topdir)bin/a490-100f-$(BUILD_NUMBER)_BETA.zip @@ -463,4 +465,5 @@ $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100h NO_INC_BUILD=1 firzipsubcomplete $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100i NO_INC_BUILD=1 firzipsubcomplete + $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100k NO_INC_BUILD=1 firzipsubcomplete #$(MAKE) -s --no-print-directory PLATFORM=ixus300_sd4000 PLATFORMSUB=100d NO_INC_BUILD=1 firzipsubcomplete @echo "**** All zipfiles including firmwares and extra stuff created successfully" @@ -560,4 +563,6 @@ mv $(topdir)bin/s95-100i-$(BUILD_NUMBER)-full.zip $(topdir)bin/s95-100i-$(BUILD_NUMBER)-full_BETA.zip mv $(topdir)bin/s95-100i-$(BUILD_NUMBER).zip $(topdir)bin/s95-100i-$(BUILD_NUMBER)_BETA.zip + mv $(topdir)bin/s95-100k-$(BUILD_NUMBER)-full.zip $(topdir)bin/s95-100k-$(BUILD_NUMBER)-full_BETA.zip + mv $(topdir)bin/s95-100k-$(BUILD_NUMBER).zip $(topdir)bin/s95-100k-$(BUILD_NUMBER)_BETA.zip mv $(topdir)bin/ixus750_sd550-100h-$(BUILD_NUMBER).zip $(topdir)bin/ixus750_sd550-100h-$(BUILD_NUMBER)_BETA.zip mv $(topdir)bin/ixus750_sd550-100h-$(BUILD_NUMBER)-full.zip $(topdir)bin/ixus750_sd550-100h-$(BUILD_NUMBER)-full_BETA.zip @@ -701,4 +706,5 @@ $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100h NO_INC_BUILD=1 clean $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100i NO_INC_BUILD=1 clean + $(MAKE) -s --no-print-directory PLATFORM=s95 PLATFORMSUB=100k NO_INC_BUILD=1 clean #$(MAKE) -s --no-print-directory PLATFORM=ixus300_sd4000 PLATFORMSUB=100d NO_INC_BUILD=1 clean .PHONY: fir upload