| 1 | #include "lolevel.h" |
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| 2 | #include "platform.h" |
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| 3 | #include "core.h" |
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| 4 | |
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| 5 | const char * const new_sa = &_end; |
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| 6 | |
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| 7 | void JogDial_task_my(void); |
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| 8 | |
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| 9 | void taskCreateHook3(int *p) { |
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| 10 | p-=17; |
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| 11 | if (p[0]==0xFF87CD40) p[0]=(int)capt_seq_task; |
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| 12 | if (p[0]==0xFF89A8CC) p[0]=(int)init_file_modules_task; |
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| 13 | if (p[0]==0xFF833088) p[0]=(int)mykbd_task; |
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| 14 | if (p[0]==0xFF8C1430) p[0]=(int)exp_drv_task; |
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| 15 | if (p[0]==0xff85f3cc) p[0]=(int)JogDial_task_my; |
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| 16 | if (p[0]==0xFF879034) p[0]=(int)movie_record_task; |
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| 17 | } |
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| 18 | void taskCreateHook2(int *p) { |
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| 19 | p-=17; |
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| 20 | if (p[0]==0xFF89A8CC) p[0]=(int)init_file_modules_task; |
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| 21 | if (p[0]==0xFF8C1430) p[0]=(int)exp_drv_task; |
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| 22 | } |
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| 23 | |
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| 24 | void CreateTask_spytask() { |
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| 25 | _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0); |
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| 26 | }; |
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| 27 | |
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| 28 | void __attribute__((naked,noinline)) boot() { |
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| 29 | asm volatile ( |
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| 30 | "LDR R1, =0xC0410000\n" |
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| 31 | "MOV R0, #0\n" |
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| 32 | "STR R0, [R1]\n" |
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| 33 | "MOV R1, #0x78\n" |
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| 34 | "MCR p15, 0, R1,c1,c0\n" |
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| 35 | "MOV R1, #0\n" |
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| 36 | "MCR p15, 0, R1,c7,c10, 4\n" |
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| 37 | "MCR p15, 0, R1,c7,c5\n" |
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| 38 | "MCR p15, 0, R1,c7,c6\n" |
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| 39 | "MOV R0, #0x3D\n" |
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| 40 | "MCR p15, 0, R0,c6,c0\n" |
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| 41 | "MOV R0, #0xC000002F\n" |
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| 42 | "MCR p15, 0, R0,c6,c1\n" |
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| 43 | "MOV R0, #0x33\n" |
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| 44 | "MCR p15, 0, R0,c6,c2\n" |
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| 45 | "MOV R0, #0x40000033\n" |
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| 46 | "MCR p15, 0, R0,c6,c3\n" |
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| 47 | "MOV R0, #0x80000017\n" |
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| 48 | "MCR p15, 0, R0,c6,c4\n" |
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| 49 | "LDR R0, =0xFF80002D\n" |
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| 50 | "MCR p15, 0, R0,c6,c5\n" |
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| 51 | "MOV R0, #0x34\n" |
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| 52 | "MCR p15, 0, R0,c2,c0\n" |
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| 53 | "MOV R0, #0x34\n" |
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| 54 | "MCR p15, 0, R0,c2,c0, 1\n" |
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| 55 | "MOV R0, #0x34\n" |
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| 56 | "MCR p15, 0, R0,c3,c0\n" |
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| 57 | "LDR R0, =0x3333330\n" |
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| 58 | "MCR p15, 0, R0,c5,c0, 2\n" |
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| 59 | "LDR R0, =0x3333330\n" |
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| 60 | "MCR p15, 0, R0,c5,c0, 3\n" |
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| 61 | "MRC p15, 0, R0,c1,c0\n" |
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| 62 | "ORR R0, R0, #0x1000\n" |
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| 63 | "ORR R0, R0, #4\n" |
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| 64 | "ORR R0, R0, #1\n" |
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| 65 | "MCR p15, 0, R0,c1,c0\n" |
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| 66 | "MOV R1, #0x80000006\n" |
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| 67 | "MCR p15, 0, R1,c9,c1\n" |
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| 68 | "MOV R1, #6\n" |
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| 69 | "MCR p15, 0, R1,c9,c1, 1\n" |
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| 70 | "MRC p15, 0, R1,c1,c0\n" |
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| 71 | "ORR R1, R1, #0x50000\n" |
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| 72 | "MCR p15, 0, R1,c1,c0\n" |
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| 73 | "LDR R2, =0xC0200000\n" |
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| 74 | "MOV R1, #1\n" |
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| 75 | "STR R1, [R2,#0x10C]\n" |
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| 76 | "MOV R1, #0xFF\n" |
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| 77 | "STR R1, [R2,#0xC]\n" |
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| 78 | "STR R1, [R2,#0x1C]\n" |
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| 79 | "STR R1, [R2,#0x2C]\n" |
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| 80 | "STR R1, [R2,#0x3C]\n" |
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| 81 | "STR R1, [R2,#0x4C]\n" |
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| 82 | "STR R1, [R2,#0x5C]\n" |
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| 83 | "STR R1, [R2,#0x6C]\n" |
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| 84 | "STR R1, [R2,#0x7C]\n" |
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| 85 | "STR R1, [R2,#0x8C]\n" |
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| 86 | "STR R1, [R2,#0x9C]\n" |
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| 87 | "STR R1, [R2,#0xAC]\n" |
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| 88 | "STR R1, [R2,#0xBC]\n" |
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| 89 | "STR R1, [R2,#0xCC]\n" |
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| 90 | "STR R1, [R2,#0xDC]\n" |
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| 91 | "STR R1, [R2,#0xEC]\n" |
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| 92 | "STR R1, [R2,#0xFC]\n" |
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| 93 | "LDR R1, =0xC0400008\n" |
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| 94 | "LDR R2, =0x430005\n" |
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| 95 | "STR R2, [R1]\n" |
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| 96 | "MOV R1, #1\n" |
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| 97 | "LDR R2, =0xC0243100\n" |
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| 98 | "STR R2, [R1]\n" |
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| 99 | "LDR R2, =0xC0242010\n" |
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| 100 | "LDR R1, [R2]\n" |
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| 101 | "ORR R1, R1, #1\n" |
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| 102 | "STR R1, [R2]\n" |
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| 103 | |
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| 104 | "LDR R0, =0xFFC0EFC4\n" //done |
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| 105 | "LDR R1, =0x1900\n" |
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| 106 | "LDR R3, =0xE7FC\n" |
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| 107 | "loc_FF81013C:\n" |
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| 108 | "CMP R1, R3\n" |
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| 109 | "LDRCC R2, [R0],#4\n" |
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| 110 | "STRCC R2, [R1],#4\n" |
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| 111 | "BCC loc_FF81013C\n" //checked |
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| 112 | "LDR R1, =0x13DD6C\n" |
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| 113 | "MOV R2, #0\n" |
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| 114 | "loc_FF810154:\n" |
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| 115 | "CMP R3, R1\n" |
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| 116 | "STRCC R2, [R3],#4\n" |
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| 117 | "BCC loc_FF810154\n" //checked |
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| 118 | "B sub_FF810354_my" // --> |
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| 119 | ); |
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| 120 | }; |
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| 121 | |
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| 122 | |
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| 123 | |
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| 124 | void __attribute__((naked,noinline)) sub_FF810354_my() { |
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| 125 | //http://chdk.setepontos.com/index.php/topic,4194.0.html |
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| 126 | *(int*)0x1934 = (int)taskCreateHook2; // this is inferred, but not actually tested |
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| 127 | *(int*)0x1938 = (int)taskCreateHook3; |
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| 128 | *(int*)(0x2564)= (*(int*)0xC0220134)&1 ? 0x2000000 : 0x1000000; // replacement of sub_FF8331CC for correct power-on. |
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| 129 | |
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| 130 | asm volatile ( |
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| 131 | "LDR R0, =0xFF8103CC\n" |
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| 132 | "MOV R1, #0\n" |
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| 133 | "LDR R3, =0xFF810404\n" |
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| 134 | "loc_FF810360:\n" |
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| 135 | "CMP R0, R3\n" |
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| 136 | "LDRCC R2, [R0],#4\n" |
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| 137 | "STRCC R2, [R1],#4\n" |
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| 138 | "BCC loc_FF810360\n" |
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| 139 | "LDR R0, =0xFF810404\n" |
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| 140 | "MOV R1, #0x4B0\n" |
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| 141 | "LDR R3, =0xFF810618\n" |
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| 142 | "loc_FF81037C:\n" |
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| 143 | "CMP R0, R3\n" |
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| 144 | "LDRCC R2, [R0],#4\n" |
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| 145 | "STRCC R2, [R1],#4\n" |
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| 146 | "BCC loc_FF81037C\n" |
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| 147 | "MOV R0, #0xD2\n" |
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| 148 | "MSR CPSR_cxsf, R0\n" |
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| 149 | "MOV SP, #0x1000\n" |
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| 150 | "MOV R0, #0xD3\n" |
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| 151 | "MSR CPSR_cxsf, R0\n" |
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| 152 | "MOV SP, #0x1000\n" |
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| 153 | "LDR R0, =0x6C4\n" |
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| 154 | "LDR R2, =0xEEEEEEEE\n" |
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| 155 | "MOV R3, #0x1000\n" |
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| 156 | "loc_FF8103B0:\n" |
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| 157 | "CMP R0, R3\n" |
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| 158 | "STRCC R2, [R0],#4\n" |
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| 159 | "BCC loc_FF8103B0\n" |
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| 160 | "BL sub_FF811178_my\n" // --> |
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| 161 | ); |
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| 162 | } |
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| 163 | |
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| 164 | void __attribute__((naked,noinline)) sub_FF811178_my() { |
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| 165 | |
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| 166 | // got here |
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| 167 | |
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| 168 | asm volatile ( |
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| 169 | "STR LR, [SP,#-4]!\n" |
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| 170 | "SUB SP, SP, #0x74\n" |
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| 171 | "MOV R0, SP\n" |
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| 172 | "MOV R1, #0x74\n" |
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| 173 | "BL sub_FFB36910\n" // changing this from sub_FFB36884, am i voodoing |
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| 174 | "MOV R0, #0x53000\n" |
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| 175 | "STR R0, [SP,#4]\n" |
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| 176 | // "LDR R0, =0x13DD20\n" // - |
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| 177 | "LDR R0, =new_sa\n" // + |
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| 178 | "LDR R0, [R0]\n" // + |
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| 179 | "LDR R2, =0x2F9C00\n" |
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| 180 | "LDR R1, =0x2F24A8\n" |
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| 181 | "STR R0, [SP,#8]\n" |
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| 182 | "SUB R0, R1, R0\n" |
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| 183 | "ADD R3, SP, #0xC\n" |
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| 184 | "STR R2, [SP]\n" |
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| 185 | "STMIA R3, {R0-R2}\n" |
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| 186 | "MOV R0, #0x22\n" |
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| 187 | "STR R0, [SP,#0x18]\n" |
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| 188 | "MOV R0, #0x68\n" |
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| 189 | "STR R0, [SP,#0x1C]\n" |
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| 190 | "LDR R0, =0x19B\n" |
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| 191 | "LDR R1, =sub_FF815E34_my\n" // --> |
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| 192 | "STR R0, [SP,#0x20]\n" |
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| 193 | "MOV R0, #0x96\n" |
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| 194 | "STR R0, [SP,#0x24]\n" |
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| 195 | "MOV R0, #0x78\n" |
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| 196 | "STR R0, [SP,#0x28]\n" |
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| 197 | "MOV R0, #0x64\n" |
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| 198 | "STR R0, [SP,#0x2C]\n" |
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| 199 | "MOV R0, #0\n" |
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| 200 | "STR R0, [SP,#0x30]\n" |
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| 201 | "STR R0, [SP,#0x34]\n" |
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| 202 | "MOV R0, #0x10\n" |
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| 203 | "STR R0, [SP,#0x5C]\n" |
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| 204 | "MOV R0, #0x800\n" |
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| 205 | "STR R0, [SP,#0x60]\n" |
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| 206 | "MOV R0, #0xA0\n" |
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| 207 | "STR R0, [SP,#0x64]\n" |
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| 208 | "MOV R0, #0x280\n" |
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| 209 | "STR R0, [SP,#0x68]\n" |
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| 210 | "MOV R0, SP\n" |
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| 211 | "MOV R2, #0\n" |
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| 212 | "BL sub_FF8133E4\n" |
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| 213 | "ADD SP, SP, #0x74\n" |
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| 214 | "LDR PC, [SP],#4\n" |
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| 215 | ); |
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| 216 | } |
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| 217 | |
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| 218 | void __attribute__((naked,noinline)) sub_FF815E34_my() { |
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| 219 | |
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| 220 | // got here |
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| 221 | |
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| 222 | asm volatile ( |
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| 223 | "STMFD SP!, {R4,LR}\n" |
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| 224 | "BL sub_FF810B08\n" |
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| 225 | "BL sub_FF81A148\n" |
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| 226 | "CMP R0, #0\n" |
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| 227 | "LDRLT R0, =0xFF815F48\n" // dmSetup |
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| 228 | "BLLT sub_FF815F28\n" |
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| 229 | "BL sub_FF815A70\n" |
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| 230 | "CMP R0, #0\n" |
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| 231 | "LDRLT R0, =0xFF815F50\n" // termDriverInit |
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| 232 | "BLLT sub_FF815F28\n" |
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| 233 | "LDR R0, =0xFF815F60\n" |
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| 234 | "BL sub_FF815B58\n" |
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| 235 | "CMP R0, #0\n" |
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| 236 | "LDRLT R0, =0xFF815F68\n" // termDeviceCreate |
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| 237 | "BLLT sub_FF815F28\n" |
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| 238 | "LDR R0, =0xFF815F60\n" |
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| 239 | "BL sub_FF813BE0\n" |
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| 240 | "CMP R0, #0\n" |
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| 241 | "LDRLT R0, =0xFF815F7C\n" // stdioSetup |
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| 242 | "BLLT sub_FF815F28\n" |
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| 243 | "BL sub_FF819B5C\n" |
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| 244 | "CMP R0, #0\n" |
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| 245 | "LDRLT R0, =0xFF815F88\n" // stdlibSetup |
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| 246 | "BLLT sub_FF815F28\n" |
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| 247 | "BL sub_FF81165C\n" |
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| 248 | "CMP R0, #0\n" |
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| 249 | "LDRLT R0, =0xFF815F94\n" // armlib_setup |
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| 250 | "BLLT sub_FF815F28\n" |
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| 251 | "LDMFD SP!, {R4,LR}\n" |
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| 252 | "B taskcreate_Startup_my\n" |
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| 253 | ); |
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| 254 | }; |
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| 255 | |
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| 256 | void __attribute__((naked,noinline)) taskcreate_Startup_my() { |
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| 257 | asm volatile ( |
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| 258 | "STMFD SP!, {R3,LR}\n" |
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| 259 | // "BL j_nullsub_234\n" |
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| 260 | "BL sub_FF83A634\n" |
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| 261 | "CMP R0, #0\n" |
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| 262 | "BNE loc_FF81F8A0\n" |
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| 263 | "BL sub_FF8331C0\n" |
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| 264 | "CMP R0, #0\n" |
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| 265 | "BNE loc_FF81F8A0\n" |
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| 266 | "BL sub_FF832894\n" |
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| 267 | "LDR R1, =0xC0220000\n" |
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| 268 | "MOV R0, #0x44\n" |
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| 269 | "STR R0, [R1,#0x1C]\n" |
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| 270 | "BL sub_FF832A80\n" |
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| 271 | "loc_FF81F89C:\n" |
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| 272 | "B loc_FF81F89C\n" |
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| 273 | "loc_FF81F8A0:\n" |
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| 274 | // "BL sub_FF8331CC\n" // see begin of sub_FF810354_my |
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| 275 | // "BL j_nullsub_235\n" |
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| 276 | "BL sub_FF8388E4\n" |
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| 277 | "LDR R1, =0x34E000\n" |
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| 278 | "MOV R0, #0\n" |
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| 279 | "BL sub_FF838D2C\n" |
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| 280 | "BL sub_FF838AD8\n" // KerSys |
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| 281 | "MOV R3, #0\n" |
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| 282 | "STR R3, [SP]\n" |
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| 283 | "LDR R3, =task_Startup_my\n" |
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| 284 | "MOV R2, #0\n" |
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| 285 | "MOV R1, #0x19\n" |
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| 286 | "LDR R0, =0xFF81F8E8\n" // Startup |
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| 287 | "BL sub_FF81E5B4\n" |
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| 288 | "MOV R0, #0\n" |
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| 289 | "LDMFD SP!, {R12,PC}\n" |
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| 290 | ); |
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| 291 | } |
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| 292 | |
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| 293 | void __attribute__((naked,noinline)) task_Startup_my() { |
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| 294 | asm volatile ( |
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| 295 | "STMFD SP!, {R4,LR}\n" |
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| 296 | "BL sub_FF816490\n" // taskcreate_ClockSave |
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| 297 | "BL sub_FF8342B4\n" |
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| 298 | "BL sub_FF832508\n" |
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| 299 | // "BL j_nullsub_238\n" |
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| 300 | "BL sub_FF83A858\n" |
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| 301 | // "BL sub_FF83A708\n" // start diskboot.bin |
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| 302 | "BL sub_FF83A9FC\n" |
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| 303 | "BL sub_FF83135C\n" |
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| 304 | "BL sub_FF83A888\n" |
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| 305 | "BL sub_FF838088\n" |
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| 306 | "BL sub_FF83AA00\n" |
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| 307 | "BL CreateTask_spytask\n" // + |
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| 308 | "BL sub_FF8330BC\n" // taskcreate_PhySw |
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| 309 | "BL sub_FF835F00\n" |
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| 310 | "BL sub_FF83AA18\n" |
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| 311 | // "BL nullsub_2\n" |
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| 312 | "BL sub_FF831EAC\n" |
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| 313 | "BL sub_FF83A40C\n" // taskcreate_Bye |
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| 314 | "BL sub_FF8324BC\n" |
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| 315 | "BL sub_FF831DC8\n" // LowBat |
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| 316 | "BL sub_FF831390\n" |
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| 317 | "BL sub_FF83B670\n" |
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| 318 | "BL sub_FF831DA0\n" |
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| 319 | "LDMFD SP!, {R4,LR}\n" |
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| 320 | "B sub_FF8165B0\n" // MLHClock |
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| 321 | ); |
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| 322 | } |
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| 323 | |
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| 324 | void __attribute__((naked,noinline)) init_file_modules_task() { |
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| 325 | asm volatile( |
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| 326 | "STMFD SP!, {R4-R6,LR}\n" |
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| 327 | "BL sub_FF88FB5C\n" |
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| 328 | "LDR R5, =0x5006\n" |
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| 329 | "MOVS R4, R0\n" |
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| 330 | "MOVNE R1, #0\n" |
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| 331 | "MOVNE R0, R5\n" |
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| 332 | "BLNE sub_FF894DF4\n" |
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| 333 | "BL sub_FF88FB88_my\n" //----------> sub_FF88FB88 (102b) |
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| 334 | //"BL sub_FF88FB88\n" |
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| 335 | "BL core_spytask_can_start\n" // CHDK: Set "it's-save-to-start"-Flag for spytask |
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| 336 | "CMP R4, #0\n" |
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| 337 | "MOVEQ R0, R5\n" |
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| 338 | "LDMEQFD SP!, {R4-R6,LR}\n" |
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| 339 | "MOVEQ R1, #0\n" |
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| 340 | "BEQ sub_FF894DF4\n" |
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| 341 | "LDMFD SP!, {R4-R6,PC}\n" |
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| 342 | ); |
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| 343 | } |
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| 344 | |
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| 345 | void __attribute__((naked,noinline)) sub_FF88FB88_my() { |
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| 346 | asm volatile( |
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| 347 | "STMFD SP!, {R4,LR}\n" |
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| 348 | "MOV R0, #3\n" |
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| 349 | "BL sub_FF86EDF4_my\n" //-----------> |
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| 350 | // "BL nullsub_212\n" |
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| 351 | "LDR R4, =0x3120\n" |
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| 352 | "LDR R0, [R4,#4]\n" |
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| 353 | "CMP R0, #0\n" |
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| 354 | "BNE loc_FF88FBC0\n" |
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| 355 | "BL sub_FF86E100\n" |
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| 356 | "BL sub_FF9326F8\n" |
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| 357 | "BL sub_FF86E100\n" |
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| 358 | "BL sub_FF86A42C\n" |
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| 359 | "BL sub_FF86E000\n" |
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| 360 | "BL sub_FF9327C0\n" |
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| 361 | "loc_FF88FBC0:\n" |
|---|
| 362 | "MOV R0, #1\n" |
|---|
| 363 | "STR R0, [R4]\n" |
|---|
| 364 | "LDMFD SP!, {R4,PC}\n" |
|---|
| 365 | ); |
|---|
| 366 | } |
|---|
| 367 | |
|---|
| 368 | void __attribute__((naked,noinline)) sub_FF86EDF4_my() { |
|---|
| 369 | asm volatile( |
|---|
| 370 | "STMFD SP!, {R4-R8,LR}\n" |
|---|
| 371 | "MOV R8, R0\n" |
|---|
| 372 | "BL sub_FF86ED74\n" |
|---|
| 373 | "LDR R1, =0x37280\n" |
|---|
| 374 | "MOV R6, R0\n" |
|---|
| 375 | "ADD R4, R1, R0,LSL#7\n" |
|---|
| 376 | "LDR R0, [R4,#0x6C]\n" |
|---|
| 377 | "CMP R0, #4\n" |
|---|
| 378 | "LDREQ R1, =0x804\n" |
|---|
| 379 | "LDREQ R0, =0xFF86E8C0\n" |
|---|
| 380 | "BLEQ sub_FF81E88C\n" |
|---|
| 381 | "MOV R1, R8\n" |
|---|
| 382 | "MOV R0, R6\n" |
|---|
| 383 | "BL sub_FF86E614\n" |
|---|
| 384 | "LDR R0, [R4,#0x38]\n" |
|---|
| 385 | "BL sub_FF86F410\n" |
|---|
| 386 | "CMP R0, #0\n" |
|---|
| 387 | "STREQ R0, [R4,#0x6C]\n" |
|---|
| 388 | "MOV R0, R6\n" |
|---|
| 389 | "BL sub_FF86E6A4\n" |
|---|
| 390 | "MOV R0, R6\n" |
|---|
| 391 | "BL sub_FF86EA28_my\n" |
|---|
| 392 | "MOV R5, R0\n" |
|---|
| 393 | "MOV R0, R6\n" |
|---|
| 394 | "BL sub_FF86EC50\n" |
|---|
| 395 | "LDR R6, [R4,#0x3C]\n" |
|---|
| 396 | "AND R7, R5, R0\n" |
|---|
| 397 | "CMP R6, #0\n" |
|---|
| 398 | "LDR R1, [R4,#0x38]\n" |
|---|
| 399 | "MOVEQ R0, #0x80000001\n" |
|---|
| 400 | "MOV R5, #0\n" |
|---|
| 401 | "BEQ loc_FF86EEA4\n" |
|---|
| 402 | "MOV R0, R1\n" |
|---|
| 403 | "BL sub_FF86E268\n" |
|---|
| 404 | "CMP R0, #0\n" |
|---|
| 405 | "MOVNE R5, #4\n" |
|---|
| 406 | "CMP R6, #5\n" |
|---|
| 407 | "ORRNE R0, R5, #1\n" |
|---|
| 408 | "BICEQ R0, R5, #1\n" |
|---|
| 409 | "CMP R7, #0\n" |
|---|
| 410 | "BICEQ R0, R0, #2\n" |
|---|
| 411 | "ORREQ R0, R0, #0x80000000\n" |
|---|
| 412 | "BICNE R0, R0, #0x80000000\n" |
|---|
| 413 | "ORRNE R0, R0, #2\n" |
|---|
| 414 | "loc_FF86EEA4:\n" |
|---|
| 415 | "CMP R8, #7\n" |
|---|
| 416 | "STR R0, [R4,#0x40]\n" |
|---|
| 417 | "LDMNEFD SP!, {R4-R8,PC}\n" |
|---|
| 418 | "MOV R0, R8\n" |
|---|
| 419 | "BL sub_FF86EDC4\n" |
|---|
| 420 | "CMP R0, #0\n" |
|---|
| 421 | "LDMEQFD SP!, {R4-R8,LR}\n" |
|---|
| 422 | "LDREQ R0, =0xFF86EEF0\n" |
|---|
| 423 | "BEQ sub_FF81175C\n" |
|---|
| 424 | "LDMFD SP!, {R4-R8,PC}\n" |
|---|
| 425 | ); |
|---|
| 426 | } |
|---|
| 427 | |
|---|
| 428 | void __attribute__((naked,noinline)) sub_FF86EA28_my() { |
|---|
| 429 | asm volatile( |
|---|
| 430 | "STMFD SP!, {R4-R6,LR}\n" |
|---|
| 431 | "MOV R5, R0\n" |
|---|
| 432 | "LDR R0, =0x37280\n" |
|---|
| 433 | "ADD R4, R0, R5,LSL#7\n" |
|---|
| 434 | "LDR R0, [R4,#0x6C]\n" |
|---|
| 435 | "TST R0, #2\n" |
|---|
| 436 | "MOVNE R0, #1\n" |
|---|
| 437 | "LDMNEFD SP!, {R4-R6,PC}\n" |
|---|
| 438 | "LDR R0, [R4,#0x38]\n" |
|---|
| 439 | "MOV R1, R5\n" |
|---|
| 440 | "BL sub_FF86E724_my\n" |
|---|
| 441 | "CMP R0, #0\n" |
|---|
| 442 | "LDRNE R0, [R4,#0x38]\n" |
|---|
| 443 | "MOVNE R1, R5\n" |
|---|
| 444 | "BLNE sub_FF86E8E4\n" |
|---|
| 445 | "LDR R2, =0x37300\n" |
|---|
| 446 | "ADD R1, R5, R5,LSL#4\n" |
|---|
| 447 | "LDR R1, [R2,R1,LSL#2]\n" |
|---|
| 448 | "CMP R1, #4\n" |
|---|
| 449 | "BEQ loc_FF86EA88\n" |
|---|
| 450 | "CMP R0, #0\n" |
|---|
| 451 | "LDMEQFD SP!, {R4-R6,PC}\n" |
|---|
| 452 | "MOV R0, R5\n" |
|---|
| 453 | "BL sub_FF86E2F8\n" |
|---|
| 454 | "loc_FF86EA88:\n" |
|---|
| 455 | "CMP R0, #0\n" |
|---|
| 456 | "LDRNE R1, [R4,#0x6C]\n" |
|---|
| 457 | "ORRNE R1, R1, #2\n" |
|---|
| 458 | "STRNE R1, [R4,#0x6C]\n" |
|---|
| 459 | "LDMFD SP!, {R4-R6,PC}\n" |
|---|
| 460 | ); |
|---|
| 461 | } |
|---|
| 462 | |
|---|
| 463 | void __attribute__((naked,noinline)) sub_FF86E724_my() { |
|---|
| 464 | asm volatile( |
|---|
| 465 | "STMFD SP!, {R4-R10,LR}\n" |
|---|
| 466 | "MOV R9, R0\n" |
|---|
| 467 | "LDR R0, =0x37280\n" |
|---|
| 468 | "MOV R8, #0\n" |
|---|
| 469 | "ADD R5, R0, R1,LSL#7\n" |
|---|
| 470 | "LDR R0, [R5,#0x3C]\n" |
|---|
| 471 | "MOV R7, #0\n" |
|---|
| 472 | "CMP R0, #7\n" |
|---|
| 473 | "MOV R6, #0\n" |
|---|
| 474 | "ADDLS PC, PC, R0,LSL#2\n" |
|---|
| 475 | "B loc_FF86E87C\n" |
|---|
| 476 | "loc_FF86E750: B loc_FF86E788\n" |
|---|
| 477 | "loc_FF86E754: B loc_FF86E770\n" |
|---|
| 478 | "loc_FF86E758: B loc_FF86E770\n" |
|---|
| 479 | "loc_FF86E75C: B loc_FF86E770\n" |
|---|
| 480 | "loc_FF86E760: B loc_FF86E770\n" |
|---|
| 481 | "loc_FF86E764: B loc_FF86E874\n" |
|---|
| 482 | "loc_FF86E768: B loc_FF86E770\n" |
|---|
| 483 | "loc_FF86E76C: B loc_FF86E770\n" |
|---|
| 484 | "loc_FF86E770:\n" |
|---|
| 485 | "MOV R2, #0\n" |
|---|
| 486 | "MOV R1, #0x200\n" |
|---|
| 487 | "MOV R0, #2\n" |
|---|
| 488 | "BL sub_FF889BD0\n" |
|---|
| 489 | "MOVS R4, R0\n" |
|---|
| 490 | "BNE loc_FF86E790\n" |
|---|
| 491 | "loc_FF86E788:\n" |
|---|
| 492 | "MOV R0, #0\n" |
|---|
| 493 | "LDMFD SP!, {R4-R10,PC}\n" |
|---|
| 494 | "loc_FF86E790:\n" |
|---|
| 495 | "LDR R12, [R5,#0x50]\n" |
|---|
| 496 | "MOV R3, R4\n" |
|---|
| 497 | "MOV R2, #1\n" |
|---|
| 498 | "MOV R1, #0\n" |
|---|
| 499 | "MOV R0, R9\n" |
|---|
| 500 | "BLX R12\n" |
|---|
| 501 | "CMP R0, #1\n" |
|---|
| 502 | "BNE loc_FF86E7BC\n" |
|---|
| 503 | "MOV R0, #2\n" |
|---|
| 504 | "BL sub_FF889D1C\n" |
|---|
| 505 | "B loc_FF86E788\n" |
|---|
| 506 | "loc_FF86E7BC:\n" |
|---|
| 507 | "LDR R1, [R5,#0x64]\n" |
|---|
| 508 | "MOV R0, R9\n" |
|---|
| 509 | "BLX R1\n" |
|---|
| 510 | |
|---|
| 511 | // "b my_blink\n" // TESTED OK! |
|---|
| 512 | "MOV R1, R4\n" // pointer to MBR in R1 |
|---|
| 513 | "BL mbr_read_dryos\n" // total sectors count in R0 before and after call |
|---|
| 514 | |
|---|
| 515 | // Start of DataGhost's FAT32 autodetection code |
|---|
| 516 | // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage |
|---|
| 517 | // According to the code below, we can use R1, R2, R3 and R12. |
|---|
| 518 | // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing |
|---|
| 519 | // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :) |
|---|
| 520 | "MOV R12, R4\n" // Copy the MBR start address so we have something to work with |
|---|
| 521 | "MOV LR, R4\n" // Save old offset for MBR signature |
|---|
| 522 | "MOV R1, #1\n" // Note the current partition number |
|---|
| 523 | "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet! |
|---|
| 524 | "dg_sd_fat32:\n" |
|---|
| 525 | "CMP R1, #4\n" // Did we already see the 4th partition? |
|---|
| 526 | "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything. |
|---|
| 527 | "ADD R12, R12, #0x10\n" // Second partition |
|---|
| 528 | "ADD R1, R1, #1\n" // Second partition for the loop |
|---|
| 529 | "dg_sd_fat32_enter:\n" |
|---|
| 530 | "LDRB R2, [R12, #0x1BE]\n" // Partition status |
|---|
| 531 | "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB) |
|---|
| 532 | "CMP R3, #0xB\n" // Is this a FAT32 partition? |
|---|
| 533 | "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then? |
|---|
| 534 | "BNE dg_sd_fat32\n" // No, it isn't. Loop again. |
|---|
| 535 | "CMP R2, #0x00\n" // It is, check the validity of the partition type |
|---|
| 536 | "CMPNE R2, #0x80\n" |
|---|
| 537 | "BNE dg_sd_fat32\n" // Invalid, go to next partition |
|---|
| 538 | // This partition is valid, it's the first one, bingo! |
|---|
| 539 | "MOV R4, R12\n" // Move the new MBR offset for the partition detection. |
|---|
| 540 | |
|---|
| 541 | "dg_sd_fat32_end:\n" |
|---|
| 542 | // End of DataGhost's FAT32 autodetection code |
|---|
| 543 | |
|---|
| 544 | "LDRB R1, [R4,#0x1C9]\n" |
|---|
| 545 | "LDRB R3, [R4,#0x1C8]\n" |
|---|
| 546 | "LDRB R12, [R4,#0x1CC]\n" |
|---|
| 547 | "MOV R1, R1,LSL#24\n" |
|---|
| 548 | "ORR R1, R1, R3,LSL#16\n" |
|---|
| 549 | "LDRB R3, [R4,#0x1C7]\n" |
|---|
| 550 | "LDRB R2, [R4,#0x1BE]\n" |
|---|
| 551 | //"LDRB LR, [R4,#0x1FF]\n" // a2k uncomment |
|---|
| 552 | |
|---|
| 553 | "ORR R1, R1, R3,LSL#8\n" |
|---|
| 554 | "LDRB R3, [R4,#0x1C6]\n" |
|---|
| 555 | "CMP R2, #0\n" |
|---|
| 556 | "CMPNE R2, #0x80\n" |
|---|
| 557 | "ORR R1, R1, R3\n" |
|---|
| 558 | "LDRB R3, [R4,#0x1CD]\n" |
|---|
| 559 | "MOV R3, R3,LSL#24\n" |
|---|
| 560 | "ORR R3, R3, R12,LSL#16\n" |
|---|
| 561 | "LDRB R12, [R4,#0x1CB]\n" |
|---|
| 562 | "ORR R3, R3, R12,LSL#8\n" |
|---|
| 563 | "LDRB R12, [R4,#0x1CA]\n" |
|---|
| 564 | "ORR R3, R3, R12\n" |
|---|
| 565 | // "LDRB R12, [R4,#0x1FE]\n" // - |
|---|
| 566 | "LDRB R12, [LR,#0x1FE]\n" // + First MBR signature byte (0x55), LR is original offset. |
|---|
| 567 | "LDRB LR, [LR,#0x1FF]\n" // + Last MBR signature byte (0xAA), LR is original offset. |
|---|
| 568 | |
|---|
| 569 | "BNE loc_FF86E848\n" |
|---|
| 570 | "CMP R0, R1\n" |
|---|
| 571 | "BCC loc_FF86E848\n" |
|---|
| 572 | "ADD R2, R1, R3\n" |
|---|
| 573 | "CMP R2, R0\n" |
|---|
| 574 | "CMPLS R12, #0x55\n" |
|---|
| 575 | "CMPEQ LR, #0xAA\n" |
|---|
| 576 | "MOVEQ R7, R1\n" |
|---|
| 577 | "MOVEQ R6, R3\n" |
|---|
| 578 | "MOVEQ R4, #1\n" |
|---|
| 579 | "BEQ loc_FF86E84C\n" |
|---|
| 580 | "loc_FF86E848:\n" |
|---|
| 581 | "MOV R4, R8\n" |
|---|
| 582 | "loc_FF86E84C:\n" |
|---|
| 583 | "MOV R0, #2\n" |
|---|
| 584 | "BL sub_FF889D1C\n" |
|---|
| 585 | "CMP R4, #0\n" |
|---|
| 586 | "BNE loc_FF86E888\n" |
|---|
| 587 | "LDR R1, [R5,#0x64]\n" |
|---|
| 588 | "MOV R7, #0\n" |
|---|
| 589 | "MOV R0, R9\n" |
|---|
| 590 | "BLX R1\n" |
|---|
| 591 | "MOV R6, R0\n" |
|---|
| 592 | "B loc_FF86E888\n" |
|---|
| 593 | "loc_FF86E874:\n" |
|---|
| 594 | "MOV R6, #0x40\n" |
|---|
| 595 | "B loc_FF86E888\n" |
|---|
| 596 | "loc_FF86E87C:\n" |
|---|
| 597 | "LDR R1, =0x568\n" |
|---|
| 598 | "LDR R0, =0xFF86E8C0\n" |
|---|
| 599 | "BL sub_FF81E88C\n" |
|---|
| 600 | "loc_FF86E888:\n" |
|---|
| 601 | "STR R7, [R5,#0x44]!\n" |
|---|
| 602 | "STMIB R5, {R6,R8}\n" |
|---|
| 603 | "MOV R0, #1\n" |
|---|
| 604 | "LDMFD SP!, {R4-R10,PC}\n" |
|---|
| 605 | ); |
|---|
| 606 | } |
|---|
| 607 | |
|---|
| 608 | |
|---|
| 609 | void __attribute__((naked,noinline)) JogDial_task_my() { |
|---|
| 610 | asm volatile( |
|---|
| 611 | "STMFD SP!, {R4-R11,LR}\n" |
|---|
| 612 | "SUB SP, SP, #0x24\n" |
|---|
| 613 | "ADD R0, SP, #0x4\n" |
|---|
| 614 | "BL sub_FF839094\n" |
|---|
| 615 | "BL sub_FF85F7DC\n" |
|---|
| 616 | "LDR R1, =0x2578\n" |
|---|
| 617 | "MOV R0, #0\n" |
|---|
| 618 | "ADD R3, SP, #0x18\n" |
|---|
| 619 | "ADD ip, SP, #0x1c\n" |
|---|
| 620 | "ADD R2, SP, #0x10\n" |
|---|
| 621 | "ADD R5, SP, #0x14\n" |
|---|
| 622 | "MOV R6, #0\n" |
|---|
| 623 | "loc_ff85f3fc:\n" |
|---|
| 624 | "ADD ip, sp, #0x1c\n" |
|---|
| 625 | "ADD lr, ip, r0, LSL#1\n" |
|---|
| 626 | "ADD R3, SP, #0x18\n" |
|---|
| 627 | "STRH r6, [LR]\n" |
|---|
| 628 | "ADD LR, R3, R0,LSL#1\n" |
|---|
| 629 | "ADD R5, SP, #0x14\n" |
|---|
| 630 | "STRH r6, [LR]\n" |
|---|
| 631 | "ADD R2, SP, #0x10\n" |
|---|
| 632 | "STR R6, [R5,R0,LSL#2]\n" |
|---|
| 633 | "STR R6, [R2,R0,LSL#2]\n" |
|---|
| 634 | "ADD R0, R0, #1\n" |
|---|
| 635 | "CMP R0, #1\n" |
|---|
| 636 | "BLT loc_ff85f3fc\n" |
|---|
| 637 | "loc_ff85f430:\n" |
|---|
| 638 | "LDR R0, =0x2578\n" |
|---|
| 639 | "MOV R2, #0\n" |
|---|
| 640 | "LDR R0, [R0,#12]\n" |
|---|
| 641 | "ADD R1, SP, #0x8\n" |
|---|
| 642 | "BL sub_FF838318\n" |
|---|
| 643 | "TST R0, #1\n" |
|---|
| 644 | "LDRNE R1, =0x226\n" |
|---|
| 645 | // watch out - ldrne r0, [absolute value] below is actually, addne r0, pc, [relative value] in the firmware |
|---|
| 646 | "LDRNE R0, =0xff85f70c\n" |
|---|
| 647 | "BLNE sub_FF81E88C\n" |
|---|
| 648 | "LDR R0, [SP,#0x8]\n" |
|---|
| 649 | // these ones are from: ff85f454 |
|---|
| 650 | "AND R4, R0, #0xFF\n" |
|---|
| 651 | "AND R0, R0, #0xFF00\n" |
|---|
| 652 | "CMP R0, #0x100\n" |
|---|
| 653 | "BEQ loc_ff85f4b4\n" |
|---|
| 654 | "CMP R0, #0x200\n" |
|---|
| 655 | "BEQ loc_ff85f4f0\n" |
|---|
| 656 | "CMP R0, #0x300\n" |
|---|
| 657 | "BEQ loc_ff85f754\n" |
|---|
| 658 | "CMP R0, #0x400\n" |
|---|
| 659 | "BNE loc_ff85f430\n" |
|---|
| 660 | "CMP R4, #0\n" |
|---|
| 661 | "LDRNE R1, =0x2CA\n" |
|---|
| 662 | "LDRNE R0, =0xff85f70c\n" |
|---|
| 663 | "BLNE sub_FF81E88C\n" |
|---|
| 664 | "LDR R2, =0xffb44ce8\n" |
|---|
| 665 | "ADD R0, R4, R4,LSL#2\n" |
|---|
| 666 | "LDR R1, [R2,R0,LSL#2]\n" |
|---|
| 667 | "STR R6, [R1]\n" |
|---|
| 668 | "add r0, r2, r0, lsl #2\n" |
|---|
| 669 | "ldr r0, [r0, #8]\n" |
|---|
| 670 | "MOV R1, #1\n" |
|---|
| 671 | "loc_ff85f4ac:\n" |
|---|
| 672 | "STR R1, [R0]\n" |
|---|
| 673 | "B loc_ff85f430\n" |
|---|
| 674 | "loc_ff85f4b4:\n" |
|---|
| 675 | //------------------ added code --------------------- |
|---|
| 676 | "labelA:\n" |
|---|
| 677 | "LDR R0, =jogdial_stopped\n" |
|---|
| 678 | "LDR R0, [R0]\n" |
|---|
| 679 | "CMP R0, #1\n" |
|---|
| 680 | "BNE labelB\n" |
|---|
| 681 | "MOV R0, #40\n" |
|---|
| 682 | "BL sub_FF838A6C\n" //sleep (address different, but code identical to SD980) |
|---|
| 683 | "B labelA\n" |
|---|
| 684 | "labelB:\n" |
|---|
| 685 | //------------------ original code ------------------ |
|---|
| 686 | "LDR R5, =0x258c\n" |
|---|
| 687 | "LDR R0, [R5,R4,LSL#2]\n" |
|---|
| 688 | "BL sub_FF8392B0\n" |
|---|
| 689 | "LDR R2, =0xff85f358\n" |
|---|
| 690 | "ADD R1, R2, #0\n" |
|---|
| 691 | "ORR R3, R4, #0x200\n" |
|---|
| 692 | "MOV R0, #0x28\n" |
|---|
| 693 | "BL sub_FF8391CC\n" |
|---|
| 694 | "TST R0, #1\n" |
|---|
| 695 | "add r1, sp, #16\n" |
|---|
| 696 | "CMPNE R0, #0x15\n" |
|---|
| 697 | "STR R0, [R1,R4,LSL#2]\n" |
|---|
| 698 | "BEQ loc_ff85f430\n" |
|---|
| 699 | "LDR R1, =0x23B\n" |
|---|
| 700 | "B loc_ff85f6fc\n" |
|---|
| 701 | "loc_ff85f4f0:\n" |
|---|
| 702 | "LDR R0, =0xffb44ce8\n" |
|---|
| 703 | "ADD R7, R4, R4,LSL#2\n" |
|---|
| 704 | "ADD R8, R0, R7, LSL#2\n" |
|---|
| 705 | "LDR R0, [R8,#4]\n" |
|---|
| 706 | "LDR R0, [R0]\n" |
|---|
| 707 | "ASR R2, R0, #16\n" |
|---|
| 708 | "ADD R0, SP, #0x1c\n" |
|---|
| 709 | "ADD R9, R0, R4,LSL#1\n" |
|---|
| 710 | "ADD R0, SP, #24\n" |
|---|
| 711 | "ADD SL, R0, R4, LSL#1\n" |
|---|
| 712 | "STRH R2, [R9]\n" |
|---|
| 713 | "LDRSH R3, [SL]\n" |
|---|
| 714 | "SUB R0, R2, R3\n" |
|---|
| 715 | "CMP R0, #0\n" |
|---|
| 716 | "BEQ loc_ff85f6ac\n" |
|---|
| 717 | "MOV R1, R0\n" |
|---|
| 718 | // these ones below are at: ff85f52c |
|---|
| 719 | "RSBLT R0, R0, #0\n" |
|---|
| 720 | "MOVLE R5, #0\n" |
|---|
| 721 | "MOVGT R5, #1\n" |
|---|
| 722 | "CMP R0, #0xFF\n" |
|---|
| 723 | "BLS loc_ff85f56c\n" |
|---|
| 724 | "CMP R1, #0\n" |
|---|
| 725 | "RSBLE R0, R3, #0xFF\n" |
|---|
| 726 | "ADDLE R0, R0, #0x7F00\n" |
|---|
| 727 | "ADDLE R0, R0, R2\n" |
|---|
| 728 | "RSBGT R0, R2, #0xFF\n" |
|---|
| 729 | "ADDGT R0, R0, #0x7F00\n" |
|---|
| 730 | "ADDGT R0, R0, R3\n" |
|---|
| 731 | "ADD R0, R0, #0x8000\n" |
|---|
| 732 | "ADD R0, R0, #1\n" |
|---|
| 733 | "EOR R5, R5, #1\n" |
|---|
| 734 | "loc_ff85f56c:\n" |
|---|
| 735 | "STR R0, [SP,#12]\n" |
|---|
| 736 | "MOV R0, SP\n" |
|---|
| 737 | "BL sub_FF839094\n" |
|---|
| 738 | "ldr r0, [sp, #4]\n" |
|---|
| 739 | "ldr r1, [sp]\n" |
|---|
| 740 | "ldr r2, [sp, #12]\n" |
|---|
| 741 | "sub r0, r1, r0\n" |
|---|
| 742 | "CMP R2, #1\n" |
|---|
| 743 | "BNE loc_ff85f5ac\n" |
|---|
| 744 | "LDR R2, =0x2578\n" |
|---|
| 745 | "ldr r2, [r2]\n" |
|---|
| 746 | "cmp r0, r2\n" |
|---|
| 747 | "strhi r1, [sp, #4]\n" |
|---|
| 748 | // ATTENTION - the two instructions below were ldrhhi and strhhi in the firmware!!! |
|---|
| 749 | "ldrhi r0, [r9]\n" |
|---|
| 750 | "strhi r0, [sl]\n" |
|---|
| 751 | "bhi loc_ff85f73c\n" |
|---|
| 752 | "loc_ff85f5ac:\n" |
|---|
| 753 | "add r0, sp, #20\n" |
|---|
| 754 | "ldr r0, [r0, r4, lsl #2]\n" |
|---|
| 755 | "cmp r0, #0\n" |
|---|
| 756 | "beq loc_ff85f60c\n" |
|---|
| 757 | "ldr r1, =0xffb44ce0\n" |
|---|
| 758 | "add r1, r1, r4, lsl #3\n" |
|---|
| 759 | "ldr r1, [r1, r5, lsl #2]\n" |
|---|
| 760 | "cmp r1, r0\n" |
|---|
| 761 | "beq loc_ff85f62c\n" |
|---|
| 762 | "LDR r1, =0xffb44cfc\n" |
|---|
| 763 | "add r0, r4, r4, lsl #1\n" |
|---|
| 764 | "add fp, r1, r0, lsl #2\n" |
|---|
| 765 | "str r0, [sp, #32]\n" |
|---|
| 766 | "ldrb r0, [fp, #9]\n" |
|---|
| 767 | "cmp r0, #1\n" |
|---|
| 768 | "ldreq r0, [fp, #4]\n" |
|---|
| 769 | "bleq sub_FF896B84\n" |
|---|
| 770 | "ldrb r1, [fp, #8]\n" |
|---|
| 771 | "ldr r0, =0xffb44cfc\n" |
|---|
| 772 | "cmp r1, #1\n" |
|---|
| 773 | "bne loc_ff85f62c\n" |
|---|
| 774 | "ldr r1, [sp, #32]\n" |
|---|
| 775 | "ldr r0, [r0, r1, lsl #2]\n" |
|---|
| 776 | "b loc_ff85f628\n" |
|---|
| 777 | "loc_ff85f60c:\n" |
|---|
| 778 | "LDR R2, =0xffb44cfc\n" |
|---|
| 779 | "add r0, r4, r4, lsl #1\n" |
|---|
| 780 | "add r1, r2, r0, lsl #2\n" |
|---|
| 781 | "ldrb r1, [r1, #8]\n" |
|---|
| 782 | "cmp r1, #1\n" |
|---|
| 783 | "bne loc_ff85f62c\n" |
|---|
| 784 | "ldr r0, [r2, r0, lsl #2]\n" |
|---|
| 785 | "loc_ff85f628:\n" |
|---|
| 786 | "bl sub_FF896B84\n" |
|---|
| 787 | "loc_ff85f62c:\n" |
|---|
| 788 | "LDR R0, =0xffb44ce0\n" |
|---|
| 789 | "ldr r1, [sp, #12]\n" |
|---|
| 790 | "add fp, r0, r4, lsl #3\n" |
|---|
| 791 | "ldr r0, [fp, r5, lsl #2]\n" |
|---|
| 792 | "bl sub_FF896AB4\n" |
|---|
| 793 | "ldr r0, [fp, r5, lsl #2]\n" |
|---|
| 794 | "add r1, sp, #20\n" |
|---|
| 795 | "str r0, [r1, r4, lsl #2]\n" |
|---|
| 796 | "ldrh r0, [r9]\n" |
|---|
| 797 | "strh r0, [sl]\n" |
|---|
| 798 | "add r0, sp, #4\n" |
|---|
| 799 | "bl sub_FF839094\n" |
|---|
| 800 | "LDR r2, =0xffb44cfc\n" |
|---|
| 801 | "add r0, r4, r4, lsl #1\n" |
|---|
| 802 | "add r0, r2, r0, lsl #2\n" |
|---|
| 803 | "ldrb r0, [r0, #9]\n" |
|---|
| 804 | "cmp r0, #1\n" |
|---|
| 805 | "bne loc_ff85f6ac\n" |
|---|
| 806 | "loc_ff85f674:\n" //hmmm not found in 102b code |
|---|
| 807 | "LDR r5, =0x258c\n" |
|---|
| 808 | "ldr r0, [r5, r4, lsl #2]\n" |
|---|
| 809 | "BL sub_FF8392B0\n" |
|---|
| 810 | "LDR R2, =0xff85f364\n" |
|---|
| 811 | "add r1, r2, #0\n" |
|---|
| 812 | "orr r3, r4, #0x300\n" |
|---|
| 813 | "mov r0, #500\n" |
|---|
| 814 | "bl sub_FF8391CC\n" |
|---|
| 815 | "tst r0, #1\n" |
|---|
| 816 | "cmpne r0, #21\n" |
|---|
| 817 | "str r0, [r5, r4, lsl #2]\n" |
|---|
| 818 | "ldrne r0, =0xff85f70c\n" |
|---|
| 819 | "movne r1, #676\n" |
|---|
| 820 | "blne sub_FF81E88C\n" |
|---|
| 821 | "loc_ff85f6ac:\n" |
|---|
| 822 | "LDR r2, =0xffb44cfc\n" |
|---|
| 823 | "add r0, r4, r4, lsl #1\n" |
|---|
| 824 | "add r0, r2, r0, lsl #2\n" |
|---|
| 825 | "ldrb r0, [r0, #10]\n" |
|---|
| 826 | "cmp r0, #1\n" |
|---|
| 827 | "bne loc_ff85f73c\n" |
|---|
| 828 | "ldr r0, =0x2578\n" |
|---|
| 829 | "ldr r0, [r0, #16]\n" |
|---|
| 830 | "cmp r0, #0\n" |
|---|
| 831 | "beq loc_ff85f73c\n" |
|---|
| 832 | "ldr r2, =0xff85f358\n" |
|---|
| 833 | "add r1, r2, #0\n" |
|---|
| 834 | "orr r3, r4, #1024\n" |
|---|
| 835 | "bl sub_FF8391CC\n" |
|---|
| 836 | "tst r0, #1\n" |
|---|
| 837 | "ldr r1, =0x10\n" |
|---|
| 838 | "cmpne r0, #21\n" |
|---|
| 839 | "str r0, [r1, r4, lsl #2]\n" |
|---|
| 840 | "beq loc_ff85f430\n" |
|---|
| 841 | "ldr r1, =0x2af\n" |
|---|
| 842 | "loc_ff85f6fc:\n" |
|---|
| 843 | "ldr r0, =0xff85f70c\n" |
|---|
| 844 | "bl sub_FF81E88C\n" |
|---|
| 845 | "b loc_ff85f430\n" |
|---|
| 846 | "loc_ff85f73c:\n" |
|---|
| 847 | "ldr r0, =0xffb44ce8\n" |
|---|
| 848 | "ldr r0, [r0, r7, lsl #2]\n" |
|---|
| 849 | "str r6, [r0]\n" |
|---|
| 850 | "ldr r0, [r8, #8]\n" |
|---|
| 851 | "mov r1, #1\n" |
|---|
| 852 | "b loc_ff85f4ac\n" |
|---|
| 853 | "loc_ff85f754:\n" |
|---|
| 854 | "add r5, sp, #20\n" |
|---|
| 855 | "ldr r0, [r5, r4, lsl #2]\n" |
|---|
| 856 | "cmp r0, #0\n" |
|---|
| 857 | "moveq r1, #700\n" |
|---|
| 858 | "ldreq r0, =0xff85f70c\n" |
|---|
| 859 | "bleq sub_FF81E88C\n" |
|---|
| 860 | "ldr r2, =0xffb44cfc\n" |
|---|
| 861 | "add r0, r4, r4, lsl #1\n" |
|---|
| 862 | "add r0, r2, r0, lsl #2\n" |
|---|
| 863 | "ldr r0, [r0, #4]\n" |
|---|
| 864 | "bl sub_FF896B84\n" |
|---|
| 865 | "str r6, [r5, r4, lsl #2]\n" |
|---|
| 866 | "b loc_ff85f430\n" |
|---|
| 867 | ); |
|---|
| 868 | } |
|---|
