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boot.c @ 790

Revision 790, 17.2 KB checked in by reyalp, 4 years ago (diff)

ixus970 updates from snc http://chdk.setepontos.com/index.php/topic,3246.120.html

added support for fw 1.00f
fixed mode_get
collapsed double str's back to strd's
minor cleanups to code and comments

Property svn:eol-style set to native

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4
5	const char * const new_sa = &_end;
6
7	void __attribute__((naked,noinline)) jogdial_task_my();
8
9	void taskCreateHook(int *p)
10	{
11	p-=16;
12	if (p[0]==0xFF821ACC) p[0]=(int)mykbd_task;
13	if (p[0]==0xFF842A40) p[0]=(int)jogdial_task_my;
14	if (p[0]==0xFF859F88) p[0]=(int)movie_record_task;
15	if (p[0]==0xFF85DFC0) p[0]=(int)capt_seq_task;
16	if (p[0]==0xFF878F08) p[0]=(int)init_file_modules_task;
17	if (p[0]==0xFF8B67E8) p[0]=(int)exp_drv_task;
18	}
19
20	void CreateTask_spytask()
21	{
22	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
23	}
24
25	void boot()
26	{
27	long canon_data_src = (void)0xFFB1E468;
28	long canon_data_dst = (void)0x1900;
29	long canon_data_len = 0xF164 - 0x1900; // data_end - data_start
30	long canon_bss_start = (void)0xF164; // just after data
31	long canon_bss_len = 0xCBD40 - 0xF164;
32
33	long i;
34
35	// enable caches and write buffer
36	asm volatile (
37	"MRC p15, 0, R0,c1,c0\n"
38	"ORR R0, R0, #0x1000\n"
39	"ORR R0, R0, #4\n"
40	"ORR R0, R0, #1\n"
41	"MCR p15, 0, R0,c1,c0\n"
42	:::"r0"
43	);
44
45	for(i=0;i<canon_data_len/4;i++)
46	canon_data_dst[i]=canon_data_src[i];
47
48	for(i=0;i<canon_bss_len/4;i++)
49	canon_bss_start[i]=0;
50
51	// Captain Hook
52	(int)0x1930 = (int)taskCreateHook;
53
54	// jump to init-sequence that follows the data-copy-routine
55	asm volatile ("B sub_FF8101A4_my\n");
56	}
57
58	void __attribute__((naked,noinline)) sub_FF8101A4_my()
59	{
60	asm volatile (
61	"LDR R0, =0xFF81021C\n" // exception handler code
62	"MOV R1, #0\n"
63	"LDR R3, =0xFF810254\n"
64
65	"loc_FF8101B0:\n"
66	"CMP R0, R3\n" // load exception vector
67	"LDRCC R2, [R0],#4\n"
68	"STRCC R2, [R1],#4\n"
69	"BCC loc_FF8101B0\n"
70	"LDR R0, =0xFF810254\n"
71	"MOV R1, #0x4B0\n"
72	"LDR R3, =0xFF810468\n"
73
74	"loc_FF8101CC:\n"
75	"CMP R0, R3\n" // copy IRQ handler to ITCM starting at 0x4b0, 532 bytes up to 0x6C4
76	"LDRCC R2, [R0],#4\n"
77	"STRCC R2, [R1],#4\n"
78	"BCC loc_FF8101CC\n"
79	"MOV R0, #0xD2\n"
80	"MSR CPSR_cxsf, R0\n" // set CPSR mode = IRQ, ints disabled
81	"MOV SP, #0x1000\n" // irq mode SP
82	"MOV R0, #0xD3\n"
83	"MSR CPSR_cxsf, R0\n" // set CPSR mode = Super, ints disabled
84	"MOV SP, #0x1000\n" // super mode SP
85	//"LDR R0, loc_FF810210\n"
86	"LDR R0, =0x6C4\n" // +
87	"LDR R2, =0xEEEEEEEE\n"
88	"MOV R3, #0x1000\n"
89
90	"loc_FF810200:\n"
91	"CMP R0, R3\n" // clear ITCM 0x6C4-end with EEEEEEEE
92	"STRCC R2, [R0],#4\n"
93	"BCC loc_FF810200\n"
94	"BL sub_FF810FA0_my\n" //------------->
95	);
96	}
97
98	void __attribute__((naked,noinline)) sub_FF810FA0_my()
99	{
100	asm volatile (
101	"STR LR, [SP,#-4]!\n"
102	"SUB SP, SP, #0x74\n"
103	"MOV R0, SP\n"
104	"MOV R1, #0x74\n"
105	"BL sub_FFAAD9B4\n"
106	"MOV R0, #0x53000\n"
107	"STR R0, [SP,#0x74-0x70]\n"
108	//"LDR R0, =0xCBD40\n"
109	"LDR R0, =new_sa\n" // +
110	"LDR R0, [R0]\n" // +
111	"LDR R2, =0x279C00\n"
112	"LDR R1, =0x272968\n"
113	"STR R0, [SP,#0x74-0x6C]\n"
114	"SUB R0, R1, R0\n"
115	"ADD R3, SP, #0x74-0x68\n"
116	"STR R2, [SP,#0x74-0x74]\n"
117	"STMIA R3, {R0-R2}\n"
118	"MOV R0, #0x22\n"
119	"STR R0, [SP,#0x74-0x5C]\n"
120	"MOV R0, #0x68\n"
121	"STR R0, [SP,#0x74-0x58]\n"
122	"LDR R0, =0x19B\n"
123	"MOV R1, #0x64\n"
124	"STRD R0, [SP,#0x74-0x54]\n"
125	"MOV R0, #0x78\n"
126	"STRD R0, [SP,#0x74-0x4C]\n"
127	"MOV R0, #0\n"
128	"STR R0, [SP,#0x74-0x44]\n"
129	"STR R0, [SP,#0x74-0x40]\n"
130	"MOV R0, #0x10\n"
131	"STR R0, [SP,#0x74-0x18]\n"
132	"MOV R0, #0x800\n"
133	"STR R0, [SP,#0x74-0x14]\n"
134	"MOV R0, #0xA0\n"
135	"STR R0, [SP,#0x74-0x10]\n"
136	"MOV R0, #0x280\n"
137	"STR R0, [SP,#0x74-0xC]\n"
138	//"LDR R1, =0xFF814DA4\n"
139	"LDR R1, =uHwSetup_my\n" //------------->
140	"MOV R0, SP\n"
141	"MOV R2, #0\n"
142	"BL sub_FF812D58\n"
143	"ADD SP, SP, #0x74\n"
144	"LDR PC, [SP],#4\n"
145	);
146	}
147
148	// Extracted method: uHwSetup (FF814DA4)
149	void __attribute__((naked,noinline)) uHwSetup_my()
150	{
151	asm volatile (
152	"STMFD SP!, {R4,LR}\n"
153	"BL sub_FF81094C\n"
154	"BL sub_FF819664\n"
155	"CMP R0, #0\n"
156	"LDRLT R0, =0xFF814EB8\n" // "dmSetup"
157	"BLLT sub_FF814E98\n"
158	"BL sub_FF8149C8\n"
159	"CMP R0, #0\n"
160	"LDRLT R0, =0xFF814EC0\n" // "termDriverInit"
161	"BLLT sub_FF814E98\n"
162	"LDR R0, =0xFF814ED0\n" // "/_term"
163	"BL sub_FF814AB4\n"
164	"CMP R0, #0\n"
165	"LDRLT R0, =0xFF814ED8\n" // "termDeviceCreate"
166	"BLLT sub_FF814E98\n"
167	"LDR R0, =0xFF814ED0\n" // "/_term"
168	"BL sub_FF813564\n"
169	"CMP R0, #0\n"
170	"LDRLT R0, =0xFF814EEC\n" // "stdioSetup"
171	"BLLT sub_FF814E98\n"
172	"BL sub_FF8191EC\n"
173	"CMP R0, #0\n"
174	"LDRLT R0, =0xFF814EF8\n" // "stdlibSetup"
175	"BLLT sub_FF814E98\n"
176	"BL sub_FF8114B8\n"
177	"CMP R0, #0\n"
178	"LDRLT R0, =0xFF814F04\n" // "armlib_setup"
179	"BLLT sub_FF814E98\n"
180	"LDMFD SP!, {R4,LR}\n"
181	"B taskcreate_Startup_my\n" //------------->
182	);
183	}
184
185	// Extracted method: taskcreate_Startup (FF81CCBC)
186	void __attribute__((naked,noinline)) taskcreate_Startup_my()
187	{
188	asm volatile (
189	"STMFD SP!, {R3,LR}\n"
190	"BL sub_FF821BF0\n" // j_nullsub_214
191	"BL sub_FF829EDC\n"
192	"CMP R0, #0\n"
193	"BNE loc_FF81CCEC\n"
194	"BL sub_FF821BEC\n"
195	"CMP R0, #0\n"
196	"BNE loc_FF81CCEC\n"
197	"LDR R1, =0xC0220000\n"
198	"MOV R0, #0x44\n"
199	"STR R0, [R4,#0x4C]\n"
200
201	"loc_FF81CCE8:\n"
202	"B loc_FF81CCE8\n"
203
204	"loc_FF81CCEC:\n"
205	"BL sub_FF821BF8\n"
206	"BL sub_FF821BF4\n"
207	"BL sub_FF828264\n"
208	"LDR R1, =0x2CE000\n"
209	"MOV R0, #0\n"
210	"BL sub_FF8284AC\n"
211	"BL sub_FF828458\n" // LOCATION: KerSys.c:548
212	"MOV R3, #0\n"
213	"STR R3, [SP,#0x8-0x8]\n"
214	//"ADR R3, 0xFF81CC60\n" // task_Startup
215	"LDR R3, =task_Startup_my\n" //------------->
216	"MOV R2, #0\n"
217	"MOV R1, #0x19\n"
218	"LDR R0, =0xFF81CD34\n" // "Startup"
219	"BL sub_FF81B818\n" // eventproc_export_CreateTask
220	"MOV R0, #0\n"
221	"LDMFD SP!, {R12,PC}\n"
222	);
223	}
224
225	// Extracted method: task_Startup (FF81CC60)
226	void __attribute__((naked,noinline)) task_Startup_my()
227	{
228	asm volatile (
229	"STMFD SP!, {R4,LR}\n"
230	"BL sub_FF81516C\n" // taskcreate_ClockSave
231	"BL sub_FF822D50\n"
232	"BL sub_FF81FDF0\n"
233	"BL sub_FF829F1C\n"
234	"BL sub_FF82A0E4\n"
235	//"BL sub_FF829FA4\n" // StartDiskBoot
236	"BL CreateTask_spytask\n" // +
237	"BL sub_FF82A298\n"
238	"BL sub_FF82A134\n"
239	"BL sub_FF8277A4\n"
240	"BL sub_FF82A29C\n"
241	"BL sub_FF821B00\n" // taskcreate_PhySw
242	"BL sub_FF824CB8\n" // task_ShootSeqTask
243	"BL sub_FF82A2B4\n"
244	"BL sub_FF81FB10\n" // nullsub_2
245	"BL sub_FF820FBC\n"
246	"BL sub_FF829CA4\n" // taskcreate_Bye
247	"BL sub_FF821630\n"
248	"BL sub_FF820EAC\n" // taskcreate_TempCheck
249	"BL sub_FF82AD58\n"
250	"BL sub_FF820E68\n"
251	"LDMFD SP!, {R4,PC}\n"
252	"BL sub_FF815070\n" // LOCATION: ClkEnabler.c:144
253	);
254	}
255
256	//Extracted method: task_InitFileModules (FF878F08)
257	void __attribute__((naked,noinline)) init_file_modules_task()
258	{
259	asm volatile (
260	"STMFD SP!, {R4-R6,LR}\n"
261	"BL sub_FF86D818\n"
262	"LDR R5, =0x5006\n"
263	"MOVS R4, R0\n"
264	"MOVNE R1, #0\n"
265	"MOVNE R0, R5\n"
266	"BLNE sub_FF873244\n" // PostLogicalEventToUI
267	//"BL sub_FF86D844\n"
268	"BL sub_FF86D844_my\n" //------------->
269	"BL core_spytask_can_start\n" // + safe to start spytask
270	"CMP R4, #0\n"
271	"MOVEQ R0, R5\n"
272	"LDMEQFD SP!, {R4-R6,LR}\n"
273	"MOVEQ R1, #0\n"
274	"BEQ sub_FF873244\n" // PostLogicalEventToUI
275	"LDMFD SP!, {R4-R6,PC}\n"
276	);
277	}
278
279	void __attribute__((naked,noinline)) sub_FF86D844_my()
280	{
281	asm volatile (
282	"STMFD SP!, {R4,LR}\n"
283	//"BL sub_FF84EF30\n"
284	"BL sub_FF84EF30_my\n" //------------->
285	"LDR R4, =0x57D0\n"
286	"LDR R0, [R4,#4]\n"
287	"CMP R0, #0\n"
288	"BNE loc_FF86D874\n"
289	"BL sub_FF881A84\n"
290	"BL sub_FF9052F8\n"
291	"BL sub_FF881A84\n"
292	"BL sub_FF84C920\n"
293	"BL sub_FF881A94\n"
294	"BL sub_FF9053C4\n"
295
296	"loc_FF86D874:\n"
297	"MOV R0, #1\n"
298	"STR R0, [R4]\n"
299	"LDMFD SP!, {R4,PC}\n"
300	);
301	}
302
303	void __attribute__((naked,noinline)) sub_FF84EF30_my()
304	{
305	asm volatile (
306	"STMFD SP!, {R4-R6,LR}\n"
307	"MOV R6, #0\n"
308	"MOV R0, R6\n"
309	"BL sub_FF84E9F0\n"
310	"LDR R4, =0x118C0\n"
311	"MOV R5, #0\n"
312	"LDR R0, [R4,#0x38]\n"
313	"BL sub_FF84F424\n"
314	"CMP R0, #0\n"
315	"LDREQ R0, =0x29D4\n"
316	"STREQ R5, [R0,#0x10]\n"
317	"STREQ R5, [R0,#0x14]\n"
318	"STREQ R5, [R0,#0x18]\n"
319	"MOV R0, R6\n"
320	"BL sub_FF84EA30\n" // LOCATION: Mounter.c:0
321	"MOV R0, R6\n"
322	//"BL sub_FF84ED6C"
323	"BL sub_FF84ED6C_my\n" //------------->
324	"MOV R5, R0\n"
325	"MOV R0, R6\n"
326	"BL sub_FF84EDD8\n" // LOCATION: Mounter.c:8
327	"LDR R1, [R4,#0x3C]\n"
328	"AND R2, R5, R0\n"
329	"CMP R1, #0\n"
330	"MOV R0, #0\n"
331	"MOVEQ R0, #0x80000001\n"
332	"BEQ loc_FF84EFC4\n"
333	"LDR R3, [R4,#0x2C]\n"
334	"CMP R3, #2\n"
335	"MOVEQ R0, #4\n"
336	"CMP R1, #5\n"
337	"ORRNE R0, R0, #1\n"
338	"BICEQ R0, R0, #1\n"
339	"CMP R2, #0\n"
340	"BICEQ R0, R0, #2\n"
341	"ORREQ R0, R0, #0x80000000\n"
342	"BICNE R0, R0, #0x80000000\n"
343	"ORRNE R0, R0, #2\n"
344
345	"loc_FF84EFC4:\n"
346	"STR R0, [R4,#0x40]\n"
347	"LDMFD SP!, {R4-R6,PC}\n"
348	);
349	}
350
351	void __attribute__((naked,noinline)) sub_FF84ED6C_my()
352	{
353	asm volatile (
354	"STMFD SP!, {R4-R6,LR}\n"
355	"LDR R5, =0x29D4\n"
356	"MOV R6, R0\n"
357	"LDR R0, [R5,#0x14]\n"
358	"CMP R0, #0\n"
359	"MOVNE R0, #1\n"
360	"LDMNEFD SP!, {R4-R6,PC}\n"
361	"MOV R0, #0x17\n"
362	"MUL R1, R0, R6\n"
363	"LDR R0, =0x118C0\n"
364	"ADD R4, R0, R1,LSL#2\n"
365	"LDR R0, [R4,#0x38]\n"
366	"MOV R1, R6\n"
367	//"BL sub_FF84EAFC\n" // LOCATION: Mounter.c:884
368	"BL sub_FF84EAFC_my\n" //------------->
369	"CMP R0, #0\n"
370	"LDMEQFD SP!, {R4-R6,PC}\n"
371	"LDR R0, [R4,#0x38]\n"
372	"MOV R1, R6\n"
373	"BL sub_FF84EC64\n" // LOCATION: Mounter.c:0
374	"CMP R0, #0\n"
375	"LDMEQFD SP!, {R4-R6,PC}\n"
376	"MOV R0, R6\n"
377	"BL sub_FF84E5F8\n"
378	"CMP R0, #0\n"
379	"MOVNE R1, #1\n"
380	"STRNE R1, [R5,#0x14]\n"
381	"LDMFD SP!, {R4-R6,PC}\n"
382	);
383	}
384
385	void __attribute__((naked,noinline)) sub_FF84EAFC_my()
386	{
387	asm volatile (
388	"STMFD SP!, {R4-R8,LR}\n"
389	"MOV R8, R0\n"
390	"MOV R0, #0x17\n"
391	"MUL R1, R0, R1\n"
392	"LDR R0, =0x118C0\n"
393	"MOV R6, #0\n"
394	"ADD R7, R0, R1,LSL#2\n"
395	"LDR R0, [R7,#0x3C]\n"
396	"MOV R5, #0\n"
397	"CMP R0, #6\n"
398	"ADDLS PC, PC, R0,LSL#2\n"
399	"B loc_FF84EC48\n"
400
401	"loc_FF84EB2C:\n"
402	"B loc_FF84EB60\n"
403
404	"loc_FF84EB30:\n"
405	"B loc_FF84EB48\n"
406
407	"loc_FF84EB34:\n"
408	"B loc_FF84EB48\n"
409
410	"loc_FF84EB38:\n"
411	"B loc_FF84EB48\n"
412
413	"loc_FF84EB3C:\n"
414	"B loc_FF84EB48\n"
415
416	"loc_FF84EB40:\n"
417	"B loc_FF84EC40\n"
418
419	"loc_FF84EB44:\n"
420	"B loc_FF84EB48\n"
421
422	"loc_FF84EB48:\n"
423	// jumptable FF84EB24 entries 1-4,6
424	"MOV R2, #0\n"
425	"MOV R1, #0x200\n"
426	"MOV R0, #3\n"
427	"BL sub_FF8679C4\n"
428	"MOVS R4, R0\n"
429	"BNE loc_FF84EB68\n"
430
431	"loc_FF84EB60:\n"
432	// jumptable FF84EB24 entry 0
433	"MOV R0, #0\n"
434	"LDMFD SP!, {R4-R8,PC}\n"
435
436	"loc_FF84EB68:\n"
437	"LDR R12, [R7,#0x4C]\n"
438	"MOV R3, R4\n"
439	"MOV R2, #1\n"
440	"MOV R1, #0\n"
441	"MOV R0, R8\n"
442	"BLX R12\n"
443	"CMP R0, #1\n"
444	"BNE loc_FF84EB94\n"
445	"MOV R0, #3\n"
446	"BL sub_FF867B04\n" // LOCATION: ExMemMan.c:0
447	"B loc_FF84EB60\n"
448
449	"loc_FF84EB94:\n"
450	"MOV R0, R8\n"
451	"BL sub_FF922B20\n"
452
453	"MOV R1, R4\n" // pointer to MBR in R1
454	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
455
456	// Start of DataGhost's FAT32 autodetection code
457	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
458	// According to the code below, we can use R1, R2, R3 and R12.
459	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
460	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
461	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
462	"MOV LR, R4\n" // Save old offset for MBR signature
463	"MOV R1, #1\n" // Note the current partition number
464	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
465
466	"dg_sd_fat32:\n"
467	"CMP R1, #4\n" // Did we already see the 4th partition?
468	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
469	"ADD R12, R12, #0x10\n" // Second partition
470	"ADD R1, R1, #1\n" // Second partition for the loop
471
472	"dg_sd_fat32_enter:\n"
473	"LDRB R2, [R12, #0x1BE]\n" // Partition status
474	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
475	"CMP R3, #0xB\n" // Is this a FAT32 partition?
476	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
477	"BNE dg_sd_fat32\n" // No, it isn't. Loop again.
478	"CMP R2, #0x00\n" // It is, check the validity of the partition type
479	"CMPNE R2, #0x80\n"
480	"BNE dg_sd_fat32\n" // Invalid, go to next partition
481	// This partition is valid, it's the first one, bingo!
482	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
483
484	"dg_sd_fat32_end:\n"
485	// End of DataGhost's FAT32 autodetection code
486
487	"LDRB R1, [R4,#0x1C9]\n"
488	"LDRB R3, [R4,#0x1C8]\n"
489	"LDRB R12, [R4,#0x1CC]\n"
490	"MOV R1, R1,LSL#24\n"
491	"ORR R1, R1, R3,LSL#16\n"
492	"LDRB R3, [R4,#0x1C7]\n"
493	"LDRB R2, [R4,#0x1BE]\n"
494	//"LDRB LR, [R4,#0x1FF]\n" // -
495	"ORR R1, R1, R3,LSL#8\n"
496	"LDRB R3, [R4,#0x1C6]\n"
497	"CMP R2, #0\n"
498	"CMPNE R2, #0x80\n"
499	"ORR R1, R1, R3\n"
500	"LDRB R3, [R4,#0x1CD]\n"
501	"MOV R3, R3,LSL#24\n"
502	"ORR R3, R3, R12,LSL#16\n"
503	"LDRB R12, [R4,#0x1CB]\n"
504	"ORR R3, R3, R12,LSL#8\n"
505	"LDRB R12, [R4,#0x1CA]\n"
506	"ORR R3, R3, R12\n"
507	//"LDRB R12, [R4,#0x1FE]\n" // -
508	"LDRB R12, [LR,#0x1FE]\n" // +
509	"LDRB LR, [LR,#0x1FF]\n" // +
510	"MOV R4, #0\n"
511	"BNE loc_FF84EC1C\n"
512	"CMP R0, R1\n"
513	"BCC loc_FF84EC1C\n"
514	"ADD R2, R1, R3\n"
515	"CMP R2, R0\n"
516	"CMPLS R12, #0x55\n"
517	"CMPEQ LR, #0xAA\n"
518	"MOVEQ R6, R1\n"
519	"MOVEQ R5, R3\n"
520	"MOVEQ R4, #1\n"
521
522	"loc_FF84EC1C:\n"
523	"MOV R0, #3\n"
524	"BL sub_FF867B04\n" // LOCATION: ExMemMan.c:0
525	"CMP R4, #0\n"
526	"BNE loc_FF84EC54\n"
527	"MOV R6, #0\n"
528	"MOV R0, R8\n"
529	"BL sub_FF922B20\n"
530	"MOV R5, R0\n"
531	"B loc_FF84EC54\n"
532
533	"loc_FF84EC40:\n"
534	// jumptable FF84EB24 entry 5
535	"MOV R5, #0x40\n"
536	"B loc_FF84EC54\n"
537
538	"loc_FF84EC48:\n"
539	// jumptable FF84EB24 default entry
540	"LDR R1, =0x374\n"
541	"LDR R0, =0xFF84EAF0\n" // "Mounter.c"
542	"BL _DebugAssert\n"
543
544	"loc_FF84EC54:\n"
545	"STR R6, [R7,#0x44]!\n"
546	"MOV R0, #1\n"
547	"STR R5, [R7,#4]\n"
548	"LDMFD SP!, {R4-R8,PC}\n"
549	);
550	}
551
552	// Extracted method: sub_FF842A40
553	void __attribute__((naked,noinline)) jogdial_task_my()
554	{
555	asm volatile (
556	"STMFD SP!, {R3-R11,LR}\n"
557	"BL sub_FF842BF0\n" // LOCATION: JogDial.c:14
558	"LDR R11, =0x80000B01\n"
559	"LDR R8, =0xFFAB1744\n"
560	"LDR R7, =0xC0240000\n"
561	"LDR R6, =0x22A0\n"
562	"MOV R9, #1\n"
563	"MOV R10, #0\n"
564
565	"loc_FF842A60:\n"
566	"LDR R3, =0x1A1\n"
567	"LDR R0, [R6,#0xC]\n"
568	"LDR R2, =0xFF842C98\n" // "JogDial.c"
569	"MOV R1, #0\n"
570	"BL sub_FF81BBD8\n"
571	//"MOV R0, #40\n"
572	"MOV R0, #40\n" // +
573	"BL _SleepTask\n" // LOCATION: KerSys.c:0
574
575	//------------------ added code ---------------------
576	"labelA:\n"
577	"LDR R0, =jogdial_stopped\n"
578	"LDR R0, [R0]\n"
579	"CMP R0, #1\n"
580	"BNE labelB\n"
581	"MOV R0, #40\n"
582	"BL _SleepTask\n"
583	"B labelA\n"
584	"labelB:\n"
585	//------------------ original code ------------------
586
587	"LDR R0, [R7,#0x104]\n"
588	"MOV R0, R0,ASR#16\n"
589	"STRH R0, [R6]\n"
590	"LDRSH R2, [R6,#2]\n"
591	"SUB R1, R0, R2\n"
592	"CMP R1, #0\n"
593	"BEQ loc_FF842B24\n"
594	"MOV R5, R1\n"
595	"RSBLT R5, R5, #0\n"
596	"MOVLE R4, #0\n"
597	"MOVGT R4, #1\n"
598	"CMP R5, #0xFF\n"
599	"BLS loc_FF842AD8\n"
600	"CMP R1, #0\n"
601	"RSBLE R1, R2, #0xFF\n"
602	"ADDLE R1, R1, #0x7F00\n"
603	"ADDLE R0, R1, R0\n"
604	"RSBGT R0, R0, #0xFF\n"
605	"ADDGT R0, R0, #0x7F00\n"
606	"ADDGT R0, R0, R2\n"
607	"ADD R5, R0, #0x8000\n"
608	"ADD R5, R5, #1\n"
609	"EOR R4, R4, #1\n"
610
611	"loc_FF842AD8:\n"
612	"LDR R0, [R6,#0x14]\n"
613	"CMP R0, #0\n"
614	"BEQ loc_FF842B1C\n"
615	"LDR R0, [R6,#0x1C]\n"
616	"CMP R0, #0\n"
617	"BEQ loc_FF842B04\n"
618	"LDR R1, [R8,R4,LSL#2]\n"
619	"CMP R1, R0\n"
620	"BEQ loc_FF842B0C\n"
621	"LDR R0, =0xB01\n"
622	"BL sub_FF8750A0\n"
623
624	"loc_FF842B04:\n"
625	"MOV R0, R11\n"
626	"BL sub_FF8750A0\n"
627
628	"loc_FF842B0C:\n"
629	"LDR R0, [R8,R4,LSL#2]\n"
630	"MOV R1, R5\n"
631	"STR R0, [R6,#0x1C]\n"
632	"BL sub_FF874FE8\n"
633
634	"loc_FF842B1C:\n"
635	"LDRH R0, [R6]\n"
636	"STRH R0, [R6,#2]\n"
637
638	"loc_FF842B24:\n"
639	"STR R10, [R7,#0x100]\n"
640	"STR R9, [R7,#0x108]\n"
641	"LDR R0, [R6,#0x10]\n"
642	"CMP R0, #0\n"
643	"BLNE _SleepTask\n" // LOCATION: KerSys.c:0
644	"B loc_FF842A60\n"
645	);
646	}

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source: trunk/platform/ixus970_sd890/sub/100f/boot.c @ 790

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