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boot.c @ 955

Revision 955, 33.0 KB checked in by fe50, 3 years ago (diff)

Fixes by ultimA from http://chdk.setepontos.com/index.php/topic,650.msg55640.html#msg55640
Make the A2000, G11 and ixus100_sd780 ports compatible with GCC 4.5. Apparently GCC 4.4 was too forgiving and still built the code, but GCC 4.5.1 errored out on them. This patch fixes the ASM so that these cams can be built successfully. The changes were not actually tested, but the fixes are trivial. As a result, all stable ports can be built using GCC 4.5.1 now. Credit also goes to whim who noticed these cams failing to build and he also suggested the first set of fixes.
Shut up some (not all) warnings from ixus100_sd780, ixus40_sd300, ixus65_sd630, s5is, ixus60_sd600
Make edge overlay respect OPT_EDGEOVERLAY. Previously, generated binary size did not get significantly smaller even when OPT_EDGEOVERLAY was undefined, because undefining it only resulted in the overlay being excluded from the menu, but still being built. Excluding edge overlay now saves appr. 3Kbytes.
Edge overlay erroneously depended on OPT_DEBUGGING. Builds failed when OPT_DEBUGGING was not defined previously.

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4	#include "stdlib.h"
5
6
7	const char * const new_sa = &_end;
8
9
10	// Forward declarations
11	void CreateTask_PhySw();
12	void CreateTask_spytask();
13	extern volatile int jogdial_stopped;
14	void JogDial_task_my(void);
15
16	void taskCreateHook(int *p) {
17	p-=17;
18	if (p[0]==0xFF87B13C) p[0]=(int)capt_seq_task;
19	if (p[0]==0xFF962AF4) p[0]=(int)movie_record_task;
20	if (p[0]==0xFF898F88) p[0]=(int)init_file_modules_task;
21	if (p[0]==0xFF8BFBA8) p[0]=(int)exp_drv_task;
22	if (p[0]==0xFF860554) p[0]=(int)JogDial_task_my;
23	}
24
25	void taskCreateHook2(int *p) {
26	p-=17;
27	if (p[0]==0xFF898F88) p[0]=(int)init_file_modules_task;
28	if (p[0]==0xFF8BFBA8) p[0]=(int)exp_drv_task;
29	}
30
31	void __attribute__((naked,noinline)) boot() {
32	asm volatile (
33	"LDR R1, =0xC0410000\n"
34	"MOV R0, #0\n"
35	"STR R0, [R1]\n"
36	"MOV R1, #0x78\n"
37	"MCR p15, 0, R1,c1,c0\n"
38	"MOV R1, #0\n"
39	"MCR p15, 0, R1,c7,c10, 4\n"
40	"MCR p15, 0, R1,c7,c5\n"
41	"MCR p15, 0, R1,c7,c6\n"
42	"MOV R0, #0x3D\n"
43	"MCR p15, 0, R0,c6,c0\n"
44	"MOV R0, #0xC000002F\n"
45	"MCR p15, 0, R0,c6,c1\n"
46	"MOV R0, #0x33\n"
47	"MCR p15, 0, R0,c6,c2\n"
48	"MOV R0, #0x40000033\n"
49	"MCR p15, 0, R0,c6,c3\n"
50	"MOV R0, #0x80000017\n"
51	"MCR p15, 0, R0,c6,c4\n"
52	"LDR R0, =0xFF80002D\n"
53	"MCR p15, 0, R0,c6,c5\n"
54	"MOV R0, #0x34\n"
55	"MCR p15, 0, R0,c2,c0\n"
56	"MOV R0, #0x34\n"
57	"MCR p15, 0, R0,c2,c0, 1\n"
58	"MOV R0, #0x34\n"
59	"MCR p15, 0, R0,c3,c0\n"
60	"LDR R0, =0x3333330\n"
61	"MCR p15, 0, R0,c5,c0, 2\n"
62	"LDR R0, =0x3333330\n"
63	"MCR p15, 0, R0,c5,c0, 3\n"
64	"MRC p15, 0, R0,c1,c0\n"
65	"ORR R0, R0, #0x1000\n"
66	"ORR R0, R0, #4\n"
67	"ORR R0, R0, #1\n"
68	"MCR p15, 0, R0,c1,c0\n"
69	"MOV R1, #0x80000006\n"
70	"MCR p15, 0, R1,c9,c1\n"
71	"MOV R1, #6\n"
72	"MCR p15, 0, R1,c9,c1, 1\n"
73	"MRC p15, 0, R1,c1,c0\n"
74	"ORR R1, R1, #0x50000\n"
75	"MCR p15, 0, R1,c1,c0\n"
76	"LDR R2, =0xC0200000\n"
77	"MOV R1, #1\n"
78	"STR R1, [R2,#0x10C]\n"
79	"MOV R1, #0xFF\n"
80	"STR R1, [R2,#0xC]\n"
81	"STR R1, [R2,#0x1C]\n"
82	"STR R1, [R2,#0x2C]\n"
83	"STR R1, [R2,#0x3C]\n"
84	"STR R1, [R2,#0x4C]\n"
85	"STR R1, [R2,#0x5C]\n"
86	"STR R1, [R2,#0x6C]\n"
87	"STR R1, [R2,#0x7C]\n"
88	"STR R1, [R2,#0x8C]\n"
89	"STR R1, [R2,#0x9C]\n"
90	"STR R1, [R2,#0xAC]\n"
91	"STR R1, [R2,#0xBC]\n"
92	"STR R1, [R2,#0xCC]\n"
93	"STR R1, [R2,#0xDC]\n"
94	"STR R1, [R2,#0xEC]\n"
95	"STR R1, [R2,#0xFC]\n"
96	"LDR R1, =0xC0400008\n"
97	"LDR R2, =0x430005\n"
98	"STR R2, [R1]\n"
99	"MOV R1, #1\n"
100	"LDR R2, =0xC0243100\n"
101	"STR R2, [R1]\n"
102	"LDR R2, =0xC0242010\n"
103	"LDR R1, [R2]\n"
104	"ORR R1, R1, #1\n"
105	"STR R1, [R2]\n"
106	"LDR R0, =0xFFC0C238\n"
107	"LDR R1, =0x1900\n" // MEMBASEADDR=0x1900
108	"LDR R3, =0xE90C\n"
109
110	"loc_FF81013C:\n"
111	"CMP R1, R3\n"
112	"LDRCC R2, [R0],#4\n"
113	"STRCC R2, [R1],#4\n"
114	"BCC loc_FF81013C\n"
115	"LDR R1, =0x1411E8\n" // MEMISOSTART=0x1411E8
116	"MOV R2, #0\n"
117	"loc_FF810154:\n"
118	"CMP R3, R1\n"
119	"STRCC R2, [R3],#4\n"
120	"BCC loc_FF810154\n"
121	"B sub_FF810354_my\n"
122	);
123	};
124
125	void __attribute__((naked,noinline)) sub_FF810354_my() {
126
127	(int)0x1930=(int)taskCreateHook;
128	(int)0x1934=(int)taskCreateHook2;
129	(int)0x1938=(int)taskCreateHook;
130
131	/* Power ON/OFF detection */
132	(int)(0x25C8)= ((int)0xC0220108)&1 ? 0x1000000 : 0x2000000; // replacement for correct power-on.
133
134	asm volatile (
135	"LDR R0, =0xFF8103CC\n"
136	"MOV R1, #0\n"
137	"LDR R3, =0xFF810404\n"
138	"loc_FF810360:\n"
139	"CMP R0, R3\n"
140	"LDRCC R2, [R0],#4\n"
141	"STRCC R2, [R1],#4\n"
142	"BCC loc_FF810360\n"
143	"LDR R0, =0xFF810404\n"
144	"MOV R1, #0x4B0\n"
145	"LDR R3, =0xFF810618\n"
146	"loc_FF81037C:\n"
147	"CMP R0, R3\n"
148	"LDRCC R2, [R0],#4\n"
149	"STRCC R2, [R1],#4\n"
150	"BCC loc_FF81037C\n"
151	"MOV R0, #0xD2\n"
152	"MSR CPSR_cxsf, R0\n"
153	"MOV SP, #0x1000\n"
154	"MOV R0, #0xD3\n"
155	"MSR CPSR_cxsf, R0\n"
156	"MOV SP, #0x1000\n"
157	"LDR R0, =0x6C4\n" // @0xFF8103C0
158	"LDR R2, =0xEEEEEEEE\n"
159	"MOV R3, #0x1000\n"
160	"loc_FF8103B0:\n"
161	"CMP R0, R3\n"
162	"STRCC R2, [R0],#4\n"
163	"BCC loc_FF8103B0\n"
164	"BL sub_FF811178_my\n" // ----->
165
166	"loc_FF8103C0:\n"
167	"ANDEQ R0, R0, R4,ASR#13\n"
168
169	"loc_FF8103C4:\n"
170	"ANDEQ R0, R0, R0,ROR R6\n"
171
172	"loc_FF8103C8:\n"
173	"ANDEQ R0, R0, R4,ROR R6\n"
174
175	"loc_FF8103CC:\n"
176	"NOP\n"
177	"LDR PC, =0xFF810618\n"
178	);
179	};
180
181	void __attribute__((naked,noinline)) sub_FF811178_my() {
182	asm volatile (
183	"STR LR, [SP,#-4]!\n"
184	"SUB SP, SP, #0x74\n"
185	"MOV R0, SP\n"
186	"MOV R1, #0x74\n"
187	"BL sub_FFB3CA80\n"
188	"MOV R0, #0x53000\n"
189	"STR R0, [SP,#4]\n"
190	// "LDR R0, =0x1411E8\n" // -
191	"LDR R0, =new_sa\n" // +
192	"LDR R0, [R0]\n" // +
193	"LDR R2, =0x379C00\n"
194	"LDR R1, =0x3724A8\n"
195	"STR R0, [SP,#8]\n"
196	"SUB R0, R1, R0\n"
197	"ADD R3, SP, #0xC\n"
198	"STR R2, [SP]\n"
199	"STMIA R3, {R0-R2}\n"
200	"MOV R0, #0x22\n"
201	"STR R0, [SP,#0x18]\n"
202	"MOV R0, #0x68\n"
203	"STR R0, [SP,#0x1C]\n"
204	"LDR R0, =0x19B\n"
205	// "LDR R1, =0xFF815E34\n" // -
206	"LDR R1, =sub_FF815E34_my\n" //+ ---------->
207	"STR R0, [SP,#0x20]\n"
208	"MOV R0, #0x96\n"
209	"STR R0, [SP,#0x24]\n"
210	"MOV R0, #0x78\n"
211	"STR R0, [SP,#0x28]\n"
212	"MOV R0, #0x64\n"
213	"STR R0, [SP,#0x2C]\n"
214	"MOV R0, #0\n"
215	"STR R0, [SP,#0x30]\n"
216	"STR R0, [SP,#0x34]\n"
217	"MOV R0, #0x10\n"
218	"STR R0, [SP,#0x5C]\n"
219	"MOV R0, #0x800\n"
220	"STR R0, [SP,#0x74-0x14]\n"
221	"MOV R0, #0xA0\n"
222	"STR R0, [SP,#0x60]\n"
223	"MOV R0, #0x280\n"
224	"STR R0, [SP,#0x68]\n"
225	"MOV R0, SP\n"
226	"MOV R2, #0\n"
227	"BL sub_FF8133E4\n"
228	"ADD SP, SP, #0x74\n"
229	"LDR PC, [SP],#4\n"
230	);
231	};
232
233	void __attribute__((naked,noinline)) sub_FF815E34_my() {
234	asm volatile (
235	"STMFD SP!, {R4,LR}\n"
236	"BL sub_FF810B08\n"
237
238
239	"BL sub_FF81A148\n" // dmSetup
240	"CMP R0, #0\n"
241	"LDRLT R0, =0xFF815F48\n" // aDmSetup
242	"BLLT sub_FF815F28\n" // err_init_task
243	"BL sub_FF815A70\n"
244
245	"CMP R0, #0\n"
246	"LDRLT R0, =0xFF815F50\n" //termDriverInit
247	"BLLT sub_FF815F28\n" // err_init_task
248	"LDR R0, =0xFF815F60\n" //_term
249	"BL sub_FF815B58\n" // termDeviceCreate
250	"CMP R0, #0\n"
251	"LDRLT R0, =0xFF815F68\n" //termDeviceCreate
252	"BLLT sub_FF815F28\n" // err_init_task
253	"LDR R0, =0xFF815F60\n" // _term
254	"BL sub_FF813BE0\n" // stdioSetup
255	"CMP R0, #0\n"
256	"LDRLT R0, =0xFF815F7C\n" // stdioSetup
257	"BLLT sub_FF815F28\n" // err_init_task
258	"BL sub_FF819B5C\n"
259	"CMP R0, #0\n"
260	"LDRLT R0, =0xFF815F88\n" //stdlibSetup
261	"BLLT sub_FF815F28\n" // err_init_task
262	"BL sub_FF81165C\n"
263	"CMP R0, #0\n"
264	"LDRLT R0, =0xFF815F94\n" // armlib_setup
265	"BLLT sub_FF815F28\n"
266
267	"LDMFD SP!, {R4,LR}\n"
268	"B taskcreate_Startup_my\n" //---------->
269	);
270	};
271
272
273
274	void __attribute__((naked,noinline)) taskcreate_Startup_my() {
275
276	asm volatile (
277	"STMFD SP!, {R3,LR}\n"
278	"BL sub_FF83332C\n"
279	"BL sub_FF83AC68\n"
280	"CMP R0, #0\n"
281	"BNE loc_FF81F8AC\n"
282	"BL sub_FF834A98\n"
283	"CMP R0, #0\n"
284	"BNE loc_FF81F8AC\n"
285	"BL sub_FF833328\n"
286	"CMP R0, #0\n"
287	"BNE loc_FF81F8AC\n"
288	"BL sub_FF832A04\n"
289	"LDR R1, =0xC0220000\n"
290	"MOV R0, #0x44\n"
291	"STR R0, [R1,#0x1C]\n"
292	"BL sub_FF832BF4\n"
293	"loc_FF81F8A8:\n"
294	"B loc_FF81F8A8\n"
295	"loc_FF81F8AC:\n"
296	// "BL 0xFF833334\n"// removed, see boot() function
297	"BL sub_FF85FA68\n"
298	"BL sub_FF838F18\n"
299	"MOV R0, #0x46\n"
300	"BL sub_FF8390A0\n"
301	"LDR R1, =0x3CE000\n"
302	"MOV R0, #0\n"
303	"BL sub_FF839360\n"
304	"BL sub_FF83910C\n"
305	"MOV R3, #0\n"
306	"STR R3, [SP]\n"
307	// "ADR R3, 0xFF81F804\n" // -
308	"LDR R3, =task_Startup_my\n" //+ ----------->
309	"MOV R2, #0\n"
310	"MOV R1, #0x19\n"
311	"LDR R0, =0xFF81F8FC\n"
312	"BL sub_FF81E5B4\n"
313	"MOV R0, #0\n"
314	"LDMFD SP!, {R12,PC}\n"
315	);
316	};
317
318	void __attribute__((naked,noinline)) task_Startup_my() {
319
320	asm volatile (
321	"STMFD SP!, {R4,LR}\n"
322	"BL sub_FF816490\n"
323	"BL sub_FF83441C\n"
324	"BL sub_FF832674\n"
325	"BL sub_FF83ACA8\n"
326	"BL sub_FF83AE8C\n"
327	//"BL sub_FF83AD3C\n" // Skip starting diskboot.bin again
328	"BL sub_FF83B030\n"
329	"BL sub_FF831370\n"
330	"BL sub_FF83AEBC\n"
331	"BL sub_FF8386BC\n"
332	"BL sub_FF83B034\n"
333	//"BL sub_FF833224\n" //taskcreate_PhySw
334	);
335	CreateTask_spytask(); // +
336	CreateTask_PhySw(); // +
337
338	asm volatile (
339	"BL sub_FF836618\n"
340	"BL sub_FF83B04C\n"
341	"BL sub_FF8306A8\n"
342	"BL sub_FF831FCC\n"
343	"BL sub_FF83AA40\n"
344	"BL sub_FF832628\n"
345	"BL sub_FF831ED8\n"
346	"BL sub_FF8313A4\n"
347	"BL sub_FF83BC60\n"
348	"BL sub_FF831EB0\n"
349	"LDMFD SP!, {R4,LR}\n"
350	"B sub_FF8165B0\n"
351	);
352	};
353
354	void CreateTask_spytask() {
355	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
356	};
357
358	void __attribute__((naked,noinline)) CreateTask_PhySw() {
359	asm volatile (
360	"STMFD SP!, {R3-R5,LR}\n"
361	"LDR R4, =0x1C38\n"
362	"LDR R0, [R4,#0x10]\n"
363	"CMP R0, #0\n"
364	"BNE loc_FF833258\n"
365	"MOV R3, #0\n"
366	"STR R3, [SP,#0]\n"
367	"LDR R3, =mykbd_task\n" // task_phySw
368	// "LDR R3, =0xFF8331F0\n" // task_phySw
369
370	// "MOV R2, #0x800\n"
371	"MOV R2, #0x2000\n" // greater Stacksize
372
373	"MOV R1, #0x17\n"
374	"LDR R0, =0xFF833430\n" //phySw
375	"BL sub_FF839160\n" //KernelCreateTask
376	"STR R0, [R4,#0x10]\n"
377	"loc_FF833258:\n"
378	"BL sub_FF8608A8\n"
379	"BL sub_FF88BB08\n"
380	"BL sub_FF834A3C\n"
381	"CMP R0, #0\n"
382	"LDREQ R1, =0x32584\n"
383	"LDMEQFD SP!, {R3-R5,LR}\n"
384	"BEQ sub_FF88BA90\n"
385	"LDMFD SP!, {R3-R5,PC}\n"
386	"NOP\n"
387	);
388	};
389
390	void __attribute__((naked,noinline)) init_file_modules_task() {
391	asm volatile (
392	"STMFD SP!, {R4-R6,LR}\n"
393	"BL sub_FF88DF50\n"
394	"LDR R5, =0x5006\n"
395	"MOVS R4, R0\n"
396	"MOVNE R1, #0\n"
397	"MOVNE R0, R5\n"
398	"BLNE sub_FF8931BC\n"
399	/* "BL sub_FF88DF7C\n" */ // -
400	"BL sub_FF88DF7C_my\n" //----------->
401	"BL core_spytask_can_start\n" // +
402	"CMP R4, #0\n"
403	"MOVEQ R0, R5\n"
404	"LDMEQFD SP!, {R4-R6,LR}\n"
405	"MOVEQ R1, #0\n"
406	"BEQ sub_FF8931BC\n"
407	"LDMFD SP!, {R4-R6,PC}\n"
408	);
409	};
410
411	void __attribute__((naked,noinline)) sub_FF88DF7C_my() {
412	asm volatile (
413	"STMFD SP!, {R4,LR}\n"
414	"MOV R0, #3\n"
415	//"BL sub_FF86F8AC\n" //-
416	"BL sub_FF86F8AC_my\n" // ---------->
417	"BL sub_FF9487F0\n"
418	"LDR R4, =0x3030\n"
419	"LDR R0, [R4,#4]\n"
420	"CMP R0, #0\n"
421	"BNE loc_FF88DFB4\n"
422	"BL sub_FF86EBB8\n"
423	"BL sub_FF93C834\n"
424	"BL sub_FF86EBB8\n"
425	"BL sub_FF86AEB4\n"
426	"BL sub_FF86EAB8\n"
427	"BL sub_FF93C8FC\n"
428	"loc_FF88DFB4:\n"
429	"MOV R0, #1\n"
430	"STR R0, [R4]\n"
431	"LDMFD SP!, {R4,PC}\n"
432	);
433	};
434
435
436	void __attribute__((naked,noinline)) sub_FF86F8AC_my() {
437	asm volatile (
438	"STMFD SP!, {R4-R8,LR}\n"
439	"MOV R8, R0\n"
440	"BL sub_FF86F82C\n"
441	"LDR R1, =0x375F0\n"
442	"MOV R6, R0\n"
443	"ADD R4, R1, R0,LSL#7\n"
444	"LDR R0, [R4,#0x6C]\n"
445	"CMP R0, #4\n"
446	"LDREQ R1, =0x804\n"
447	"LDREQ R0, =0xFF86F378\n"
448	"BLEQ sub_FF81E88C\n"
449	"MOV R1, R8\n"
450	"MOV R0, R6\n"
451	"BL sub_FF86F0CC\n"
452	"LDR R0, [R4,#0x38]\n"
453	"BL sub_FF86FEC8\n"
454	"CMP R0, #0\n"
455	"STREQ R0, [R4,#0x6C]\n"
456	"MOV R0, R6\n"
457	"BL sub_FF86F15C\n"
458	"MOV R0, R6\n"
459	// "BL sub_FF86F4E0\n" //-
460	"BL sub_FF86F4E0_my\n" //----------->
461	"MOV R5, R0\n"
462	"MOV R0, R6\n"
463	"BL sub_FF86F708\n"
464	"LDR R6, [R4,#0x3C]\n"
465	"AND R7, R5, R0\n"
466	"CMP R6, #0\n"
467	"LDR R1, [R4,#0x38]\n"
468	"MOVEQ R0, #0x80000001\n"
469	"MOV R5, #0\n"
470	"BEQ loc_FF86F95C\n"
471	"MOV R0, R1\n"
472	"BL sub_FF86ED20\n"
473	"CMP R0, #0\n"
474	"MOVNE R5, #4\n"
475	"CMP R6, #5\n"
476	"ORRNE R0, R5, #1\n"
477	"BICEQ R0, R5, #1\n"
478	"CMP R7, #0\n"
479	"BICEQ R0, R0, #2\n"
480	"ORREQ R0, R0, #0x80000000\n"
481	"BICNE R0, R0, #0x80000000\n"
482	"ORRNE R0, R0, #2\n"
483
484	"loc_FF86F95C:\n"
485	"CMP R8, #7\n"
486	"STR R0, [R4,#0x40]\n"
487	"LDMNEFD SP!, {R4-R8,PC}\n"
488	"MOV R0, R8\n"
489	"BL sub_FF86F87C\n"
490	"CMP R0, #0\n"
491	"LDMEQFD SP!, {R4-R8,LR}\n"
492	"LDREQ R0, =0xFF86F9A8\n"
493	"BEQ =0xFF81175C\n" //qPrintf
494	"LDMFD SP!, {R4-R8,PC}\n"
495	);
496	};
497
498	void __attribute__((naked,noinline)) sub_FF86F4E0_my() {
499
500	asm volatile (
501	"STMFD SP!, {R4-R6,LR}\n"
502	"MOV R5, R0\n"
503	"LDR R0, =0x375F0\n"
504	"ADD R4, R0, R5,LSL#7\n"
505	"LDR R0, [R4,#0x6C]\n"
506	"TST R0, #2\n"
507	"MOVNE R0, #1\n"
508	"LDMNEFD SP!, {R4-R6,PC}\n"
509	"LDR R0, [R4,#0x38]\n"
510	"MOV R1, R5\n"
511	// "BL sub_FF86F1DC\n" // -
512	"BL sub_FF86F1DC_my\n" // --------->
513	"CMP R0, #0\n"
514	"LDRNE R0, [R4,#0x38]\n"
515	"MOVNE R1, R5\n"
516	"BLNE sub_FF86F39C\n"
517	"LDR R2, =0x37670\n"
518	"ADD R1, R5, R5,LSL#4\n"
519	"LDR R1, [R2,R1,LSL#2]\n"
520	"CMP R1, #4\n"
521	"BEQ loc_FF86F540\n"
522	"CMP R0, #0\n"
523	"LDMEQFD SP!, {R4-R6,PC}\n"
524	"MOV R0, R5\n"
525	"BL sub_FF86EDB0\n"
526
527	"loc_FF86F540:\n"
528	"CMP R0, #0\n"
529	"LDRNE R1, [R4,#0x6C]\n"
530	"ORRNE R1, R1, #2\n"
531	"STRNE R1, [R4,#0x6C]\n"
532	"LDMFD SP!, {R4-R6,PC}\n"
533	);
534	};
535
536
537	void __attribute__((naked,noinline)) sub_FF86F1DC_my() {
538	asm volatile (
539	"STMFD SP!, {R4-R10,LR}\n"
540	"MOV R9, R0\n"
541	"LDR R0, =0x375F0\n"
542	"MOV R8, #0\n"
543	"ADD R5, R0, R1,LSL#7\n"
544	"LDR R0, [R5,#0x3C]\n"
545	"MOV R7, #0\n"
546	"CMP R0, #7\n"
547	"MOV R6, #0\n"
548	"ADDLS PC, PC, R0,LSL#2\n"
549	"B loc_FF86F334\n"
550	"loc_FF86F208:\n"
551	"B loc_FF86F240\n"
552	"loc_FF86F20C:\n"
553	"B loc_FF86F228\n"
554	"loc_FF86F210:\n"
555	"B loc_FF86F228\n"
556	"loc_FF86F214:\n"
557	"B loc_FF86F228\n"
558	"loc_FF86F218:\n"
559	"B loc_FF86F228\n"
560	"loc_FF86F21C:\n"
561	"B loc_FF86F32C\n"
562	"loc_FF86F220:\n"
563	"B loc_FF86F228\n"
564	"loc_FF86F224:\n"
565	"B loc_FF86F228\n"
566	"loc_FF86F228:\n"
567	"MOV R2, #0\n"
568	"MOV R1, #0x200\n"
569	"MOV R0, #2\n"
570	"BL sub_FF887F8C\n"
571	"MOVS R4, R0\n"
572	"BNE loc_FF86F248\n"
573
574	"loc_FF86F240:\n"
575	"MOV R0, #0\n"
576	"LDMFD SP!, {R4-R10,PC}\n"
577	"loc_FF86F248:\n"
578	"LDR R12, [R5,#0x50]\n"
579	"MOV R3, R4\n"
580	"MOV R2, #1\n"
581	"MOV R1, #0\n"
582	"MOV R0, R9\n"
583	"BLX R12\n"
584	"CMP R0, #1\n"
585	"BNE loc_FF86F274\n"
586	"MOV R0, #2\n"
587	"BL sub_FF8880D8\n"
588	"B loc_FF86F240\n"
589	"loc_FF86F274:\n"
590	"LDR R1, [R5,#0x64]\n"
591	"MOV R0, R9\n"
592	"BLX R1\n"
593
594
595
596	"MOV R1, R4\n" // pointer to MBR in R1
597	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
598
599	// Start of DataGhost's FAT32 autodetection code
600	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
601	// According to the code below, we can use R1, R2, R3 and R12.
602	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
603	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
604	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
605	"MOV LR, R4\n" // Save old offset for MBR signature
606	"MOV R1, #1\n" // Note the current partition number
607	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
608	"dg_sd_fat32:\n"
609	"CMP R1, #4\n" // Did we already see the 4th partition?
610	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
611	"ADD R12, R12, #0x10\n" // Second partition
612	"ADD R1, R1, #1\n" // Second partition for the loop
613	"dg_sd_fat32_enter:\n"
614	"LDRB R2, [R12, #0x1BE]\n" // Partition status
615	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
616	"CMP R3, #0xB\n" // Is this a FAT32 partition?
617	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
618	"BNE dg_sd_fat32\n" // No, it isn't.
619	"CMP R2, #0x00\n" // It is, check the validity of the partition type
620	"CMPNE R2, #0x80\n"
621	"BNE dg_sd_fat32\n" // Invalid, go to next partition
622	// This partition is valid, it's the first one, bingo!
623	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
624
625	"dg_sd_fat32_end:\n"
626	// End of DataGhost's FAT32 autodetection code
627
628	"LDRB R1, [R4,#0x1C9]\n"
629	"LDRB R3, [R4,#0x1C8]\n"
630	"LDRB R12, [R4,#0x1CC]\n"
631	"MOV R1, R1,LSL#24\n"
632	"ORR R1, R1, R3,LSL#16\n"
633	"LDRB R3, [R4,#0x1C7]\n"
634	"LDRB R2, [R4,#0x1BE]\n"
635	//"LDRB LR, [R4,#0x1FF]\n" // replaced, see below
636	"ORR R1, R1, R3,LSL#8\n"
637	"LDRB R3, [R4,#0x1C6]\n"
638	"CMP R2, #0\n"
639	"CMPNE R2, #0x80\n"
640	"ORR R1, R1, R3\n"
641	"LDRB R3, [R4,#0x1CD]\n"
642	"MOV R3, R3,LSL#24\n"
643	"ORR R3, R3, R12,LSL#16\n"
644	"LDRB R12, [R4,#0x1CB]\n"
645	"ORR R3, R3, R12,LSL#8\n"
646	"LDRB R12, [R4,#0x1CA]\n"
647	"ORR R3, R3, R12\n"
648	//"LDRB R12, [R4,#0x1FE]\n" // replaced, see below
649
650	"LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55)
651	"LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA)
652
653	"BNE loc_FF86F300\n"
654	"CMP R0, R1\n"
655	"BCC loc_FF86F300\n"
656	"ADD R2, R1, R3\n"
657	"CMP R2, R0\n"
658	"CMPLS R12, #0x55\n"
659	"CMPEQ LR, #0xAA\n"
660	"MOVEQ R7, R1\n"
661	"MOVEQ R6, R3\n"
662	"MOVEQ R4, #1\n"
663	"BEQ loc_FF86F304\n"
664	"loc_FF86F300:\n"
665	"MOV R4, R8\n"
666	"loc_FF86F304:\n"
667	"MOV R0, #2\n"
668	"BL sub_FF8880D8\n"
669	"CMP R4, #0\n"
670	"BNE loc_FF86F340\n"
671	"LDR R1, [R5,#0x64]\n"
672	"MOV R7, #0\n"
673	"MOV R0, R9\n"
674	"BLX R1\n"
675	"MOV R6, R0\n"
676	"B loc_FF86F340\n"
677	"loc_FF86F32C:\n"
678	"MOV R6, #0x40\n"
679	"B loc_FF86F340\n"
680	"loc_FF86F334:\n"
681	"LDR R1, =0x568\n"
682	"LDR R0, =0xFF86F378\n"
683
684	"BL =0xFF81E88C\n"
685
686	"loc_FF86F340:\n"
687	"STR R7, [R5,#0x44]!\n"
688	"STMIB R5, {R6,R8}\n"
689	"MOV R0, #1\n"
690
691	"LDMFD SP!, {R4-R10,PC}\n"
692	);
693	};
694
695	void __attribute__((naked,noinline)) sub_FF8604E0_my() {
696	asm volatile (
697	"LDR R0, =0x25D0\n"
698	"LDR R0, [R0,#8]\n"
699	"B sub_FF838B50\n"
700	);
701	};
702
703	void __attribute__((naked,noinline)) JogDial_task_my() {
704	asm volatile (
705	"STMFD SP!, {R4-R11,LR}\n"
706	"SUB SP, SP, #0x2C\n"
707	"BL sub_FF8608FC\n"
708	"LDR R1, =0x25D0\n"
709	"LDR R8, =0xFFB4775C\n" // Oder sub?
710	"MOV R0, #0\n"
711	"ADD R2, SP, #0x14\n"
712	"ADD R3, SP, #0x18\n"
713	"ADD R10, SP, #0xC\n"
714	"ADD R9, SP, #0x10\n"
715	"MOV R7, #0\n"
716	"loc_FF860580:\n"
717	"ADD R3, SP, #0x18\n"
718	"ADD R12, R3, R0,LSL#1\n"
719	"ADD R2, SP, #0x14\n"
720	"STRH R7, [R12]\n"
721	"ADD R12, R2, R0,LSL#1\n"
722	"STRH R7, [R12]\n"
723	"STR R7, [R9,R0,LSL#2]\n"
724	"STR R7, [R10,R0,LSL#2]\n"
725	"ADD R0, R0, #1\n"
726	"CMP R0, #1\n"
727	"BLT loc_FF860580\n"
728	"loc_FF8605AC:\n"
729	"LDR R0, =0x25D0\n"
730	"MOV R2, #0\n"
731	"LDR R0, [R0,#8]\n"
732	"ADD R1, SP, #0x4\n"
733	"BL sub_FF83894C\n"
734	"TST R0, #1\n"
735	"LDRNE R1, =0x226\n"
736	"LDRNE R0, =0xFF860830\n" // "JogDial.c"
737	"BLNE sub_FF81E88C\n" // DebugAssert
738
739
740	//------------------ added code ---------------------
741	"labelA:\n"
742	"LDR R0, =jogdial_stopped\n"
743	"LDR R0, [R0]\n"
744	"CMP R0, #1\n"
745	"BNE labelB\n"
746	"MOV R0, #40\n"
747	"BL _SleepTask\n"
748	"B labelA\n"
749	"labelB:\n"
750	//------------------ original code ------------------
751
752	"LDR R0, [SP,#0x4]\n"
753	"AND R4, R0, #0xFF\n"
754	"AND R0, R0, #0xFF00\n"
755	"CMP R0, #0x100\n"
756	"BEQ loc_FF860630\n"
757	"CMP R0, #0x200\n"
758	"BEQ loc_FF860668\n"
759	"CMP R0, #0x300\n"
760	"BEQ loc_FF86087C\n"
761	"CMP R0, #0x400\n"
762	"BNE loc_FF8605AC\n"
763	"CMP R4, #0\n"
764	"LDRNE R1, =0x2CA\n"
765	"LDRNE R0, =0xFF860830\n" // "JogDial.c"
766	"BLNE sub_FF81E88C\n" // DebugAssert
767	"LDR R2, =0xFFB47748\n"
768	"ADD R0, R4, R4,LSL#2\n"
769	"LDR R1, [R2,R0,LSL#2]\n"
770	"STR R7, [R1]\n"
771	"MOV R1, #1\n"
772	"ADD R0, R2, R0,LSL#2\n"
773	"loc_FF860624:\n"
774	"LDR R0, [R0,#8]\n"
775	"STR R1, [R0]\n"
776	"B loc_FF8605AC\n"
777	"loc_FF860630:\n"
778	"LDR R5, =0x25E0\n"
779	"LDR R0, [R5,R4,LSL#2]\n"
780	"BL sub_FF8398E4\n"
781	"ADRL R2, sub_FF8604E0_my\n"
782	// "LDR R2, sub_FF8604E0\n"
783	"ADD R1, R2, #0\n"
784	"ORR R3, R4, #0x200\n"
785	"MOV R0, #0x28\n"
786	"BL sub_FF839800\n"
787	"TST R0, #1\n"
788	"CMPNE R0, #0x15\n"
789	"STR R0, [R10,R4,LSL#2]\n"
790	"BEQ loc_FF8605AC\n"
791	"LDR R1, =0x23B\n"
792	"B loc_FF860820\n"
793	"loc_FF860668:\n"
794	"LDR R1, =0xFFB47748\n"
795	"ADD R0, R4, R4,LSL#2\n"
796	"STR R0, [SP,#0x28]\n"
797	"ADD R0, R1, R0,LSL#2\n"
798	"STR R0, [SP,#0x24]\n"
799	"LDR R0, [R0,#4]\n"
800	"LDR R0, [R0]\n"
801	"MOV R2, R0,ASR#16\n"
802	"ADD R0, SP, #0x18\n"
803	"ADD R0, R0, R4,LSL#1\n"
804	"STR R0, [SP,#0x20]\n"
805	"STRH R2, [R0]\n"
806	"ADD R0, SP, #0x14\n"
807	"ADD R0, R0, R4,LSL#1\n"
808	"STR R0, [SP,#0x1c]\n"
809	"LDRSH R3, [R0]\n"
810	"SUB R0, R2, R3\n"
811	"CMP R0, #0\n"
812	"BEQ loc_FF8607D8\n"
813	"MOV R1, R0\n"
814	"RSBLT R0, R0, #0\n"
815	"MOVLE R5, #0\n"
816	"MOVGT R5, #1\n"
817	"CMP R0, #0xFF\n"
818	"BLS loc_FF8606F4\n"
819	"CMP R1, #0\n"
820	"RSBLE R0, R3, #0xFF\n"
821	"ADDLE R0, R0, #0x7F00\n"
822	"ADDLE R0, R0, R2\n"
823	"RSBGT R0, R2, #0xFF\n"
824	"ADDGT R0, R0, #0x7F00\n"
825	"ADDGT R0, R0, R3\n"
826	"ADD R0, R0, #0x8000\n"
827	"ADD R0, R0, #1\n"
828	"EOR R5, R5, #1\n"
829	"loc_FF8606F4:\n"
830	"STR R0, [SP,#0x8]\n"
831	"LDR R0, [R9,R4,LSL#2]\n"
832	"CMP R0, #0\n"
833	"BEQ loc_FF860744\n"
834	"LDR R1, =0xFFB47740\n"
835	"ADD R1, R1, R4,LSL#3\n"
836	"LDR R1, [R1,R5,LSL#2]\n"
837	"CMP R1, R0\n"
838	"BEQ loc_FF860760\n"
839	"ADD R11, R4, R4,LSL#1\n"
840	"ADD R6, R8, R11,LSL#2\n"
841	"LDRB R0, [R6,#9]\n"
842	"CMP R0, #1\n"
843	"LDREQ R0, [R6,#4]\n"
844	"BLEQ sub_FF89501C\n"
845	"LDRB R0, [R6,#8]\n"
846	"CMP R0, #1\n"
847	"BNE loc_FF860760\n"
848	"LDR R0, [R8,R11,LSL#2]\n"
849	"B loc_FF86075C\n"
850	"loc_FF860744:\n"
851	"ADD R0, R4, R4,LSL#1\n"
852	"ADD R1, R8, R0,LSL#2\n"
853	"LDRB R1, [R1,#8]\n"
854	"CMP R1, #1\n"
855	"BNE loc_FF860760\n"
856	"LDR R0, [R8,R0,LSL#2]\n"
857	"loc_FF86075C:\n"
858	"BL sub_FF89501C\n"
859	"loc_FF860760:\n"
860	"LDR R0, =0xFFB47740\n"
861	"LDR R1, [SP,#0x8]\n"
862	"ADD R6, R0, R4,LSL#3\n"
863	"LDR R0, [R6,R5,LSL#2]\n"
864	"BL sub_FF894F4C\n"
865	"LDR R0, [R6,R5,LSL#2]\n"
866	"STR R0, [R9,R4,LSL#2]\n"
867	"LDR R0, [SP,#0x20]\n"
868	"LDR R1, [SP,#0x1C]\n"
869	"LDRH R0, [R0]\n"
870	"STRH R0, [R1]\n"
871	"ADD R0, R4, R4,LSL#1\n"
872	"ADD R0, R8, R0,LSL#2\n"
873	"LDRB R0, [R0,#9]\n"
874	"CMP R0, #1\n"
875	"BNE loc_FF8607D8\n"
876	"LDR R5, =0x25E0\n"
877	"LDR R0, [R5,R4,LSL#2]\n"
878	"BL sub_FF8398E4\n"
879	// "ADR R2, sub_FF8604EC\n"
880	"LDR R2, =0xFF8604EC\n"
881	"ADD R1, R2, #0\n"
882	"ORR R3, R4, #0x300\n"
883	"MOV R0, #0x1F4\n"
884	"BL sub_FF839800\n"
885	"TST R0, #1\n"
886	"CMPNE R0, #0x15\n"
887	"STR R0, [R5,R4,LSL#2]\n"
888	"LDRNE R0, =0xFF860830\n" //"JogDial.c"
889	"MOVNE R1, #0x2A4\n"
890	"BLNE sub_FF81E88C\n" //DebugAssert
891	"loc_FF8607D8:\n"
892	"ADD R0, R4, R4,LSL#1\n"
893	"ADD R0, R8, R0,LSL#2\n"
894	"LDRB R0, [R0,#0xA]\n"
895	"CMP R0, #1\n"
896	"BNE loc_FF860860\n"
897	"LDR R0, =0x25D0\n"
898	"LDR R0, [R0,#0xC]\n"
899	"CMP R0, #0\n"
900	"BEQ loc_FF860860\n"
901	// "ADR R2, loc_FF8604E0\n"
902	"ADRL R2,sub_FF8604E0_my\n"
903	"ADD R1, R2, #0\n"
904	"ORR R3, R4, #0x400\n"
905	"BL sub_FF839800\n"
906	"TST R0, #1\n"
907	"CMPNE R0, #0x15\n"
908	"STR R0, [R10,R4,LSL#2]\n"
909	"BEQ loc_FF8605AC\n"
910	"LDR R1, =0x2AF\n"
911	"loc_FF860820:\n"
912	"LDR R0, =0xFF860830\n" // "JogDial.c"
913	"BL sub_FF81E88C\n" // DebugAssert
914	"B loc_FF8605AC\n"
915
916	"NOP\n"
917
918	"loc_FF860860:\n"
919	"LDR R1, =0xFFB47748\n"
920	"LDR R0, [SP,#0x28]\n"
921	"LDR R0, [R1,R0,LSL#2]\n"
922	"STR R7, [R0]\n"
923	"LDR R0, [SP,#0x24]\n"
924	"MOV R1, #1\n"
925	"B loc_FF860624\n"
926	"loc_FF86087C:\n"
927	"LDR R0, [R9,R4,LSL#2]\n"
928	"CMP R0, #0\n"
929	"MOVEQ R1, #0x2BC\n"
930	"LDREQ R0, =0xFF860830\n" //aJogdial_c
931	"BLEQ sub_FF81E88C\n" //DebugAssert
932	"ADD R0, R4, R4,LSL#1\n"
933	"ADD R0, R8, R0,LSL#2\n"
934	"LDR R0, [R0,#4]\n"
935	"BL sub_FF89501C\n"
936	"STR R7, [R9,R4,LSL#2]\n"
937	"B loc_FF8605AC\n"
938	);
939	};

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source: trunk/platform/g11/sub/100j/boot.c @ 955

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