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boot.c @ 955

Revision 955, 33.0 KB checked in by fe50, 3 years ago (diff)

Fixes by ultimA from http://chdk.setepontos.com/index.php/topic,650.msg55640.html#msg55640
Make the A2000, G11 and ixus100_sd780 ports compatible with GCC 4.5. Apparently GCC 4.4 was too forgiving and still built the code, but GCC 4.5.1 errored out on them. This patch fixes the ASM so that these cams can be built successfully. The changes were not actually tested, but the fixes are trivial. As a result, all stable ports can be built using GCC 4.5.1 now. Credit also goes to whim who noticed these cams failing to build and he also suggested the first set of fixes.
Shut up some (not all) warnings from ixus100_sd780, ixus40_sd300, ixus65_sd630, s5is, ixus60_sd600
Make edge overlay respect OPT_EDGEOVERLAY. Previously, generated binary size did not get significantly smaller even when OPT_EDGEOVERLAY was undefined, because undefining it only resulted in the overlay being excluded from the menu, but still being built. Excluding edge overlay now saves appr. 3Kbytes.
Edge overlay erroneously depended on OPT_DEBUGGING. Builds failed when OPT_DEBUGGING was not defined previously.

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4	#include "stdlib.h"
5
6
7	const char * const new_sa = &_end;
8
9
10	// Forward declarations
11	void CreateTask_PhySw();
12	void CreateTask_spytask();
13	extern volatile int jogdial_stopped;
14	void JogDial_task_my(void);
15
16	void taskCreateHook(int *p) {
17	p-=17;
18	if (p[0]==0xFF87B06C) p[0]=(int)capt_seq_task;
19	if (p[0]==0xFF962A10) p[0]=(int)movie_record_task;
20	if (p[0]==0xFF898EA4) p[0]=(int)init_file_modules_task;
21	if (p[0]==0xFF8BFAC4) p[0]=(int)exp_drv_task;
22	if (p[0]==0xFF860504) p[0]=(int)JogDial_task_my;
23
24	}
25
26	void taskCreateHook2(int *p) {
27	p-=17;
28	if (p[0]==0xFF898EA4) p[0]=(int)init_file_modules_task;
29	if (p[0]==0xFF8BFAC4) p[0]=(int)exp_drv_task;
30	}
31	void __attribute__((naked,noinline)) boot() {
32	asm volatile (
33	"LDR R1, =0xC0410000\n"
34	"MOV R0, #0\n"
35	"STR R0, [R1]\n"
36	"MOV R1, #0x78\n"
37	"MCR p15, 0, R1,c1,c0\n"
38	"MOV R1, #0\n"
39	"MCR p15, 0, R1,c7,c10, 4\n"
40	"MCR p15, 0, R1,c7,c5\n"
41	"MCR p15, 0, R1,c7,c6\n"
42	"MOV R0, #0x3D\n"
43	"MCR p15, 0, R0,c6,c0\n"
44	"MOV R0, #0xC000002F\n"
45	"MCR p15, 0, R0,c6,c1\n"
46	"MOV R0, #0x33\n"
47	"MCR p15, 0, R0,c6,c2\n"
48	"MOV R0, #0x40000033\n"
49	"MCR p15, 0, R0,c6,c3\n"
50	"MOV R0, #0x80000017\n"
51	"MCR p15, 0, R0,c6,c4\n"
52	"LDR R0, =0xFF80002D\n"
53	"MCR p15, 0, R0,c6,c5\n"
54	"MOV R0, #0x34\n"
55	"MCR p15, 0, R0,c2,c0\n"
56	"MOV R0, #0x34\n"
57	"MCR p15, 0, R0,c2,c0, 1\n"
58	"MOV R0, #0x34\n"
59	"MCR p15, 0, R0,c3,c0\n"
60	"LDR R0, =0x3333330\n"
61	"MCR p15, 0, R0,c5,c0, 2\n"
62	"LDR R0, =0x3333330\n"
63	"MCR p15, 0, R0,c5,c0, 3\n"
64	"MRC p15, 0, R0,c1,c0\n"
65	"ORR R0, R0, #0x1000\n"
66	"ORR R0, R0, #4\n"
67	"ORR R0, R0, #1\n"
68	"MCR p15, 0, R0,c1,c0\n"
69	"MOV R1, #0x80000006\n"
70	"MCR p15, 0, R1,c9,c1\n"
71	"MOV R1, #6\n"
72	"MCR p15, 0, R1,c9,c1, 1\n"
73	"MRC p15, 0, R1,c1,c0\n"
74	"ORR R1, R1, #0x50000\n"
75	"MCR p15, 0, R1,c1,c0\n"
76	"LDR R2, =0xC0200000\n"
77	"MOV R1, #1\n"
78	"STR R1, [R2,#0x10C]\n"
79	"MOV R1, #0xFF\n"
80	"STR R1, [R2,#0xC]\n"
81	"STR R1, [R2,#0x1C]\n"
82	"STR R1, [R2,#0x2C]\n"
83	"STR R1, [R2,#0x3C]\n"
84	"STR R1, [R2,#0x4C]\n"
85	"STR R1, [R2,#0x5C]\n"
86	"STR R1, [R2,#0x6C]\n"
87	"STR R1, [R2,#0x7C]\n"
88	"STR R1, [R2,#0x8C]\n"
89	"STR R1, [R2,#0x9C]\n"
90	"STR R1, [R2,#0xAC]\n"
91	"STR R1, [R2,#0xBC]\n"
92	"STR R1, [R2,#0xCC]\n"
93	"STR R1, [R2,#0xDC]\n"
94	"STR R1, [R2,#0xEC]\n"
95	"STR R1, [R2,#0xFC]\n"
96	"LDR R1, =0xC0400008\n"
97	"LDR R2, =0x430005\n"
98	"STR R2, [R1]\n"
99	"MOV R1, #1\n"
100	"LDR R2, =0xC0243100\n"
101	"STR R2, [R1]\n"
102	"LDR R2, =0xC0242010\n"
103	"LDR R1, [R2]\n"
104	"ORR R1, R1, #1\n"
105	"STR R1, [R2]\n"
106	"LDR R0, =0xFFC0C138\n"
107	"LDR R1, =0x1900\n" // MEMBASEADDR=0x1900
108	"LDR R3, =0xE90C\n"
109	"loc_FF81013C:\n"
110	"CMP R1, R3\n"
111	"LDRCC R2, [R0],#4\n"
112	"STRCC R2, [R1],#4\n"
113	"BCC loc_FF81013C\n"
114	"LDR R1, =0x1411E8\n"
115	"MOV R2, #0\n"
116	"loc_FF810154:\n"
117	"CMP R3, R1\n"
118	"STRCC R2, [R3],#4\n"
119	"BCC loc_FF810154\n"
120	//"B loc_FF810354\n"
121	"B sub_FF810354_my\n"
122	);
123	};
124
125	void __attribute__((naked,noinline)) sub_FF810354_my() {
126
127	(int)0x1930=(int)taskCreateHook;
128	(int)0x1934=(int)taskCreateHook2;
129	(int)0x1938=(int)taskCreateHook;
130
131	/* Power ON/OFF detection */
132	(int)(0x25C8)= ((int)0xC0220108)&1 ? 0x1000000 : 0x2000000; // replacement for correct power-on.
133	asm volatile (
134
135	"loc_FF810354:\n"
136	" LDR R0, =0xFF8103CC\n"
137	" MOV R1, #0\n"
138	" LDR R3, =0xFF810404\n"
139	"loc_FF810360:\n"
140	" CMP R0, R3\n"
141	" LDRCC R2, [R0],#4\n"
142	" STRCC R2, [R1],#4\n"
143	" BCC loc_FF810360\n"
144	" LDR R0, =0xFF810404\n"
145	" MOV R1, #0x4B0\n"
146	" LDR R3, =0xFF810618\n"
147	"loc_FF81037C:\n"
148	" CMP R0, R3\n"
149	" LDRCC R2, [R0],#4\n"
150	" STRCC R2, [R1],#4\n"
151	" BCC loc_FF81037C\n"
152	" MOV R0, #0xD2\n"
153	" MSR CPSR_cxsf, R0\n"
154	" MOV SP, #0x1000\n"
155	" MOV R0, #0xD3\n"
156	" MSR CPSR_cxsf, R0\n"
157	" MOV SP, #0x1000\n"
158	" LDR R0, =0x6C4\n"
159	" LDR R2, =0xEEEEEEEE\n"
160	" MOV R3, #0x1000\n"
161	"loc_FF8103B0:\n"
162	" CMP R0, R3\n"
163	" STRCC R2, [R0],#4\n"
164	" BCC loc_FF8103B0\n"
165	//" BL sub_FF811178\n"
166	"BL sub_FF811178_my\n" // ----->
167	"loc_FF8103C0:\n"
168	"ANDEQ R0, R0, R4,ASR#13\n"
169
170	"loc_FF8103C4:\n"
171	"ANDEQ R0, R0, R0,ROR R6\n"
172
173	"loc_FF8103C8:\n"
174	"ANDEQ R0, R0, R4,ROR R6\n"
175	"NOP\n"
176	"LDR PC, =0xFF810618\n"
177	);
178
179	};
180
181	void __attribute__((naked,noinline)) sub_FF811178_my() {
182	asm volatile (
183
184	"STR LR, [SP,#-4]!\n"
185	"SUB SP, SP, #0x74\n"
186	"MOV R0, SP\n"
187	"MOV R1, #0x74\n"
188	"BL sub_FFB3C97C\n"
189	"MOV R0, #0x53000\n"
190	"STR R0, [SP,#4]\n"
191	// "LDR R0, =0x1411E8\n"
192	"LDR R0, =new_sa\n" // +
193	"LDR R0, [R0]\n" // +
194	"LDR R2, =0x379C00\n"
195	"LDR R1, =0x3724A8\n"
196	"STR R0, [SP,#8]\n"
197	"SUB R0, R1, R0\n"
198	"ADD R3, SP, #0xC\n"
199	"STR R2, [SP]\n"
200	"STMIA R3, {R0-R2}\n"
201	"MOV R0, #0x22\n"
202	"STR R0, [SP,#0x18]\n"
203	"MOV R0, #0x68\n"
204	"STR R0, [SP,#0x1C]\n"
205	"LDR R0, =0x19B\n"
206	//"LDR R1, =sub_FF815E34\n"
207	"LDR R1, =sub_FF815E34_my\n" //+ ---------->
208	"STR R0, [SP,#0x20]\n"
209	"MOV R0, #0x96\n"
210	"STR R0, [SP,#0x24]\n"
211	"MOV R0, #0x78\n"
212	"STR R0, [SP,#0x28]\n"
213	"MOV R0, #0x64\n"
214	"STR R0, [SP,#0x2C]\n"
215	"MOV R0, #0\n"
216	"STR R0, [SP,#0x30]\n"
217	"STR R0, [SP,#0x34]\n"
218	"MOV R0, #0x10\n"
219	"STR R0, [SP,#0x5C]\n"
220	"MOV R0, #0x800\n"
221	"STR R0, [SP,#0x60]\n"
222	"MOV R0, #0xA0\n"
223	"STR R0, [SP,#0x64]\n"
224	"MOV R0, #0x280\n"
225	"STR R0, [SP,#0x68]\n"
226	"MOV R0, SP\n"
227	"MOV R2, #0\n"
228	"BL sub_FF8133E4\n"
229	"ADD SP, SP, #0x74\n"
230	"LDR PC, [SP],#4\n"
231	);
232	};
233
234
235	void __attribute__((naked,noinline)) sub_FF815E34_my() {
236	asm volatile (
237
238	"STMFD SP!, {R4,LR}\n"
239	"BL sub_FF810B08\n"
240	"BL sub_FF81A148\n"
241	"CMP R0, #0\n"
242	"LDRLT R0, =0xFF815F48\n"
243	"BLLT sub_FF815F28\n"
244	"BL sub_FF815A70\n"
245	"CMP R0, #0\n"
246	"LDRLT R0, =0xFF815F50\n"
247	"BLLT sub_FF815F28\n"
248	"LDR R0, =0xFF815F60\n"
249	"BL sub_FF815B58\n"
250	"CMP R0, #0\n"
251	"LDRLT R0, =0xFF815F68\n"
252	"BLLT sub_FF815F28\n"
253	"LDR R0, =0xFF815F60\n"
254	"BL sub_FF813BE0\n"
255	"CMP R0, #0\n"
256	"LDRLT R0, =0xFF815F7C\n"
257	"BLLT sub_FF815F28\n"
258	"BL sub_FF819B5C\n"
259	"CMP R0, #0\n"
260	"LDRLT R0, =0xFF815F88\n"
261	"BLLT sub_FF815F28\n"
262	"BL sub_FF81165C\n"
263	"CMP R0, #0\n"
264	"LDRLT R0, =0xFF815F94\n"
265	"BLLT sub_FF815F28\n"
266	"LDMFD SP!, {R4,LR}\n"
267	//"B sub_FF81F868\n"
268	"B taskcreate_Startup_my\n" //---------->
269	);
270	};
271
272	void __attribute__((naked,noinline)) taskcreate_Startup_my() {
273
274	asm volatile (
275	"STMFD SP!, {R3,LR}\n"
276	"BL sub_FF8332FC\n"
277	"BL sub_FF83AC38\n"
278	"CMP R0, #0\n"
279	"BNE loc_FF81F8AC\n"
280	"BL sub_FF834A68\n"
281	"CMP R0, #0\n"
282	"BNE loc_FF81F8AC\n"
283	"BL sub_FF8332F8\n"
284	"CMP R0, #0\n"
285	"BNE loc_FF81F8AC\n"
286	"BL sub_FF8329D4\n"
287	"LDR R1, =0xC0220000\n"
288	"MOV R0, #0x44\n"
289	"STR R0, [R1,#0x1C]\n"
290	"BL sub_FF832BC4\n"
291	"loc_FF81F8A8:\n"
292	"B loc_FF81F8A8\n"
293	"loc_FF81F8AC:\n"
294	//"BL sub_FF832BC4\n"// removed, see boot() function
295	"BL sub_FF833300\n"
296	"BL sub_FF838EE8\n"
297	"MOV R0, #0x46\n"
298	"BL sub_FF839070\n"
299	"LDR R1, =0x3CE000\n"
300	"MOV R0, #0\n"
301	"BL sub_FF839330\n"
302	"BL sub_FF8390DC\n"
303	"MOV R3, #0\n"
304	"STR R3, [SP]\n"
305	//"ADR R3, 0xFF81F804\n" // -
306	"LDR R3, =task_Startup_my\n" //+ ----------->
307	"MOV R2, #0\n"
308	"MOV R1, #0x19\n"
309	"LDR R0, =0xFF81F8FC\n"
310	"BL sub_FF81E5B4\n"
311	"MOV R0, #0\n"
312	"LDMFD SP!, {R12,PC}\n"
313	);
314	};
315
316	void __attribute__((naked,noinline)) task_Startup_my() {
317
318	asm volatile (
319	"STMFD SP!, {R4,LR}\n"
320	"BL sub_FF816490\n"
321	"BL sub_FF8343EC\n"
322	"BL sub_FF832674\n"
323	"BL sub_FF83AC78\n"
324	"BL sub_FF83AE5C\n"
325	//"BL sub_FF83AD0C\n" // Skip starting diskboot.bin again
326	"BL sub_FF83B000\n"
327	"BL sub_FF831370\n"
328	"BL sub_FF83AE8C\n"
329	"BL sub_FF83868C\n"
330	"BL sub_FF83B004\n"
331	//"BL sub_FF8331F4\n" //taskcreate_PhySw
332	);
333	CreateTask_spytask(); // +
334	CreateTask_PhySw(); // +
335
336	asm volatile (
337	"BL sub_FF8365E8\n"
338	"BL sub_FF83B01C\n"
339	"BL sub_FF8306A8\n"
340	"BL sub_FF831FCC\n"
341	"BL sub_FF83AA10\n"
342	"BL sub_FF832628\n"
343	"BL sub_FF831ED8\n"
344	"BL sub_FF8313A4\n"
345	"BL sub_FF83BC30\n"
346	"BL sub_FF831EB0\n"
347	"LDMFD SP!, {R4,LR}\n"
348	"B sub_FF8165B0\n"
349	);
350	};
351
352	void CreateTask_spytask() {
353	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
354	};
355
356	void __attribute__((naked,noinline)) CreateTask_PhySw() {
357	asm volatile (
358	"STMFD SP!, {R3-R5,LR}\n"
359	"LDR R4, =0x1C38\n"
360	"LDR R0, [R4,#0x10]\n"
361	"CMP R0, #0\n"
362	"BNE loc_FF833228\n"
363	"MOV R3, #0\n"
364	"STR R3, [SP]\n"
365	"LDR R3, =mykbd_task\n" // task_phySw
366	// "LDR R3, =0xFF8331C0\n" // task_phySw
367
368	// "MOV R2, #0x800\n"
369	"MOV R2, #0x2000\n" // greater Stacksize
370
371	"MOV R1, #0x17\n"
372	"LDR R0, =0xFF833400\n" //phySw
373	"BL sub_FF839130\n" //KernelCreateTask
374	"STR R0, [R4,#0x10]\n"
375	"loc_FF833228:\n"
376	"BL sub_FF860858\n"
377	"BL sub_FF88BA38\n"
378	"BL sub_FF834A0C\n"
379	"CMP R0, #0\n"
380	"LDREQ R1, =0x32584\n"
381	"LDMEQFD SP!, {R3-R5,LR}\n"
382	"BEQ sub_FF88B9C0\n"
383	"LDMFD SP!, {R3-R5,PC}\n"
384	"NOP\n"
385	);
386	};
387
388	void __attribute__((naked,noinline)) init_file_modules_task() {
389	asm volatile (
390	"STMFD SP!, {R4-R6,LR}\n"
391	"BL sub_FF88DE80\n"
392	"LDR R5, =0x5006\n"
393	"MOVS R4, R0\n"
394	"MOVNE R1, #0\n"
395	"MOVNE R0, R5\n"
396	"BLNE sub_FF8930EC\n"
397	/* "BL sub_FF88DEAC\n" */ // -
398	"BL sub_FF88DEAC_my\n" //----------->
399	"BL core_spytask_can_start\n" // +
400	"CMP R4, #0\n"
401	"MOVEQ R0, R5\n"
402	"LDMEQFD SP!, {R4-R6,LR}\n"
403	"MOVEQ R1, #0\n"
404	"BEQ sub_FF8930EC\n"
405	"LDMFD SP!, {R4-R6,PC}\n"
406	);
407	};
408
409	void __attribute__((naked,noinline)) sub_FF88DEAC_my() {
410	asm volatile (
411	"STMFD SP!, {R4,LR}\n"
412	"MOV R0, #3\n"
413	//"BL sub_FF86F85C\n" //-
414	"BL sub_FF86F85C_my\n" // ---------->
415	"BL sub_FF94870C\n"
416	"LDR R4, =0x3030\n"
417	"LDR R0, [R4,#4]\n"
418	"CMP R0, #0\n"
419	"BNE loc_FF88DEE4\n"
420	"BL sub_FF86EB68\n"
421	"BL sub_FF93C750\n"
422	"BL sub_FF86EB68\n"
423	"BL sub_FF86AE64\n"
424	"BL sub_FF86EA68\n"
425	"BL sub_FF93C818\n"
426	"loc_FF88DEE4:\n"
427	"MOV R0, #1\n"
428	"STR R0, [R4]\n"
429	"LDMFD SP!, {R4,PC}\n"
430	);
431	};
432
433
434	void __attribute__((naked,noinline)) sub_FF86F85C_my() {
435	asm volatile (
436	"STMFD SP!, {R4-R8,LR}\n"
437	"MOV R8, R0\n"
438	"BL sub_FF86F7DC\n"
439	"LDR R1, =0x375F0\n"
440	"MOV R6, R0\n"
441	"ADD R4, R1, R0,LSL#7\n"
442	"LDR R0, [R4,#0x6C]\n"
443	"CMP R0, #4\n"
444	"LDREQ R1, =0x804\n"
445	"LDREQ R0, =0xFF86F328\n"
446	"BLEQ sub_FF81E88C\n"
447	"MOV R1, R8\n"
448	"MOV R0, R6\n"
449	"BL sub_FF86F07C\n"
450	"LDR R0, [R4,#0x38]\n"
451	"BL sub_FF86FE78\n"
452	"CMP R0, #0\n"
453	"STREQ R0, [R4,#0x6C]\n"
454	"MOV R0, R6\n"
455	"BL sub_FF86F10C\n"
456	"MOV R0, R6\n"
457	// "BL sub_FF86F490\n" //-
458	"BL sub_FF86F490_my\n" //----------->
459	"MOV R5, R0\n"
460	"MOV R0, R6\n"
461	"BL sub_FF86F6B8\n"
462	"LDR R6, [R4,#0x3C]\n"
463	"AND R7, R5, R0\n"
464	"CMP R6, #0\n"
465	"LDR R1, [R4,#0x38]\n"
466	"MOVEQ R0, #0x80000001\n"
467	"MOV R5, #0\n"
468	"BEQ loc_FF86F90C\n"
469	"MOV R0, R1\n"
470
471	"BL sub_FF86ECD0\n"
472	"CMP R0, #0\n"
473	"MOVNE R5, #4\n"
474	"CMP R6, #5\n"
475	"ORRNE R0, R5, #1\n"
476	"BICEQ R0, R5, #1\n"
477	"CMP R7, #0\n"
478	"BICEQ R0, R0, #2\n"
479	"ORREQ R0, R0, #0x80000000\n"
480	"BICNE R0, R0, #0x80000000\n"
481	"ORRNE R0, R0, #2\n"
482
483	"loc_FF86F90C:\n"
484	"CMP R8, #7\n"
485	"STR R0, [R4,#0x40]\n"
486	"LDMNEFD SP!, {R4-R8,PC}\n"
487	"MOV R0, R8\n"
488	"BL sub_FF86F82C\n"
489	"CMP R0, #0\n"
490	"LDMEQFD SP!, {R4-R8,LR}\n"
491	"LDREQ R0, =0xFF86F958\n"
492	"BEQ sub_FF81175C\n" //qPrintf
493	"LDMFD SP!, {R4-R8,PC}\n"
494	);
495	};
496
497	void __attribute__((naked,noinline)) sub_FF86F490_my() {
498
499	asm volatile (
500	"STMFD SP!, {R4-R6,LR}\n"
501	"MOV R5, R0\n"
502	"LDR R0, =0x375F0\n"
503	"ADD R4, R0, R5,LSL#7\n"
504	"LDR R0, [R4,#0x6C]\n"
505	"TST R0, #2\n"
506	"MOVNE R0, #1\n"
507	"LDMNEFD SP!, {R4-R6,PC}\n"
508	"LDR R0, [R4,#0x38]\n"
509	"MOV R1, R5\n"
510	// "BL sub_FF86F18C\n" // -
511	"BL sub_FF86F18C_my\n" // --------->
512	"CMP R0, #0\n"
513	"LDRNE R0, [R4,#0x38]\n"
514	"MOVNE R1, R5\n"
515	"BLNE sub_FF86F34C\n"
516	"LDR R2, =0x37670\n"
517	"ADD R1, R5, R5,LSL#4\n"
518	"LDR R1, [R2,R1,LSL#2]\n"
519	"CMP R1, #4\n"
520	"BEQ loc_FF86F4F0\n"
521	"CMP R0, #0\n"
522	"LDMEQFD SP!, {R4-R6,PC}\n"
523	"MOV R0, R5\n"
524	"BL sub_FF86ED60\n"
525
526	"loc_FF86F4F0:\n"
527	"CMP R0, #0\n"
528	"LDRNE R1, [R4,#0x6C]\n"
529	"ORRNE R1, R1, #2\n"
530	"STRNE R1, [R4,#0x6C]\n"
531	"LDMFD SP!, {R4-R6,PC}\n"
532	);
533	};
534
535	void __attribute__((naked,noinline)) sub_FF86F18C_my() {
536	asm volatile (
537	"STMFD SP!, {R4-R10,LR}\n"
538	" MOV R9, R0\n"
539	" LDR R0, =0x375F0\n"
540	" MOV R8, #0\n"
541	" ADD R5, R0, R1,LSL#7\n"
542	" LDR R0, [R5,#0x3C]\n"
543	" MOV R7, #0\n"
544	" CMP R0, #7\n"
545	" MOV R6, #0\n"
546	" ADDLS PC, PC, R0,LSL#2\n"
547	" B loc_FF86F2E4\n"
548	"loc_FF86F1B8:\n"
549	" B loc_FF86F1F0\n"
550	"loc_FF86F1BC:\n"
551	" B loc_FF86F1D8\n"
552	"loc_FF86F1C0:\n"
553	" B loc_FF86F1D8\n"
554	"loc_FF86F1C4:\n"
555	" B loc_FF86F1D8\n"
556	"loc_FF86F1C8:\n"
557	" B loc_FF86F1D8\n"
558	"loc_FF86F1CC:\n"
559	" B loc_FF86F2DC\n"
560	"loc_FF86F1D0:\n"
561	" B loc_FF86F1D8\n"
562	"loc_FF86F1D4:\n"
563	" B loc_FF86F1D8\n"
564	"loc_FF86F1D8:\n"
565	" MOV R2, #0\n"
566	" MOV R1, #0x200\n"
567	" MOV R0, #2\n"
568	" BL sub_FF887EBC\n"
569	" MOVS R4, R0\n"
570	" BNE loc_FF86F1F8\n"
571	"loc_FF86F1F0:\n"
572	" MOV R0, #0\n"
573	" LDMFD SP!, {R4-R10,PC}\n"
574	"loc_FF86F1F8:\n"
575	" LDR R12, [R5,#0x50]\n"
576	" MOV R3, R4\n"
577	" MOV R2, #1\n"
578	" MOV R1, #0\n"
579	" MOV R0, R9\n"
580	" BLX R12\n"
581	" CMP R0, #1\n"
582	" BNE loc_FF86F224\n"
583	" MOV R0, #2\n"
584	" BL sub_FF888008\n"
585	" B loc_FF86F1F0\n"
586	"loc_FF86F224:\n"
587	" LDR R1, [R5,#0x64]\n"
588	" MOV R0, R9\n"
589	" BLX R1\n"
590
591	"MOV R1, R4\n" // pointer to MBR in R1
592	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
593
594	// Start of DataGhost's FAT32 autodetection code
595	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
596	// According to the code below, we can use R1, R2, R3 and R12.
597	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
598	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
599	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
600	"MOV LR, R4\n" // Save old offset for MBR signature
601	"MOV R1, #1\n" // Note the current partition number
602	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
603	"dg_sd_fat32:\n"
604	"CMP R1, #4\n" // Did we already see the 4th partition?
605	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
606	"ADD R12, R12, #0x10\n" // Second partition
607	"ADD R1, R1, #1\n" // Second partition for the loop
608	"dg_sd_fat32_enter:\n"
609	"LDRB R2, [R12, #0x1BE]\n" // Partition status
610	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
611	"CMP R3, #0xB\n" // Is this a FAT32 partition?
612	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
613	"BNE dg_sd_fat32\n" // No, it isn't.
614	"CMP R2, #0x00\n" // It is, check the validity of the partition type
615	"CMPNE R2, #0x80\n"
616	"BNE dg_sd_fat32\n" // Invalid, go to next partition
617	// This partition is valid, it's the first one, bingo!
618	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
619
620	"dg_sd_fat32_end:\n"
621	// End of DataGhost's FAT32 autodetection code
622
623
624
625	" LDRB R1, [R4,#0x1C9]\n"
626	" LDRB R3, [R4,#0x1C8]\n"
627	" LDRB R12, [R4,#0x1CC]\n"
628	" MOV R1, R1,LSL#24\n"
629	" ORR R1, R1, R3,LSL#16\n"
630	" LDRB R3, [R4,#0x1C7]\n"
631	" LDRB R2, [R4,#0x1BE]\n"
632	//" LDRB LR, [R4,#0x1FF]\n" // replaced, see below
633	" ORR R1, R1, R3,LSL#8\n"
634	" LDRB R3, [R4,#0x1C6]\n"
635	" CMP R2, #0\n"
636	" CMPNE R2, #0x80\n"
637	" ORR R1, R1, R3\n"
638	" LDRB R3, [R4,#0x1CD]\n"
639	" MOV R3, R3,LSL#24\n"
640	" ORR R3, R3, R12,LSL#16\n"
641	" LDRB R12, [R4,#0x1CB]\n"
642	" ORR R3, R3, R12,LSL#8\n"
643	" LDRB R12, [R4,#0x1CA]\n"
644	" ORR R3, R3, R12\n"
645	//" LDRB R12, [R4,#0x1FE]\n" // replaced, see below
646
647	"LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55)
648	"LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA)
649
650
651	" BNE loc_FF86F2B0\n"
652	" CMP R0, R1\n"
653	" BCC loc_FF86F2B0\n"
654	" ADD R2, R1, R3\n"
655	" CMP R2, R0\n"
656	" CMPLS R12, #0x55\n"
657	" CMPEQ LR, #0xAA\n"
658	" MOVEQ R7, R1\n"
659	" MOVEQ R6, R3\n"
660	" MOVEQ R4, #1\n"
661	" BEQ loc_FF86F2B4\n"
662	"loc_FF86F2B0:\n"
663	" MOV R4, R8\n"
664	"loc_FF86F2B4:\n"
665	" MOV R0, #2\n"
666	" BL sub_FF888008\n"
667	" CMP R4, #0\n"
668	" BNE loc_FF86F2F0\n"
669	" LDR R1, [R5,#0x64]\n"
670	" MOV R7, #0\n"
671	" MOV R0, R9\n"
672	" BLX R1\n"
673	" MOV R6, R0\n"
674	" B loc_FF86F2F0\n"
675	"loc_FF86F2DC:\n"
676	" MOV R6, #0x40\n"
677	" B loc_FF86F2F0\n"
678	"loc_FF86F2E4:\n"
679	" LDR R1, =0x568\n"
680	" LDR R0, =0xFF86F328\n"
681	" BL sub_FF81E88C\n"
682	"loc_FF86F2F0:\n"
683	" STR R7, [R5,#0x44]!\n"
684	" STMIB R5, {R6,R8}\n"
685	" MOV R0, #1\n"
686	" LDMFD SP!, {R4-R10,PC}\n"
687	);
688	};
689
690	void __attribute__((naked,noinline)) sub_FF860490_my() {
691	asm volatile (
692	"LDR R0, =0x25D0\n"
693	"LDR R0, [R0,#8]\n"
694	"B sub_FF838B20\n"
695	);
696	};
697	void __attribute__((naked,noinline)) JogDial_task_my() {
698	asm volatile (
699	"STMFD SP!, {R4-R11,LR}\n"
700	"SUB SP, SP, #0x2C\n"
701	"BL sub_FF8608AC\n"
702	"LDR R1, =0x25D0\n"
703	"LDR R8, =0xFFB47658\n"
704	"MOV R0, #0\n"
705	"ADD R2, SP, #0x14\n"
706	"ADD R3, SP, #0x18\n"
707	"ADD R10, SP, #0x5C\n"
708	"ADD R9, SP, #0x10\n"
709	"MOV R7, #0\n"
710	"loc_FF860530:\n"
711	"ADD R3, SP, #0x188\n"
712	"ADD R12, R3, R0,LSL#1\n"
713	"ADD R2, SP, #0x14\n"
714	"STRH R7, [R12]\n"
715	"ADD R12, R2, R0,LSL#1\n"
716	"STRH R7, [R12]\n"
717	"STR R7, [R9,R0,LSL#2]\n"
718	"STR R7, [R10,R0,LSL#2]\n"
719	"ADD R0, R0, #1\n"
720	"CMP R0, #1\n"
721	"BLT loc_FF860530\n"
722	"loc_FF86055C:\n"
723	"LDR R0, =0x25D0\n"
724	"MOV R2, #0\n"
725	"LDR R0, [R0,#8]\n"
726	"ADD R1, SP, #0x4\n"
727	"BL sub_FF83891C\n"
728	"TST R0, #1\n"
729	"LDRNE R1, =0x226\n"
730	"LDRNE R0, =0xFF8607E0\n"
731	"BLNE sub_FF81E88C\n"
732
733	//------------------ added code ---------------------
734	"labelA:\n"
735	"LDR R0, =jogdial_stopped\n"
736	"LDR R0, [R0]\n"
737	"CMP R0, #1\n"
738	"BNE labelB\n"
739	"MOV R0, #40\n"
740	"BL _SleepTask\n"
741	"B labelA\n"
742	"labelB:\n"
743	//------------------ original code ------------------
744
745	"LDR R0, [SP,#0x4]\n"
746	"AND R4, R0, #0xFF\n"
747	"AND R0, R0, #0xFF00\n"
748	"CMP R0, #0x100\n"
749	"BEQ loc_FF8605E0\n"
750	"CMP R0, #0x200\n"
751	"BEQ loc_FF860618\n"
752	"CMP R0, #0x300\n"
753	"BEQ loc_FF86082C\n"
754	"CMP R0, #0x400\n"
755	"BNE loc_FF86055C\n"
756	"CMP R4, #0\n"
757	"LDRNE R1, =0x2CA\n"
758	"LDRNE R0, =0xFF8607E0\n"
759	"BLNE sub_FF81E88C\n"
760	"LDR R2, =0xFFB47644\n"
761	"ADD R0, R4, R4,LSL#2\n"
762	"LDR R1, [R2,R0,LSL#2]\n"
763	"STR R7, [R1]\n"
764	"MOV R1, #1\n"
765	"ADD R0, R2, R0,LSL#2\n"
766	"loc_FF8605D4:\n"
767	"LDR R0, [R0,#8]\n"
768	"STR R1, [R0]\n"
769	"B loc_FF86055C\n"
770	"loc_FF8605E0:\n"
771	"LDR R5, =0x25E0\n"
772	"LDR R0, [R5,R4,LSL#2]\n"
773	"BL sub_FF8398B4\n"
774	//"ADR R2, sub_FF860490\n"
775	"ADRL R2, sub_FF860490_my\n" //+
776	"MOV R1, R2\n"
777	"ORR R3, R4, #0x200\n"
778	"MOV R0, #0x28\n"
779	"BL sub_FF8397D0\n"
780	"TST R0, #1\n"
781	"CMPNE R0, #0x15\n"
782	"STR R0, [R10,R4,LSL#2]\n"
783	"BEQ loc_FF86055C\n"
784	"LDR R1, =0x23B\n"
785	"B loc_FF8607D0\n"
786	"loc_FF860618:\n"
787	"LDR R1, =0xFFB47644\n"
788	"ADD R0, R4, R4,LSL#2\n"
789	"STR R0, [SP,#0x28]\n"
790	"ADD R0, R1, R0,LSL#2\n"
791	"STR R0, [SP,#0x24]\n"
792	"LDR R0, [R0,#4]\n"
793	"LDR R0, [R0]\n"
794	"MOV R2, R0,ASR#16\n"
795	"ADD R0, SP, #0x18\n"
796	"ADD R0, R0, R4,LSL#1\n"
797	"STR R0, [SP,#0x20]\n"
798	"STRH R2, [R0]\n"
799	"ADD R0, SP, #0x14\n"
800	"ADD R0, R0, R4,LSL#1\n"
801	"STR R0, [SP,#0x1C]\n"
802	"LDRSH R3, [R0]\n"
803	"SUB R0, R2, R3\n"
804	"CMP R0, #0\n"
805	"BEQ loc_FF860788\n"
806	"MOV R1, R0\n"
807	"RSBLT R0, R0, #0\n"
808	"MOVLE R5, #0\n"
809	"MOVGT R5, #1\n"
810	"CMP R0, #0xFF\n"
811	"BLS loc_FF8606A4\n"
812	"CMP R1, #0\n"
813	"RSBLE R0, R3, #0xFF\n"
814	"ADDLE R0, R0, #0x7F00\n"
815	"ADDLE R0, R0, R2\n"
816	"RSBGT R0, R2, #0xFF\n"
817	"ADDGT R0, R0, #0x7F00\n"
818	"ADDGT R0, R0, R3\n"
819	"ADD R0, R0, #0x8000\n"
820	"ADD R0, R0, #1\n"
821	"EOR R5, R5, #1\n"
822	"loc_FF8606A4:\n"
823	"STR R0, [SP,#0x8]\n"
824	"LDR R0, [R9,R4,LSL#2]\n"
825	"CMP R0, #0\n"
826	"BEQ loc_FF8606F4\n"
827	"LDR R1, =0xFFB4763C\n"
828	"ADD R1, R1, R4,LSL#3\n"
829	"LDR R1, [R1,R5,LSL#2]\n"
830	"CMP R1, R0\n"
831	"BEQ loc_FF860710\n"
832	"ADD R11, R4, R4,LSL#1\n"
833	"ADD R6, R8, R11,LSL#2\n"
834	"LDRB R0, [R6,#9]\n"
835	"CMP R0, #1\n"
836	"LDREQ R0, [R6,#4]\n"
837	"BLEQ sub_FF894F4C\n"
838	"LDRB R0, [R6,#8]\n"
839	"CMP R0, #1\n"
840	"BNE loc_FF860710\n"
841	"LDR R0, [R8,R11,LSL#2]\n"
842	"B loc_FF86070C\n"
843	"loc_FF8606F4:\n"
844	"ADD R0, R4, R4,LSL#1\n"
845	"ADD R1, R8, R0,LSL#2\n"
846	"LDRB R1, [R1,#8]\n"
847	"CMP R1, #1\n"
848	"BNE loc_FF860710\n"
849	"LDR R0, [R8,R0,LSL#2]\n"
850	"loc_FF86070C:\n"
851	"BL sub_FF894F4C\n"
852	"loc_FF860710:\n"
853	"LDR R0, =0xFFB4763C\n"
854	"LDR R1, [SP,#0x8]\n"
855	"ADD R6, R0, R4,LSL#3\n"
856	"LDR R0, [R6,R5,LSL#2]\n"
857	"BL sub_FF894E7C\n"
858	"LDR R0, [R6,R5,LSL#2]\n"
859	"STR R0, [R9,R4,LSL#2]\n"
860	"LDR R0, [SP,#0x20]\n"
861	"LDR R1, [SP,#0x1C]\n"
862	"LDRH R0, [R0]\n"
863	"STRH R0, [R1]\n"
864	"ADD R0, R4, R4,LSL#1\n"
865	"ADD R0, R8, R0,LSL#2\n"
866	"LDRB R0, [R0,#9]\n"
867	"CMP R0, #1\n"
868	"BNE loc_FF860788\n"
869	"LDR R5, =0x25E0\n"
870	"LDR R0, [R5,R4,LSL#2]\n"
871	"BL sub_FF8398B4\n"
872	"LDR R2, =0xFF86049C\n"
873	"MOV R1, R2\n"
874	"ORR R3, R4, #0x300\n"
875	"MOV R0, #0x1F4\n"
876	"BL sub_FF8397D0\n"
877	"TST R0, #1\n"
878	"CMPNE R0, #0x15\n"
879	"STR R0, [R5,R4,LSL#2]\n"
880	"LDRNE R0, =0xFF8607E0\n"
881	"MOVNE R1, #0x2A4\n"
882	"BLNE sub_FF81E88C\n"
883	"loc_FF860788:\n"
884	"ADD R0, R4, R4,LSL#1\n"
885	"ADD R0, R8, R0,LSL#2\n"
886	"LDRB R0, [R0,#0xA]\n"
887	"CMP R0, #1\n"
888	"BNE loc_FF860810\n"
889	"LDR R0, =0x25D0\n"
890	"LDR R0, [R0,#0xC]\n"
891	"CMP R0, #0\n"
892	"BEQ loc_FF860810\n"
893	// "ADR R2, sub_FF860490\n"
894	"ADRL R2, sub_FF860490_my\n" //+
895	"MOV R1, R2\n"
896	"ORR R3, R4, #0x400\n"
897	"BL sub_FF8397D0\n"
898	"TST R0, #1\n"
899	"CMPNE R0, #0x15\n"
900	"STR R0, [R10,R4,LSL#2]\n"
901	"BEQ loc_FF86055C\n"
902	"LDR R1, =0x2AF\n"
903	"loc_FF8607D0:\n"
904	"LDR R0, =0xFF8607E0\n"
905	"BL sub_FF81E88C\n"
906	"B loc_FF86055C\n"
907
908	"loc_FF860810:\n"
909	"LDR R1, =0xFFB47644\n"
910	"LDR R0, [SP,#40]\n"
911	"LDR R0, [R1,R0,LSL#2]\n"
912	"STR R7, [R0]\n"
913	"LDR R0, [SP,#36]\n"
914	"MOV R1, #1\n"
915	"B loc_FF8605D4\n"
916	"loc_FF86082C:\n"
917	"LDR R0, [R9,R4,LSL#2]\n"
918	"CMP R0, #0\n"
919	"MOVEQ R1, #0x2BC\n"
920	"LDREQ R0, =0xFF8607E0\n"
921	"BLEQ sub_FF81E88C\n"
922	"ADD R0, R4, R4,LSL#1\n"
923	"ADD R0, R8, R0,LSL#2\n"
924	"LDR R0, [R0,#4]\n"
925	"BL sub_FF894F4C\n"
926	"STR R7, [R9,R4,LSL#2]\n"
927	"B loc_FF86055C\n"
928	);
929	};
930

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source: trunk/platform/g11/sub/100f/boot.c @ 955

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