| 1 | // G10 1.03b |
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| 2 | #include "lolevel.h" |
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| 3 | #include "platform.h" |
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| 4 | #include "core.h" |
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| 5 | #include "stdlib.h" |
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| 6 | #include "gui.h" |
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| 7 | #include "../../../../core/gui_draw.h" |
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| 8 | |
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| 9 | const char * const new_sa = &_end; |
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| 10 | |
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| 11 | #define LED_ISO (void*) 0xC02200D0 // G10 ISO select dial LED |
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| 12 | #define LED_DP (void*) 0xC02200D4 // G10 direct print button LED |
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| 13 | #define LED_ECL (void*) 0xC02200D8 // G10 exposure compensation dial LED |
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| 14 | #define LED_PWR (void*) 0xC02200DC // G10 power LED |
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| 15 | |
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| 16 | // Forward declarations |
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| 17 | void CreateTask_PhySw(); |
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| 18 | void CreateTask_spytask(); |
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| 19 | extern volatile int jogdial_stopped; |
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| 20 | void JogDial_task_my(void); |
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| 21 | |
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| 22 | enum Gui_Mode gui_get_mode() ; |
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| 23 | |
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| 24 | void __attribute__((naked,noinline)) task_blinker() { |
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| 25 | |
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| 26 | int pwr_led_count = 0 ; |
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| 27 | int blue_led_count = 0 ; |
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| 28 | int gui_mode, gui_mode_flag = GUI_MODE_NONE ; |
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| 29 | |
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| 30 | volatile long *pwr_LED = (void*)LED_PWR; |
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| 31 | volatile long *blue_LED = (void*)LED_DP; |
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| 32 | |
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| 33 | _SleepTask(2000); |
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| 34 | |
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| 35 | while(1){ |
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| 36 | |
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| 37 | gui_mode = gui_get_mode() ; |
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| 38 | |
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| 39 | if(( (gui_mode == GUI_MODE_ALT) && (gui_mode_flag != GUI_MODE_ALT) ) || ( (gui_mode == GUI_MODE_NONE) && (gui_mode_flag != GUI_MODE_NONE) ) ) |
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| 40 | { |
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| 41 | gui_mode_flag = gui_mode ; |
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| 42 | blue_led_count = 10 ; |
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| 43 | *blue_LED = 0x46; |
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| 44 | } |
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| 45 | if ( blue_led_count > 0 ) |
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| 46 | { |
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| 47 | if ( --blue_led_count == 0 ) |
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| 48 | { |
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| 49 | *blue_LED = 0x44; |
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| 50 | } |
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| 51 | } |
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| 52 | |
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| 53 | if ( pwr_led_count == 2 ) |
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| 54 | { |
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| 55 | *pwr_LED = 0x44; |
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| 56 | } |
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| 57 | if ( --pwr_led_count <= 0 ) |
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| 58 | { |
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| 59 | pwr_led_count = 20 ; |
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| 60 | *pwr_LED = 0x46; |
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| 61 | } |
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| 62 | |
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| 63 | _SleepTask(100); |
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| 64 | } |
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| 65 | }; |
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| 66 | |
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| 67 | void CreateTask_Blinker() { |
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| 68 | _CreateTask("Blinker", 0x1, 0x200, task_blinker, 0); |
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| 69 | }; |
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| 70 | |
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| 71 | |
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| 72 | void taskCreateHook(int *p) { |
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| 73 | p-=17; |
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| 74 | |
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| 75 | if (p[0]==0xff882ea8) p[0]=(int)init_file_modules_task; |
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| 76 | if (p[0]==0xff862c0c) p[0]=(int)movie_record_task; |
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| 77 | if (p[0]==0xff866bfc) p[0]=(int)capt_seq_task; |
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| 78 | if (p[0]==0xff8ab0e0) p[0]=(int)exp_drv_task; |
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| 79 | if (p[0]==0xff84b23c) p[0]=(int)JogDial_task_my; |
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| 80 | } |
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| 81 | |
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| 82 | void taskCreateHook2(int *p) { |
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| 83 | p-=17; |
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| 84 | if (p[0]==0xff882ea8) p[0]=(int)init_file_modules_task; |
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| 85 | if (p[0]==0xff8ab0e0) p[0]=(int)exp_drv_task; |
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| 86 | } |
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| 87 | |
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| 88 | void __attribute__((naked,noinline)) boot( ) { |
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| 89 | asm volatile ( |
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| 90 | " LDR R1, =0xC0410000 \n" |
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| 91 | " MOV R0, #0 \n" |
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| 92 | " STR R0, [R1] \n" |
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| 93 | " MOV R1, #0x78 \n" |
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| 94 | " MCR p15, 0, R1, c1, c0 \n" |
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| 95 | " MOV R1, #0 \n" |
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| 96 | " MCR p15, 0, R1, c7, c10, 4 \n" |
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| 97 | " MCR p15, 0, R1, c7, c5 \n" |
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| 98 | " MCR p15, 0, R1, c7, c6 \n" |
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| 99 | " MOV R0, #0x3D \n" |
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| 100 | " MCR p15, 0, R0, c6, c0 \n" |
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| 101 | " MOV R0, #0xC000002F \n" |
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| 102 | " MCR p15, 0, R0, c6, c1 \n" |
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| 103 | " MOV R0, #0x35 \n" |
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| 104 | " MCR p15, 0, R0, c6, c2 \n" |
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| 105 | " MOV R0, #0x40000035 \n" |
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| 106 | " MCR p15, 0, R0, c6, c3 \n" |
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| 107 | " MOV R0, #0x80000017 \n" |
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| 108 | " MCR p15, 0, R0, c6, c4 \n" |
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| 109 | " LDR R0, =0xFF80002D \n" |
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| 110 | " MCR p15, 0, R0, c6, c5 \n" |
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| 111 | " MOV R0, #0x34 \n" |
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| 112 | " MCR p15, 0, R0, c2, c0 \n" |
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| 113 | " MOV R0, #0x34 \n" |
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| 114 | " MCR p15, 0, R0, c2, c0, 1 \n" |
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| 115 | " MOV R0, #0x34 \n" |
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| 116 | " MCR p15, 0, R0, c3, c0 \n" |
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| 117 | " LDR R0, =0x3333330 \n" |
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| 118 | " MCR p15, 0, R0, c5, c0, 2 \n" |
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| 119 | " LDR R0, =0x3333330 \n" |
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| 120 | " MCR p15, 0, R0, c5, c0, 3 \n" |
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| 121 | " MRC p15, 0, R0, c1, c0 \n" |
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| 122 | " ORR R0, R0, #0x1000 \n" |
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| 123 | " ORR R0, R0, #4 \n" |
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| 124 | " ORR R0, R0, #1 \n" |
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| 125 | " MCR p15, 0, R0, c1, c0 \n" |
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| 126 | " MOV R1, #0x80000006 \n" |
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| 127 | " MCR p15, 0, R1, c9, c1 \n" |
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| 128 | " MOV R1, #6 \n" |
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| 129 | " MCR p15, 0, R1, c9, c1, 1 \n" |
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| 130 | " MRC p15, 0, R1, c1, c0 \n" |
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| 131 | " ORR R1, R1, #0x50000 \n" |
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| 132 | " MCR p15, 0, R1, c1, c0 \n" |
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| 133 | " LDR R2, =0xC0200000 \n" |
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| 134 | " MOV R1, #1 \n" |
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| 135 | " STR R1, [R2, #0x10C] \n" |
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| 136 | " MOV R1, #0xFF \n" |
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| 137 | " STR R1, [R2, #0xC] \n" |
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| 138 | " STR R1, [R2, #0x1C] \n" |
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| 139 | " STR R1, [R2, #0x2C] \n" |
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| 140 | " STR R1, [R2, #0x3C] \n" |
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| 141 | " STR R1, [R2, #0x4C] \n" |
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| 142 | " STR R1, [R2, #0x5C] \n" |
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| 143 | " STR R1, [R2, #0x6C] \n" |
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| 144 | " STR R1, [R2, #0x7C] \n" |
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| 145 | " STR R1, [R2, #0x8C] \n" |
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| 146 | " STR R1, [R2, #0x9C] \n" |
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| 147 | " STR R1, [R2, #0xAC] \n" |
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| 148 | " STR R1, [R2, #0xBC] \n" |
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| 149 | " STR R1, [R2, #0xCC] \n" |
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| 150 | " STR R1, [R2, #0xDC] \n" |
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| 151 | " STR R1, [R2, #0xEC] \n" |
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| 152 | " STR R1, [R2, #0xFC] \n" |
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| 153 | " LDR R1, =0xC0400008 \n" |
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| 154 | " LDR R2, =0x430005 \n" |
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| 155 | " STR R2, [R1] \n" |
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| 156 | " MOV R1, #1 \n" |
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| 157 | " LDR R2, =0xC0243100 \n" |
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| 158 | " STR R2, [R1] \n" |
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| 159 | " LDR R2, =0xC0242010 \n" |
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| 160 | " LDR R1, [R2] \n" |
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| 161 | " ORR R1, R1, #1 \n" |
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| 162 | " STR R1, [R2] \n" |
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| 163 | " LDR R0, =0xFFBA0A04 \n" //* firmware difference |
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| 164 | |
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| 165 | " LDR R1, =0x1900 \n" // MEMBASEADDR=0x1900 |
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| 166 | " LDR R3, =0x10834 \n" |
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| 167 | "loc_FF81013C:\n" |
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| 168 | " CMP R1, R3 \n" |
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| 169 | " LDRCC R2, [R0], #4 \n" |
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| 170 | " STRCC R2, [R1], #4 \n" |
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| 171 | " BCC loc_FF81013C \n" |
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| 172 | " LDR R1, =0xEEECC \n" // MEMISOSTART=0xEEECC |
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| 173 | " MOV R2, #0 \n" |
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| 174 | "loc_FF810154:\n" |
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| 175 | " CMP R3, R1 \n" |
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| 176 | " STRCC R2, [R3], #4 \n" |
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| 177 | " BCC loc_FF810154 \n" |
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| 178 | " B sub_FF8101A0_my\n" |
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| 179 | ); |
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| 180 | } |
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| 181 | |
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| 182 | void __attribute__((naked,noinline)) sub_FF8101A0_my( ) { |
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| 183 | |
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| 184 | *(int*)0x1930=(int)taskCreateHook; |
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| 185 | *(int*)0x1934=(int)taskCreateHook2; |
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| 186 | *(int*)0x1938=(int)taskCreateHook; |
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| 187 | |
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| 188 | // Power ON/OFF detection G10 @FF84A8D0 replacement for correct power-on. |
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| 189 | *(int*)(0x25CC+0x04)= (*(int*)0xC02200F8)&1 ? 0x100000 : 0x200000; // replacement for correct power-on. |
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| 190 | |
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| 191 | asm volatile ( |
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| 192 | " LDR R0, =0xFF810218 \n" |
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| 193 | " MOV R1, #0 \n" |
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| 194 | " LDR R3, =0xFF810250 \n" |
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| 195 | "loc_FF8101AC:\n" |
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| 196 | " CMP R0, R3 \n" |
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| 197 | " LDRCC R2, [R0], #4 \n" |
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| 198 | " STRCC R2, [R1], #4 \n" |
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| 199 | " BCC loc_FF8101AC \n" |
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| 200 | " LDR R0, =0xFF810250 \n" |
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| 201 | " MOV R1, #0x4B0 \n" |
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| 202 | " LDR R3, =0xFF810464 \n" |
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| 203 | "loc_FF8101C8:\n" |
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| 204 | " CMP R0, R3 \n" |
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| 205 | " LDRCC R2, [R0], #4 \n" |
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| 206 | " STRCC R2, [R1], #4 \n" |
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| 207 | " BCC loc_FF8101C8 \n" |
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| 208 | " MOV R0, #0xD2 \n" |
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| 209 | " MSR CPSR_cxsf, R0 \n" |
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| 210 | " MOV SP, #0x1000 \n" |
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| 211 | " MOV R0, #0xD3 \n" |
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| 212 | " MSR CPSR_cxsf, R0 \n" |
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| 213 | " MOV SP, #0x1000 \n" |
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| 214 | " LDR R0, =0x6C4 \n" |
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| 215 | " LDR R2, =0xEEEEEEEE \n" |
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| 216 | " MOV R3, #0x1000 \n" |
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| 217 | "loc_FF8101FC:\n" |
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| 218 | " CMP R0, R3 \n" |
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| 219 | " STRCC R2, [R0], #4 \n" |
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| 220 | " BCC loc_FF8101FC \n" |
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| 221 | " BL sub_FF810F94_my \n" //-----------> |
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| 222 | ); |
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| 223 | } |
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| 224 | |
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| 225 | |
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| 226 | //** sub_FF810F94_my @ 0xFF810F94 |
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| 227 | |
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| 228 | void __attribute__((naked,noinline)) sub_FF810F94_my( ) { |
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| 229 | asm volatile ( |
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| 230 | " STR LR, [SP, #-4]! \n" |
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| 231 | " SUB SP, SP, #0x74 \n" |
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| 232 | " MOV R0, SP \n" |
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| 233 | " MOV R1, #0x74 \n" |
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| 234 | " BL sub_FFB05270 \n" //* firmware difference |
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| 235 | |
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| 236 | " MOV R0, #0x53000 \n" |
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| 237 | " STR R0, [SP, #4] \n" |
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| 238 | //" LDR R0, =0xEEECC \n" // - |
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| 239 | " LDR R0, =new_sa\n" // + |
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| 240 | " LDR R0, [R0]\n" // + |
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| 241 | " LDR R2, =0x379C00 \n" |
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| 242 | " LDR R1, =0x3724A8 \n" |
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| 243 | " STR R0, [SP, #8] \n" |
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| 244 | " SUB R0, R1, R0 \n" |
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| 245 | " ADD R3, SP, #0xC \n" |
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| 246 | " STR R2, [SP] \n" |
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| 247 | " STMIA R3, {R0-R2} \n" |
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| 248 | " MOV R0, #0x22 \n" |
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| 249 | " STR R0, [SP, #0x18] \n" |
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| 250 | " MOV R0, #0x68 \n" |
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| 251 | " STR R0, [SP, #0x1C] \n" |
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| 252 | " LDR R0, =0x19B \n" |
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| 253 | " LDR R1, =sub_FF814D8C_my \n" //+ ----------> |
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| 254 | " STR R0, [SP, #0x20] \n" |
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| 255 | " MOV R0, #0x96 \n" |
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| 256 | " STR R0, [SP, #0x24] \n" |
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| 257 | " MOV R0, #0x78 \n" |
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| 258 | " STR R0, [SP, #0x28] \n" |
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| 259 | " MOV R0, #0x64 \n" |
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| 260 | " STR R0, [SP, #0x2C] \n" |
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| 261 | " MOV R0, #0 \n" |
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| 262 | " STR R0, [SP, #0x30] \n" |
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| 263 | " STR R0, [SP, #0x34] \n" |
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| 264 | " MOV R0, #0x10 \n" |
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| 265 | " STR R0, [SP, #0x5C] \n" |
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| 266 | " MOV R0, #0x800 \n" |
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| 267 | " STR R0, [SP, #0x60] \n" |
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| 268 | " MOV R0, #0xA0 \n" |
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| 269 | " STR R0, [SP, #0x64] \n" |
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| 270 | " MOV R0, #0x280 \n" |
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| 271 | " STR R0, [SP, #0x68] \n" |
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| 272 | " MOV R0, SP \n" |
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| 273 | " MOV R2, #0 \n" |
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| 274 | " BL sub_FF812D38 \n" |
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| 275 | " ADD SP, SP, #0x74 \n" |
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| 276 | " LDR PC, [SP], #4 \n" |
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| 277 | ); |
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| 278 | } |
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| 279 | |
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| 280 | //** sub_FF814D8C_my @ 0xFF814D8C |
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| 281 | |
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| 282 | void __attribute__((naked,noinline)) sub_FF814D8C_my( ) { |
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| 283 | asm volatile ( |
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| 284 | " STMFD SP!, {R4,LR} \n" |
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| 285 | " BL sub_FF810940 \n" |
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| 286 | " BL sub_FF81901C \n" |
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| 287 | " CMP R0, #0 \n" |
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| 288 | " LDRLT R0, =0xFF814EA0 \n" |
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| 289 | " BLLT sub_FF814E80 \n" |
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| 290 | " BL sub_FF8149B4 \n" |
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| 291 | " CMP R0, #0 \n" |
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| 292 | " LDRLT R0, =0xFF814EA8 \n" |
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| 293 | " BLLT sub_FF814E80 \n" |
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| 294 | " LDR R0, =0xFF814EB8 \n" |
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| 295 | " BL sub_FF814A9C \n" |
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| 296 | " CMP R0, #0 \n" |
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| 297 | " LDRLT R0, =0xFF814EC0 \n" |
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| 298 | " BLLT sub_FF814E80 \n" |
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| 299 | " LDR R0, =0xFF814EB8 \n" |
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| 300 | " BL sub_FF813548 \n" |
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| 301 | " CMP R0, #0 \n" |
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| 302 | " LDRLT R0, =0xFF814ED4 \n" |
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| 303 | " BLLT sub_FF814E80 \n" |
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| 304 | " BL sub_FF818BA4 \n" |
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| 305 | " CMP R0, #0 \n" |
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| 306 | " LDRLT R0, =0xFF814EE0 \n" |
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| 307 | " BLLT sub_FF814E80 \n" |
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| 308 | " BL sub_FF811478 \n" |
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| 309 | " CMP R0, #0 \n" |
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| 310 | " LDRLT R0, =0xFF814EEC \n" |
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| 311 | " BLLT sub_FF814E80 \n" |
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| 312 | " LDMFD SP!, {R4,LR} \n" |
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| 313 | " B taskcreate_Startup_my\n" //----------> |
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| 314 | ); |
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| 315 | } |
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| 316 | |
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| 317 | //** taskcreate_Startup_my @ 0xFF81C1A8 |
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| 318 | |
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| 319 | void __attribute__((naked,noinline)) taskcreate_Startup_my( ) { |
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| 320 | asm volatile ( |
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| 321 | " STMFD SP!, {R3,LR} \n" |
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| 322 | " BL sub_FF8219D4 \n" |
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| 323 | " BL sub_FF82A16C \n" |
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| 324 | " CMP R0, #0 \n" |
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| 325 | " BNE loc_FF81C1EC \n" |
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| 326 | " BL sub_FF823100 \n" |
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| 327 | " CMP R0, #0 \n" |
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| 328 | " BNE loc_FF81C1EC \n" |
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| 329 | " BL sub_FF8219D0 \n" |
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| 330 | " CMP R0, #0 \n" |
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| 331 | " BNE loc_FF81C1EC \n" |
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| 332 | " BL sub_FF821168 \n" |
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| 333 | " LDR R1, =0xC0220000 \n" |
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| 334 | " MOV R0, #0x44 \n" |
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| 335 | " STR R0, [R1, #0x1C] \n" |
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| 336 | " BL sub_FF821354 \n" |
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| 337 | "loc_FF81C1E8:\n" |
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| 338 | " B loc_FF81C1E8 \n" |
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| 339 | "loc_FF81C1EC:\n" |
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| 340 | //" BL sub_FF8219DC \n" // removed for corrected power-on/off button operation see boot() function |
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| 341 | " BL sub_FF8219D8 \n" |
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| 342 | " BL sub_FF8282FC \n" |
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| 343 | " LDR R1, =0x3CE000 \n" |
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| 344 | " MOV R0, #0 \n" |
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| 345 | " BL sub_FF828744 \n" |
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| 346 | " BL sub_FF8284F0 \n" |
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| 347 | " MOV R3, #0 \n" |
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| 348 | " STR R3, [SP] \n" |
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| 349 | //" LDR R3, =0xFF81C144 \n" |
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| 350 | " LDR R3, =task_Startup_my\n" //+ -----------> |
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| 351 | " MOV R2, #0 \n" |
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| 352 | " MOV R1, #0x19 \n" |
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| 353 | " LDR R0, =0xFF81C234 \n" |
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| 354 | " BL sub_FF81AEF4 \n" |
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| 355 | " MOV R0, #0 \n" |
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| 356 | " LDMFD SP!, {R12,PC} \n" |
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| 357 | ); |
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| 358 | } |
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| 359 | |
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| 360 | |
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| 361 | //** task_Startup_my @ 0xFF81C144 |
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| 362 | |
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| 363 | void __attribute__((naked,noinline)) task_Startup_my( ) { |
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| 364 | *((volatile int *) LED_PWR) = 0x46; |
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| 365 | asm volatile ( |
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| 366 | " STMFD SP!, {R4,LR} \n" |
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| 367 | " BL sub_FF8153CC \n" |
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| 368 | " BL sub_FF822B38 \n" |
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| 369 | " BL sub_FF820E28 \n" |
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| 370 | " BL sub_FF82A1AC \n" |
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| 371 | " BL sub_FF82A374 \n" |
|---|
| 372 | //" BL sub_FF82A234 \n" // Skip starting diskboot.bin again |
|---|
| 373 | " BL sub_FF82A52C \n" |
|---|
| 374 | " BL sub_FF81FAA0 \n" |
|---|
| 375 | " BL sub_FF82A3C4 \n" |
|---|
| 376 | " BL sub_FF8278FC \n" |
|---|
| 377 | " BL sub_FF82A530 \n" |
|---|
| 378 | //" BL sub_FF8218CC \n" // taskcreate_PhySw |
|---|
| 379 | ); |
|---|
| 380 | CreateTask_spytask(); // + |
|---|
| 381 | CreateTask_PhySw(); // + |
|---|
| 382 | CreateTask_Blinker(); |
|---|
| 383 | asm volatile ( |
|---|
| 384 | " BL sub_FF82503C \n" |
|---|
| 385 | " BL sub_FF82A548 \n" |
|---|
| 386 | " BL sub_FF81EF04 \n" |
|---|
| 387 | " BL busy_loop \n" |
|---|
| 388 | " BL sub_FF820738 \n" |
|---|
| 389 | " BL sub_FF829F48 \n" |
|---|
| 390 | " BL sub_FF820DD8 \n" |
|---|
| 391 | " BL sub_FF820644 \n" |
|---|
| 392 | " BL sub_FF81FAD4 \n" |
|---|
| 393 | " BL sub_FF82B068 \n" |
|---|
| 394 | " BL sub_FF82061C \n" |
|---|
| 395 | " LDMFD SP!, {R4,LR} \n" |
|---|
| 396 | " B sub_FF815490 \n" |
|---|
| 397 | ); |
|---|
| 398 | } |
|---|
| 399 | |
|---|
| 400 | void __attribute__((naked,noinline)) busy_loop() { // loop hack that allows startup with battery door open |
|---|
| 401 | asm volatile ( |
|---|
| 402 | " STMFD SP!, {R4-R6,LR} \n" |
|---|
| 403 | " LDR R0, =0x400000 \n" |
|---|
| 404 | "loop1: \n" |
|---|
| 405 | " nop\n" |
|---|
| 406 | " SUBS R0,R0,#1 \n" |
|---|
| 407 | " BNE loop1 \n" |
|---|
| 408 | " LDMFD SP!, {R4-R6,PC} \n" |
|---|
| 409 | ); |
|---|
| 410 | } |
|---|
| 411 | |
|---|
| 412 | void CreateTask_spytask() { |
|---|
| 413 | _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0); |
|---|
| 414 | }; |
|---|
| 415 | |
|---|
| 416 | |
|---|
| 417 | //** CreateTask_PhySw @ 0xFF8218CC |
|---|
| 418 | |
|---|
| 419 | void __attribute__((naked,noinline)) CreateTask_PhySw( ) { |
|---|
| 420 | asm volatile ( |
|---|
| 421 | " STMFD SP!, {R3-R5,LR} \n" |
|---|
| 422 | " LDR R4, =0x1C20 \n" |
|---|
| 423 | " LDR R0, [R4, #0x10] \n" |
|---|
| 424 | " CMP R0, #0 \n" |
|---|
| 425 | " BNE loc_FF821900 \n" |
|---|
| 426 | " MOV R3, #0 \n" |
|---|
| 427 | " STR R3, [SP] \n" |
|---|
| 428 | //" LDR R3, =0xFF821898 \n" |
|---|
| 429 | //" MOV R2, #0x800 \n" |
|---|
| 430 | " LDR R3, =mykbd_task\n" // task_phySw |
|---|
| 431 | " MOV R2, #0x2000\n" // greater Stacksize |
|---|
| 432 | " MOV R1, #0x17 \n" |
|---|
| 433 | " LDR R0, =0xFF821AD4 \n" |
|---|
| 434 | " BL sub_FF828544 \n" |
|---|
| 435 | " STR R0, [R4, #0x10] \n" |
|---|
| 436 | "loc_FF821900:\n" |
|---|
| 437 | " BL sub_FF84B338 \n" |
|---|
| 438 | " BL sub_FF875CBC \n" |
|---|
| 439 | " BL sub_FF8230A4 \n" |
|---|
| 440 | " CMP R0, #0 \n" |
|---|
| 441 | " LDREQ R1, =0x11CC4 \n" |
|---|
| 442 | " LDMEQFD SP!, {R3-R5,LR} \n" |
|---|
| 443 | " BEQ sub_FF875BFC \n" |
|---|
| 444 | " LDMFD SP!, {R3-R5,PC} \n" |
|---|
| 445 | ); |
|---|
| 446 | } |
|---|
| 447 | |
|---|
| 448 | |
|---|
| 449 | //** init_file_modules_task @ 0xFF882EA8 |
|---|
| 450 | |
|---|
| 451 | void __attribute__((naked,noinline)) init_file_modules_task( ) { |
|---|
| 452 | asm volatile ( |
|---|
| 453 | " STMFD SP!, {R4-R6,LR} \n" |
|---|
| 454 | " BL sub_FF87806C \n" |
|---|
| 455 | " LDR R5, =0x5006 \n" |
|---|
| 456 | " MOVS R4, R0 \n" |
|---|
| 457 | " MOVNE R1, #0 \n" |
|---|
| 458 | " MOVNE R0, R5 \n" |
|---|
| 459 | " BLNE sub_FF87CD38 \n" |
|---|
| 460 | //" BL sub_FF878098 \n" |
|---|
| 461 | " BL sub_FF878098_my\n" //-----------> |
|---|
| 462 | " BL core_spytask_can_start\n" // + |
|---|
| 463 | " CMP R4, #0 \n" |
|---|
| 464 | " MOVEQ R0, R5 \n" |
|---|
| 465 | " LDMEQFD SP!, {R4-R6,LR} \n" |
|---|
| 466 | " MOVEQ R1, #0 \n" |
|---|
| 467 | " BEQ sub_FF87CD38 \n" |
|---|
| 468 | " LDMFD SP!, {R4-R6,PC} \n" |
|---|
| 469 | ); |
|---|
| 470 | } |
|---|
| 471 | |
|---|
| 472 | |
|---|
| 473 | //** sub_FF878098_my @ 0xFF878098 |
|---|
| 474 | |
|---|
| 475 | void __attribute__((naked,noinline)) sub_FF878098_my( ) { |
|---|
| 476 | asm volatile ( |
|---|
| 477 | " STMFD SP!, {R4,LR} \n" |
|---|
| 478 | //" BL sub_FF859C00 \n" |
|---|
| 479 | " BL sub_FF859C00_my\n" // ----------> |
|---|
| 480 | " BL sub_FF91F284 \n" // nullsub |
|---|
| 481 | " LDR R4, =0x585C \n" |
|---|
| 482 | " LDR R0, [R4, #4] \n" |
|---|
| 483 | " CMP R0, #0 \n" |
|---|
| 484 | " BNE loc_FF8780CC \n" |
|---|
| 485 | " BL sub_FF8590C8 \n" |
|---|
| 486 | " BL sub_FF912FC0 \n" |
|---|
| 487 | " BL sub_FF8590C8 \n" |
|---|
| 488 | " BL sub_FF854F9C \n" |
|---|
| 489 | " BL sub_FF858FC8 \n" |
|---|
| 490 | " BL sub_FF91308C \n" |
|---|
| 491 | "loc_FF8780CC:\n" |
|---|
| 492 | " MOV R0, #1 \n" |
|---|
| 493 | " STR R0, [R4] \n" |
|---|
| 494 | " LDMFD SP!, {R4,PC} \n" |
|---|
| 495 | ); |
|---|
| 496 | } |
|---|
| 497 | |
|---|
| 498 | |
|---|
| 499 | //** sub_FF859C00_my @ 0xFF859C00 |
|---|
| 500 | |
|---|
| 501 | void __attribute__((naked,noinline)) sub_FF859C00_my( ) { |
|---|
| 502 | asm volatile ( |
|---|
| 503 | " STMFD SP!, {R4-R6,LR} \n" |
|---|
| 504 | " MOV R6, #0 \n" |
|---|
| 505 | " MOV R0, R6 \n" |
|---|
| 506 | " BL sub_FF8596C0 \n" |
|---|
| 507 | " LDR R4, =0x1A578 \n" |
|---|
| 508 | " MOV R5, #0 \n" |
|---|
| 509 | " LDR R0, [R4, #0x38] \n" |
|---|
| 510 | " BL sub_FF85A120 \n" |
|---|
| 511 | " CMP R0, #0 \n" |
|---|
| 512 | " LDREQ R0, =0x2A5C \n" |
|---|
| 513 | " STREQ R5, [R0, #0x10] \n" |
|---|
| 514 | " STREQ R5, [R0, #0x14] \n" |
|---|
| 515 | " STREQ R5, [R0, #0x18] \n" |
|---|
| 516 | " MOV R0, R6 \n" |
|---|
| 517 | " BL sub_FF859700 \n" |
|---|
| 518 | " MOV R0, R6 \n" |
|---|
| 519 | //" BL sub_FF859A3C \n" |
|---|
| 520 | " BL sub_FF859A3C_my \n" // ----------> |
|---|
| 521 | " MOV R5, R0 \n" |
|---|
| 522 | " MOV R0, R6 \n" |
|---|
| 523 | " BL sub_FF859AA8 \n" |
|---|
| 524 | " LDR R1, [R4, #0x3C] \n" |
|---|
| 525 | " AND R2, R5, R0 \n" |
|---|
| 526 | " CMP R1, #0 \n" |
|---|
| 527 | " MOV R0, #0 \n" |
|---|
| 528 | " MOVEQ R0, #0x80000001 \n" |
|---|
| 529 | " BEQ loc_FF859C94 \n" |
|---|
| 530 | " LDR R3, [R4, #0x2C] \n" |
|---|
| 531 | " CMP R3, #2 \n" |
|---|
| 532 | " MOVEQ R0, #4 \n" |
|---|
| 533 | " CMP R1, #5 \n" |
|---|
| 534 | " ORRNE R0, R0, #1 \n" |
|---|
| 535 | " BICEQ R0, R0, #1 \n" |
|---|
| 536 | " CMP R2, #0 \n" |
|---|
| 537 | " BICEQ R0, R0, #2 \n" |
|---|
| 538 | " ORREQ R0, R0, #0x80000000 \n" |
|---|
| 539 | " BICNE R0, R0, #0x80000000 \n" |
|---|
| 540 | " ORRNE R0, R0, #2 \n" |
|---|
| 541 | "loc_FF859C94:\n" |
|---|
| 542 | " STR R0, [R4, #0x40] \n" |
|---|
| 543 | " LDMFD SP!, {R4-R6,PC} \n" |
|---|
| 544 | ); |
|---|
| 545 | } |
|---|
| 546 | |
|---|
| 547 | //** sub_FF859A3C_my @ 0xFF859A3C |
|---|
| 548 | |
|---|
| 549 | void __attribute__((naked,noinline)) sub_FF859A3C_my( ) { |
|---|
| 550 | asm volatile ( |
|---|
| 551 | " STMFD SP!, {R4-R6,LR} \n" |
|---|
| 552 | " LDR R5, =0x2A5C \n" |
|---|
| 553 | " MOV R6, R0 \n" |
|---|
| 554 | " LDR R0, [R5, #0x14] \n" |
|---|
| 555 | " CMP R0, #0 \n" |
|---|
| 556 | " MOVNE R0, #1 \n" |
|---|
| 557 | " LDMNEFD SP!, {R4-R6,PC} \n" |
|---|
| 558 | " MOV R0, #0x17 \n" |
|---|
| 559 | " MUL R1, R0, R6 \n" |
|---|
| 560 | " LDR R0, =0x1A578 \n" |
|---|
| 561 | " ADD R4, R0, R1, LSL #2 \n" |
|---|
| 562 | " LDR R0, [R4, #0x38] \n" |
|---|
| 563 | " MOV R1, R6 \n" |
|---|
| 564 | //" BL sub_FF8597CC \n" |
|---|
| 565 | " BL sub_FF8597CC_my \n" // ----------> |
|---|
| 566 | " CMP R0, #0 \n" |
|---|
| 567 | " LDMEQFD SP!, {R4-R6,PC} \n" |
|---|
| 568 | " LDR R0, [R4, #0x38] \n" |
|---|
| 569 | " MOV R1, R6 \n" |
|---|
| 570 | " BL sub_FF859934 \n" |
|---|
| 571 | " CMP R0, #0 \n" |
|---|
| 572 | " LDMEQFD SP!, {R4-R6,PC} \n" |
|---|
| 573 | " MOV R0, R6 \n" |
|---|
| 574 | " BL sub_FF8592C8 \n" |
|---|
| 575 | " CMP R0, #0 \n" |
|---|
| 576 | " MOVNE R1, #1 \n" |
|---|
| 577 | " STRNE R1, [R5, #0x14] \n" |
|---|
| 578 | " LDMFD SP!, {R4-R6,PC} \n" |
|---|
| 579 | ); |
|---|
| 580 | } |
|---|
| 581 | |
|---|
| 582 | |
|---|
| 583 | //** sub_FF86F1DC_my @ 0xFF8597CC |
|---|
| 584 | |
|---|
| 585 | void __attribute__((naked,noinline)) sub_FF8597CC_my( ) { |
|---|
| 586 | asm volatile ( |
|---|
| 587 | " STMFD SP!, {R4-R8,LR} \n" |
|---|
| 588 | " MOV R8, R0 \n" |
|---|
| 589 | " MOV R0, #0x17 \n" |
|---|
| 590 | " MUL R1, R0, R1 \n" |
|---|
| 591 | " LDR R0, =0x1A578 \n" |
|---|
| 592 | " MOV R6, #0 \n" |
|---|
| 593 | " ADD R7, R0, R1, LSL #2 \n" |
|---|
| 594 | " LDR R0, [R7, #0x3C] \n" |
|---|
| 595 | " MOV R5, #0 \n" |
|---|
| 596 | " CMP R0, #6 \n" |
|---|
| 597 | " ADDLS PC, PC, R0, LSL #2 \n" |
|---|
| 598 | " B loc_FF859918 \n" |
|---|
| 599 | " B loc_FF859830 \n" |
|---|
| 600 | " B loc_FF859818 \n" |
|---|
| 601 | " B loc_FF859818 \n" |
|---|
| 602 | " B loc_FF859818 \n" |
|---|
| 603 | " B loc_FF859818 \n" |
|---|
| 604 | " B loc_FF859910 \n" |
|---|
| 605 | " B loc_FF859818 \n" |
|---|
| 606 | "loc_FF859818:\n" |
|---|
| 607 | " MOV R2, #0 \n" |
|---|
| 608 | " MOV R1, #0x200 \n" |
|---|
| 609 | " MOV R0, #2 \n" |
|---|
| 610 | " BL sub_FF872014 \n" |
|---|
| 611 | " MOVS R4, R0 \n" |
|---|
| 612 | " BNE loc_FF859838 \n" |
|---|
| 613 | "loc_FF859830:\n" |
|---|
| 614 | " MOV R0, #0 \n" |
|---|
| 615 | " LDMFD SP!, {R4-R8,PC} \n" |
|---|
| 616 | "loc_FF859838:\n" |
|---|
| 617 | " LDR R12, [R7, #0x4C] \n" |
|---|
| 618 | " MOV R3, R4 \n" |
|---|
| 619 | " MOV R2, #1 \n" |
|---|
| 620 | " MOV R1, #0 \n" |
|---|
| 621 | " MOV R0, R8 \n" |
|---|
| 622 | |
|---|
| 623 | " BLX R12 \n" |
|---|
| 624 | " CMP R0, #1 \n" |
|---|
| 625 | " BNE loc_FF859864 \n" |
|---|
| 626 | " MOV R0, #2 \n" |
|---|
| 627 | " BL sub_FF872160 \n" |
|---|
| 628 | " B loc_FF859830 \n" |
|---|
| 629 | "loc_FF859864:\n" |
|---|
| 630 | " MOV R0, R8 \n" |
|---|
| 631 | " BL sub_FF92AC04 \n" |
|---|
| 632 | |
|---|
| 633 | "MOV R1, R4\n" // pointer to MBR in R1 |
|---|
| 634 | "BL mbr_read_dryos\n" // total sectors count in R0 before and after call |
|---|
| 635 | |
|---|
| 636 | // Start of DataGhost's FAT32 autodetection code |
|---|
| 637 | // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage |
|---|
| 638 | // According to the code below, we can use R1, R2, R3 and R12. |
|---|
| 639 | // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing |
|---|
| 640 | // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :) |
|---|
| 641 | "MOV R12, R4\n" // Copy the MBR start address so we have something to work with |
|---|
| 642 | "MOV LR, R4\n" // Save old offset for MBR signature |
|---|
| 643 | "MOV R1, #1\n" // Note the current partition number |
|---|
| 644 | "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet! |
|---|
| 645 | "dg_sd_fat32:\n" |
|---|
| 646 | "CMP R1, #4\n" // Did we already see the 4th partition? |
|---|
| 647 | "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything. |
|---|
| 648 | "ADD R12, R12, #0x10\n" // Second partition |
|---|
| 649 | "ADD R1, R1, #1\n" // Second partition for the loop |
|---|
| 650 | "dg_sd_fat32_enter:\n" |
|---|
| 651 | "LDRB R2, [R12, #0x1BE]\n" // Partition status |
|---|
| 652 | "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB) |
|---|
| 653 | "CMP R3, #0xB\n" // Is this a FAT32 partition? |
|---|
| 654 | "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then? |
|---|
| 655 | "BNE dg_sd_fat32\n" // No, it isn't. |
|---|
| 656 | "CMP R2, #0x00\n" // It is, check the validity of the partition type |
|---|
| 657 | "CMPNE R2, #0x80\n" |
|---|
| 658 | "BNE dg_sd_fat32\n" // Invalid, go to next partition |
|---|
| 659 | // This partition is valid, it's the first one, bingo! |
|---|
| 660 | "MOV R4, R12\n" // Move the new MBR offset for the partition detection. |
|---|
| 661 | |
|---|
| 662 | "dg_sd_fat32_end:\n" |
|---|
| 663 | // End of DataGhost's FAT32 autodetection code |
|---|
| 664 | |
|---|
| 665 | " LDRB R1, [R4, #0x1C9] \n" |
|---|
| 666 | " LDRB R3, [R4, #0x1C8] \n" |
|---|
| 667 | " LDRB R12, [R4, #0x1CC] \n" |
|---|
| 668 | " MOV R1, R1, LSL #0x18 \n" |
|---|
| 669 | " ORR R1, R1, R3, LSL #0x10 \n" |
|---|
| 670 | " LDRB R3, [R4, #0x1C7] \n" |
|---|
| 671 | " LDRB R2, [R4, #0x1BE] \n" |
|---|
| 672 | //" LDRB LR, [R4, #0x1FF] \n" // replaced, see below |
|---|
| 673 | " ORR R1, R1, R3, LSL #8 \n" |
|---|
| 674 | " LDRB R3, [R4, #0x1C6] \n" |
|---|
| 675 | " CMP R2, #0 \n" |
|---|
| 676 | " CMPNE R2, #0x80 \n" |
|---|
| 677 | " ORR R1, R1, R3 \n" |
|---|
| 678 | " LDRB R3, [R4, #0x1CD] \n" |
|---|
| 679 | " MOV R3, R3, LSL #0x18 \n" |
|---|
| 680 | " ORR R3, R3, R12, LSL #0x10 \n" |
|---|
| 681 | " LDRB R12, [R4, #0x1CB] \n" |
|---|
| 682 | " ORR R3, R3, R12, LSL #8 \n" |
|---|
| 683 | " LDRB R12, [R4, #0x1CA] \n" |
|---|
| 684 | " ORR R3, R3, R12 \n" |
|---|
| 685 | //" LDRB R12, [R4, #0x1FE] \n" // replaced, see below |
|---|
| 686 | |
|---|
| 687 | " LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55) |
|---|
| 688 | " LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA) |
|---|
| 689 | |
|---|
| 690 | " MOV R4, #0 \n" |
|---|
| 691 | " BNE loc_FF8598EC \n" |
|---|
| 692 | " CMP R0, R1 \n" |
|---|
| 693 | " BCC loc_FF8598EC \n" |
|---|
| 694 | " ADD R2, R1, R3 \n" |
|---|
| 695 | " CMP R2, R0 \n" |
|---|
| 696 | " CMPLS R12, #0x55 \n" |
|---|
| 697 | " CMPEQ LR, #0xAA \n" |
|---|
| 698 | " MOVEQ R6, R1 \n" |
|---|
| 699 | " MOVEQ R5, R3 \n" |
|---|
| 700 | " MOVEQ R4, #1 \n" |
|---|
| 701 | "loc_FF8598EC:\n" |
|---|
| 702 | " MOV R0, #2 \n" |
|---|
| 703 | " BL sub_FF872160 \n" |
|---|
| 704 | " CMP R4, #0 \n" |
|---|
| 705 | " BNE loc_FF859924 \n" |
|---|
| 706 | " MOV R6, #0 \n" |
|---|
| 707 | " MOV R0, R8 \n" |
|---|
| 708 | " BL sub_FF92AC04 \n" |
|---|
| 709 | " MOV R5, R0 \n" |
|---|
| 710 | " B loc_FF859924 \n" |
|---|
| 711 | "loc_FF859910:\n" |
|---|
| 712 | " MOV R5, #0x40 \n" |
|---|
| 713 | " B loc_FF859924 \n" |
|---|
| 714 | "loc_FF859918:\n" |
|---|
| 715 | " LDR R1, =0x37A \n" |
|---|
| 716 | " LDR R0, =0xFF8597C0 \n" |
|---|
| 717 | " BL sub_FF81B1CC \n" |
|---|
| 718 | "loc_FF859924:\n" |
|---|
| 719 | " STR R6, [R7, #0x44]! \n" |
|---|
| 720 | " MOV R0, #1 \n" |
|---|
| 721 | " STR R5, [R7, #4] \n" |
|---|
| 722 | " LDMFD SP!,{R4-R8,PC} \n" |
|---|
| 723 | ); |
|---|
| 724 | } |
|---|
| 725 | |
|---|
| 726 | // JogDial_task_my 0xFF84B23C |
|---|
| 727 | |
|---|
| 728 | void __attribute__((naked,noinline)) JogDial_task_my( ) { |
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| 729 | asm volatile ( |
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| 730 | " STMFD SP!, {R3-R11,LR} \n" |
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| 731 | " BL sub_FF84B3EC \n" |
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| 732 | " LDR R11, =0x80000B01 \n" |
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| 733 | " LDR R8, =0xFFB0FA9C \n" //* firmware difference |
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| 734 | " LDR R7, =0xC0240000 \n" |
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| 735 | " LDR R6, =0x25F0 \n" |
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| 736 | " MOV R9, #1 \n" |
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| 737 | " MOV R10, #0 \n" |
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| 738 | "loc_FF84B25C:\n" |
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| 739 | " LDR R3, =0x1AE \n" |
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| 740 | " LDR R0, [R6, #0xC] \n" |
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| 741 | " LDR R2, =0xFF84B494 \n" |
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| 742 | " MOV R1, #0 \n" |
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| 743 | " BL sub_FF82862C \n" |
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| 744 | " MOV R0, #0x28 \n" |
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| 745 | " BL sub_FF828484 \n" |
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| 746 | //------------------ added code --------------------- |
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| 747 | "sleep_loop:\n" |
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| 748 | "LDR R0, =jogdial_stopped\n" |
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| 749 | "LDR R0, [R0]\n" |
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| 750 | "CMP R0, #1\n" |
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| 751 | "BNE sleep_done\n" |
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| 752 | "MOV R0, #40\n" |
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| 753 | "BL _SleepTask\n" |
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| 754 | "B sleep_loop\n" |
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| 755 | "sleep_done:\n" |
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| 756 | //------------------ original code ------------------ |
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| 757 | |
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| 758 | " LDR R0, [R7, #0x104] \n" |
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| 759 | " MOV R0, R0, ASR #0x10 \n" |
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| 760 | " STRH R0, [R6] \n" |
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| 761 | " LDRSH R2, [R6, #2] \n" |
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| 762 | " SUB R1, R0, R2 \n" |
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| 763 | " CMP R1, #0 \n" |
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| 764 | " BEQ loc_FF84B320 \n" |
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| 765 | " MOV R5, R1 \n" |
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| 766 | " RSBLT R5, R5, #0 \n" |
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| 767 | " MOVLE R4, #0 \n" |
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| 768 | " MOVGT R4, #1 \n" |
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| 769 | " CMP R5, #0xFF \n" |
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| 770 | " BLS loc_FF84B2D4 \n" |
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| 771 | " CMP R1, #0 \n" |
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| 772 | " RSBLE R1, R2, #0xFF \n" |
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| 773 | " ADDLE R1, R1, #0x7F00 \n" |
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| 774 | " ADDLE R0, R1, R0 \n" |
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| 775 | " RSBGT R0, R0, #0xFF \n" |
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| 776 | " ADDGT R0, R0, #0x7F00 \n" |
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| 777 | " ADDGT R0, R0, R2 \n" |
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| 778 | " ADD R5, R0, #0x8000 \n" |
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| 779 | " ADD R5, R5, #1 \n" |
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| 780 | " EOR R4, R4, #1 \n" |
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| 781 | "loc_FF84B2D4:\n" |
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| 782 | " LDR R0, [R6, #0x14] \n" |
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| 783 | " CMP R0, #0 \n" |
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| 784 | " BEQ loc_FF84B318 \n" |
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| 785 | " LDR R0, [R6, #0x1C] \n" |
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| 786 | " CMP R0, #0 \n" |
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| 787 | " BEQ loc_FF84B300 \n" |
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| 788 | " LDR R1, [R8, R4, LSL #2] \n" |
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| 789 | " CMP R1, R0 \n" |
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| 790 | " BEQ loc_FF84B308 \n" |
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| 791 | " LDR R0, =0xB01 \n" |
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| 792 | " BL sub_FF87EC00 \n" |
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| 793 | "loc_FF84B300:\n" |
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| 794 | " MOV R0, R11 \n" |
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| 795 | " BL sub_FF87EC00 \n" |
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| 796 | "loc_FF84B308:\n" |
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| 797 | " LDR R0, [R8, R4, LSL #2] \n" |
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| 798 | " MOV R1, R5 \n" |
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| 799 | " STR R0, [R6, #0x1C] \n" |
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| 800 | " BL sub_FF87EB30 \n" |
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| 801 | "loc_FF84B318:\n" |
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| 802 | " LDRH R0, [R6] \n" |
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| 803 | " STRH R0, [R6, #2] \n" |
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| 804 | "loc_FF84B320:\n" |
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| 805 | " STR R10, [R7, #0x100] \n" |
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| 806 | " STR R9, [R7, #0x108] \n" |
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| 807 | " LDR R0, [R6, #0x10] \n" |
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| 808 | " CMP R0, #0 \n" |
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| 809 | " BLNE sub_FF828484 \n" |
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| 810 | " B loc_FF84B25C \n" |
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| 811 | ); |
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| 812 | } |
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| 813 | |
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| 814 | |
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