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source: trunk/platform/d10/sub/100a/boot.c @ 914

Revision 914, 23.5 KB checked in by reyalp, 3 years ago (diff)
add multi-partition support for d10
Property svn:eol-style set to `native`

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4
5	const char * const new_sa = &_end;
6
7	/* Ours stuff */
8	extern long wrs_kernel_bss_start;
9	extern long wrs_kernel_bss_end;
10
11	// Forward declarations
12	void CreateTask_spytask();
13	void boot();
14	void task_CaptSeqTask_my();
15
16	void taskCreateHook(int *p) {
17	p-=17;
18	if (p[0]==0xFF87B84C) p[0]=(int)init_file_modules_task;
19	if (p[0]==0xFF860F34) p[0]=(int)task_CaptSeqTask_my;
20	/*
21	if (p[0]==0x) p[0]=(int)movie_record_task;
22	*/
23	}
24
25	/*
26	void taskCreateHook2(int *p) {
27	p-=17;
28	}
29	*/
30
31
32	#define DEBUG_LED ((unsigned volatile *)0xC0220130) // RED
33	#define GREEN_LED ((unsigned volatile *)0xC0220134) // GREEN
34	void boot() {
35	long canon_data_src = (void)0xFFB4EFA4;
36	long canon_data_dst = (void)0x1900;
37	long canon_data_len = 0xCDA0 - 0x1900; // data_end - data_start
38	long canon_bss_start = (void)0xCDA0; // just after data
39	long canon_bss_len = 0x146A2C - 0xCDA0;
40
41	long i;
42
43	*DEBUG_LED = 0x44;
44	*GREEN_LED = 0x46;
45
46	// enable caches and write buffer... this is a carryover from old dryos ports, may not be useful
47	asm volatile (
48	"MRC p15, 0, R0,c1,c0\n"
49	"ORR R0, R0, #0x1000\n"
50	"ORR R0, R0, #4\n"
51	"ORR R0, R0, #1\n"
52	"MCR p15, 0, R0,c1,c0\n"
53	:::"r0");
54
55	for(i=0;i<canon_data_len/4;i++)
56	canon_data_dst[i]=canon_data_src[i];
57
58	for(i=0;i<canon_bss_len/4;i++)
59	canon_bss_start[i]=0;
60
61	// see http://chdk.setepontos.com/index.php/topic,2972.msg30712.html#msg30712
62	// this works for init_file_modules task in both play and rec mode
63	(int)0x1934=(int)taskCreateHook;
64	// this does not start init_file_modules task ever
65	// (int)0x1938=(int)taskCreateHook2;
66
67	// Search on 0x12345678 finds function called by sub_FF849EB0, values found there OK
68	(int)(0x2444)= ((int)0xC02200F8)&1 ? 0x200000 : 0x100000;
69
70	// jump to init-sequence that follows the data-copy-routine
71	asm volatile ("B sub_FF8101A0_my\n");
72	}
73
74	void __attribute__((naked,noinline)) sub_FF8101A0_my() {
75	asm volatile (
76	" LDR R0, =0xFF810218\n" // exception handler code
77	" MOV R1, #0\n"
78	" LDR R3, =0xFF810250\n"
79	"loc_FF8101AC:\n"
80	" CMP R0, R3\n" // load exception vector
81	" LDRCC R2, [R0],#4\n"
82	" STRCC R2, [R1],#4\n"
83	" BCC loc_FF8101AC\n"
84	" LDR R0, =0xFF810250\n"
85	" MOV R1, #0x4B0\n"
86	" LDR R3, =0xFF810464\n"
87	"loc_FF8101C8:\n"
88	" CMP R0, R3\n" // copy IRQ handler to ITCM starting at 0x4b0, 532 bytes up to 0x6C4
89	" LDRCC R2, [R0],#4\n"
90	" STRCC R2, [R1],#4\n"
91	" BCC loc_FF8101C8\n"
92	" MOV R0, #0xD2\n"
93	" MSR CPSR_cxsf, R0\n" // set CPSR mode = IRQ, ints disabled
94	" MOV SP, #0x1000\n" // irq mode SP
95	" MOV R0, #0xD3\n"
96	" MSR CPSR_cxsf, R0\n" // set CPSR mode = Super, ints disabled
97	" MOV SP, #0x1000\n" // super mode SP
98	" LDR R0, =0x6C4\n"
99	" LDR R2, =0xEEEEEEEE\n"
100	" MOV R3, #0x1000\n"
101	"loc_FF8101FC:\n"
102	" CMP R0, R3\n" // clear ITCM 0x6C4-end with EEEEEEEE
103	" STRCC R2, [R0],#4\n"
104	" BCC loc_FF8101FC\n"
105	" BL sub_FF810FC4_my\n" //->
106	);
107	}
108
109	void __attribute__((naked,noinline)) sub_FF810FC4_my() {
110	asm volatile (
111	" STR LR, [SP,#-4]!\n"
112	" SUB SP, SP, #0x74\n"
113	" MOV R0, SP\n"
114	" MOV R1, #0x74\n"
115	" BL sub_FFACBFBC\n"
116	" MOV R0, #0x53000\n"
117	" STR R0, [SP,#4]\n"
118	//" LDR R0, =0x146A2C\n"
119	"LDR R0, =new_sa\n"
120	"LDR R0, [R0]\n"
121	" LDR R2, =0x2F9C00\n"
122	" LDR R1, =0x2F24A8\n"
123	" STR R0, [SP,#8]\n"
124	" SUB R0, R1, R0\n"
125	" ADD R3, SP, #0xC\n"
126	" STR R2, [SP]\n"
127	" STMIA R3, {R0-R2}\n"
128	" MOV R0, #0x22\n"
129	" STR R0, [SP,#0x18]\n"
130	" MOV R0, #0x68\n"
131	" STR R0, [SP,#0x1C]\n"
132	" LDR R0, =0x19B\n"
133	" LDR R1, =sub_FF814D38_my\n"
134	" STR R0, [SP,#0x20]\n"
135	" MOV R0, #0x96\n"
136	" STR R0, [SP,#0x24]\n"
137	" MOV R0, #0x78\n"
138	" STR R0, [SP,#0x28]\n"
139	" MOV R0, #0x64\n"
140	" STR R0, [SP,#0x2C]\n"
141	" MOV R0, #0\n"
142	" STR R0, [SP,#0x30]\n"
143	" STR R0, [SP,#0x34]\n"
144	" MOV R0, #0x10\n"
145	" STR R0, [SP,#0x5C]\n"
146	" MOV R0, #0x800\n"
147	" STR R0, [SP,#0x60]\n"
148	" MOV R0, #0xA0\n"
149	" STR R0, [SP,#0x64]\n"
150	" MOV R0, #0x280\n"
151	" STR R0, [SP,#0x68]\n"
152	" MOV R0, SP\n"
153	" MOV R2, #0\n"
154	" BL sub_FF812D68\n"
155	" ADD SP, SP, #0x74\n"
156	" LDR PC, [SP],#4\n"
157	);
158	}
159	void __attribute__((naked,noinline)) sub_FF814D38_my() {
160	asm volatile (
161	" STMFD SP!, {R4,LR}\n"
162	" BL sub_FF810954\n"
163	" BL sub_FF8190B4\n" // dmSetup
164	" CMP R0, #0\n"
165	" LDRLT R0, =0xFF814E4C\n" // "dmSetup"
166	" BLLT sub_FF814E2C\n" // err_init_task
167	" BL sub_FF814974\n"
168	" CMP R0, #0\n"
169	" LDRLT R0,=0xFF814E54\n" // "termDriverInit"
170	" BLLT sub_FF814E2C\n" // err_init_task
171	" LDR R0, =0xFF814E64\n" // "/_term"
172	" BL sub_FF814A5C\n" // termDeviceCreate
173	" CMP R0, #0\n"
174	" LDRLT R0, =0xFF814E6C\n" // "termDeviceCreate"
175	" BLLT sub_FF814E2C\n" // err_init_task
176	" LDR R0, =0xFF814E64\n" // "/_term"
177	" BL sub_FF813578\n" // stdioSetup
178	" CMP R0, #0\n"
179	" LDRLT R0, =0xFF814E80\n" // "stdioSetup"
180	" BLLT sub_FF814E2C\n" // err_init_task
181	" BL sub_FF818BCC\n"
182	" CMP R0, #0\n"
183	" LDRLT R0, =0xFF814E8C\n" // "stdlibSetup"
184	" BLLT sub_FF814E2C\n" // err_init_task
185	" BL sub_FF8114A8\n"
186	" CMP R0, #0\n"
187	" LDRLT R0, =0xFF814E98\n" // "armlib_setup"
188	" BLLT sub_FF814E2C\n" // err_init_task
189	" LDMFD SP!, {R4,LR}\n"
190	" B taskcreate_Startup_my\n"
191	);
192	}
193
194	void __attribute__((naked,noinline)) taskcreate_Startup_my() {
195	asm volatile (
196	" STMFD SP!, {R3,LR}\n"
197	//" BL j_nullsub_173\n"
198	" BL sub_FF828F44\n"
199	" CMP R0, #0\n"
200	" BNE loc_FF81C29C\n"
201	" BL sub_FF821B88\n"
202	" CMP R0, #0\n"
203	" BNE loc_FF81C29C\n"
204	" BL sub_FF821254\n"
205	" LDR R1, =0xC0220000\n"
206	" MOV R0, #0x44\n"
207	" STR R0, [R1,#0x14]\n"
208	" STR R0, [R1,#0x1C]\n"
209	" BL sub_FF821440\n"
210	"loc_FF81C298:\n"
211	" B loc_FF81C298\n"
212	"loc_FF81C29C:\n"
213	//" BL sub_FF821B94\n" // remove for correct power on (hold pwr button for rec)
214	//" BL j_nullsub_174\n"
215	" BL sub_FF8271FC\n"
216	" LDR R1, =0x34E000\n"
217	" MOV R0, #0\n"
218	" BL sub_FF827644\n"
219	" BL sub_FF8273F0\n" // KerSys.c 548
220	" MOV R3, #0\n"
221	" STR R3, [SP]\n"
222	" LDR R3, =task_Startup_my\n"
223	" MOV R2, #0\n"
224	" MOV R1, #0x19\n"
225	" LDR R0, =0xFF81C2E0\n" // aStartup
226	" BL sub_FF81AFAC\n" // eventproc_export_CreateTask
227	" MOV R0, #0\n"
228	" LDMFD SP!, {R12,PC}\n"
229	);
230	}
231
232	void CreateTask_blinker();
233
234	void __attribute__((naked,noinline)) task_Startup_my() {
235	asm volatile (
236	" STMFD SP!, {R4,LR}\n"
237	" BL sub_FF815394\n" // taskcreate_ClockSave
238	" BL sub_FF822C70\n"
239	" BL sub_FF820F38\n"
240	//" BL j_nullsub_175\n"
241	" BL sub_FF829168\n"
242	//" BL sub_FF829018\n" // diskboot
243	" BL CreateTask_spytask\n"
244	" BL sub_FF829304\n"
245	" BL sub_FF81FB94\n"
246	" BL sub_FF829198\n"
247	" BL sub_FF8267FC\n"
248	" BL sub_FF829308\n"
249	" BL taskcreatePhySw_my\n" // we do this here rather than hook so we don't waste the original stack
250	//" BL sub_FF821A88\n" // taskcreate_PhySw
251	" BL sub_FF824ADC\n"
252	" BL sub_FF829320\n"
253	//" BL nullsub_2\n"
254	" BL sub_FF820854\n"
255	" BL sub_FF828D24\n" // taskcreate_Bye
256	" BL sub_FF820EE8\n"
257	" BL sub_FF820760\n" // taskcreate_TempCheck LOCATION: LowBat.c:2
258	" BL sub_FF81FBC8\n"
259	" BL sub_FF829DE8\n"
260	" BL sub_FF820738\n"
261	" LDMFD SP!, {R4,LR}\n"
262	" B sub_FF8154B4\n" // LOCATION: MLHClock.c:0
263	);
264	}
265
266	void __attribute__((naked,noinline)) taskcreatePhySw_my() {
267	asm volatile (
268	" STMFD SP!, {R3-R5,LR}\n"
269	" LDR R4, =0x1C2C\n"
270	" LDR R0, [R4,#0x10]\n"
271	" CMP R0, #0\n"
272	" BNE loc_FF821ABC\n"
273	" MOV R3, #0\n"
274	" STR R3, [SP]\n"
275	" LDR R3, =mykbd_task\n" // task_PhySw
276	//" MOV R2, #0x800\n"
277	" MOV R2, #0x2000\n" // stack size for new task_PhySw so we don't have to do stack switch
278	" MOV R1, #0x17\n"
279	" LDR R0, =0xFF821C90\n" // "PhySw"
280	" BL sub_FF827444\n" // KernelCreateTask LOCATION: KernelMisc.c:19
281	" STR R0, [R4,#0x10]\n"
282	"loc_FF821ABC:\n"
283	" BL sub_FF87015C\n"
284	" BL sub_FF849F90\n" // IsFactoryMode
285	" CMP R0, #0\n"
286	" LDREQ R1, =0xE244\n"
287	" LDMEQFD SP!, {R3-R5,LR}\n"
288	" BEQ sub_FF8700E4\n" // eventproc_export_OpLog_Start
289	" LDMFD SP!, {R3-R5,PC}\n"
290	);
291	}
292
293	void CreateTask_spytask() {
294	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
295	}
296
297	void __attribute__((naked,noinline)) init_file_modules_task() {
298	asm volatile (
299	" STMFD SP!, {R4-R6,LR}\n"
300	" BL sub_FF87256C\n"
301	" LDR R5, =0x5006\n"
302	" MOVS R4, R0\n"
303	" MOVNE R1, #0\n"
304	" MOVNE R0, R5\n"
305	" BLNE sub_FF8773D4\n" // PostLogicalEventToUI
306	" BL sub_FF872598_my\n" // -> TODO
307	" BL core_spytask_can_start\n" // + safe to start spytask
308	" CMP R4, #0\n"
309	" MOVEQ R0, R5\n"
310	" LDMEQFD SP!, {R4-R6,LR}\n"
311	" MOVEQ R1, #0\n"
312	" BEQ sub_FF8773D4\n" // PostLogicalEventToUI
313	" LDMFD SP!, {R4-R6,PC}\n"
314	);
315	}
316
317	void __attribute__((naked,noinline)) sub_FF872598_my() {
318	asm volatile (
319	" STMFD SP!, {R4,LR}\n"
320	" MOV R0, #3\n"
321	" BL sub_FF855974_my\n" // -> (Mounter.c)
322	//" BL nullsub_64\n"
323	" LDR R4, =0x2E20\n"
324	" LDR R0, [R4,#4]\n"
325	" CMP R0, #0\n"
326	" BNE loc_FF8725D0\n"
327	" BL sub_FF854D38\n"
328	" BL sub_FF902984\n"
329	" BL sub_FF854D38\n"
330	" BL sub_FF850D8C\n"
331	" BL sub_FF854C38\n"
332	" BL sub_FF902A50\n"
333	"loc_FF8725D0:\n"
334	" MOV R0, #1\n"
335	" STR R0, [R4]\n"
336	" LDMFD SP!, {R4,PC}\n"
337
338	);
339	}
340
341	void __attribute__((naked,noinline)) sub_FF855974_my() {
342	asm volatile (
343	" STMFD SP!, {R4-R8,LR}\n"
344	" MOV R6, R0\n"
345	" BL sub_FF8558DC\n" // Mounter.c 0
346	" LDR R1, =0x10770\n"
347	" MOV R5, R0\n"
348	" ADD R4, R1, R0,LSL#7\n"
349	" LDR R0, [R4,#0x70]\n"
350	" CMP R0, #4\n"
351	" LDREQ R1, =0x6D8\n"
352	" LDREQ R0, =0xFF855400\n" // "Mounter.c"
353	" BLEQ sub_FF81B284\n" // DebugAssert
354	" MOV R1, R6\n"
355	" MOV R0, R5\n"
356	" BL sub_FF855348\n" // Mounter.c 0
357	" LDR R0, [R4,#0x38]\n"
358	" BL sub_FF855EA0\n"
359	" CMP R0, #0\n"
360	" STREQ R0, [R4,#0x70]\n"
361	" MOV R0, R5\n"
362	" BL sub_FF855420\n"
363	" MOV R0, R5\n"
364	" BL sub_FF855714_my\n" // ->
365	" MOV R7, R0\n"
366	" MOV R0, R5\n"
367	" BL sub_FF855778\n" // Mounter.c 7
368	" LDR R1, [R4,#0x3C]\n"
369	" AND R2, R7, R0\n"
370	" CMP R1, #0\n"
371	" MOV R0, #0\n"
372	" MOVEQ R0, #0x80000001\n"
373	" BEQ loc_FF855A1C\n"
374	" LDR R3, [R4,#0x2C]\n"
375	" CMP R3, #2\n"
376	" MOVEQ R0, #4\n"
377	" CMP R1, #5\n"
378	" ORRNE R0, R0, #1\n"
379	" BICEQ R0, R0, #1\n"
380	" CMP R2, #0\n"
381	" BICEQ R0, R0, #2\n"
382	" ORREQ R0, R0, #0x80000000\n"
383	" BICNE R0, R0, #0x80000000\n"
384	" ORRNE R0, R0, #2\n"
385	"loc_FF855A1C:\n"
386	" CMP R6, #7\n"
387	" STR R0, [R4,#0x40]\n"
388	" LDMNEFD SP!, {R4-R8,PC}\n"
389	" MOV R0, R6\n"
390	" BL sub_FF85592C\n"
391	" CMP R0, #0\n"
392	" LDMEQFD SP!, {R4-R8,LR}\n"
393	" LDREQ R0, =0xFF855C18\n" // "EmemMountError"
394	" BEQ sub_FF8115A8\n" // qPrintf
395	" LDMFD SP!, {R4-R8,PC}\n"
396
397	);
398	}
399
400	void __attribute__((naked,noinline)) sub_FF855714_my() {
401	asm volatile (
402	" STMFD SP!, {R4-R6,LR}\n"
403	" MOV R5, R0\n"
404	" LDR R0, =0x10770\n"
405	" ADD R4, R0, R5,LSL#7\n"
406	" LDR R0, [R4,#0x70]\n"
407	" TST R0, #2\n"
408	" MOVNE R0, #1\n"
409	" LDMNEFD SP!, {R4-R6,PC}\n"
410	" LDR R0, [R4,#0x38]\n"
411	" MOV R1, R5\n"
412	" BL sub_FF8554A4_my\n" // -> (Mounter.c)
413	" CMP R0, #0\n"
414	" LDMEQFD SP!, {R4-R6,PC}\n"
415	" LDR R0, [R4,#0x38]\n"
416	" MOV R1, R5\n"
417	" BL sub_FF855610\n" // Mounter.c
418	" CMP R0, #0\n"
419	" LDMEQFD SP!, {R4-R6,PC}\n"
420	" MOV R0, R5\n"
421	" BL sub_FF854F30\n"
422	" CMP R0, #0\n"
423	" LDRNE R1, [R4,#0x70]\n"
424	" ORRNE R1, R1, #2\n"
425	" STRNE R1, [R4,#0x70]\n"
426	" LDMFD SP!, {R4-R6,PC}\n"
427	);
428	}
429	void __attribute__((naked,noinline)) sub_FF8554A4_my() {
430	asm volatile (
431	" STMFD SP!, {R4-R8,LR}\n"
432	" MOV R8, R0\n"
433	" LDR R0, =0x10770\n"
434	" MOV R7, #0\n"
435	" ADD R5, R0, R1,LSL#7\n"
436	" LDR R0, [R5,#0x3C]\n"
437	" MOV R6, #0\n"
438	" CMP R0, #7\n"
439	" ADDLS PC, PC, R0,LSL#2\n"
440	" B loc_FF8555F4\n"
441	" B loc_FF855504\n"
442	" B loc_FF8554EC\n"
443	" B loc_FF8554EC\n"
444	" B loc_FF8554EC\n"
445	" B loc_FF8554EC\n"
446	" B loc_FF8555EC\n"
447	" B loc_FF8554EC\n"
448	" B loc_FF8554EC\n"
449	"loc_FF8554EC:\n"
450	// jumptable FF8554C4 entries 1-4,6,7
451	" MOV R2, #0\n"
452	" MOV R1, #0x200\n"
453	" MOV R0, #2\n"
454	" BL sub_FF86C664\n"
455	" MOVS R4, R0\n"
456	" BNE loc_FF85550C\n"
457	"loc_FF855504:\n"
458	// jumptable FF8554C4 entry 0
459	" MOV R0, #0\n"
460	" LDMFD SP!, {R4-R8,PC}\n"
461	"loc_FF85550C:\n"
462	" LDR R12, [R5,#0x4C]\n"
463	" MOV R3, R4\n"
464	" MOV R2, #1\n"
465	" MOV R1, #0\n"
466	" MOV R0, R8\n"
467	" BLX R12\n"
468	" CMP R0, #1\n"
469	" BNE loc_FF855538\n"
470	" MOV R0, #2\n"
471	" BL sub_FF86C7B0\n" // ExMemMan.c 0
472	" B loc_FF855504\n"
473	"loc_FF855538:\n"
474
475	" LDR R1, [R5,#0x68]\n"
476	" MOV R0, R8\n"
477	" BLX R1\n"
478	"MOV R1, R4\n" // pointer to MBR in R1
479	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
480
481	// Start of DataGhost's FAT32 autodetection code
482	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
483	// According to the code below, we can use R1, R2, R3 and R12.
484	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
485	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
486	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
487	"MOV LR, R4\n" // Save old offset for MBR signature
488	"MOV R1, #1\n" // Note the current partition number
489	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
490	"dg_sd_fat32:\n"
491	"CMP R1, #4\n" // Did we already see the 4th partition?
492	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
493	"ADD R12, R12, #0x10\n" // Second partition
494	"ADD R1, R1, #1\n" // Second partition for the loop
495	"dg_sd_fat32_enter:\n"
496	"LDRB R2, [R12, #0x1BE]\n" // Partition status
497	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
498	"CMP R3, #0xB\n" // Is this a FAT32 partition?
499	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
500	"BNE dg_sd_fat32\n" // No, it isn't. Loop again.
501	"CMP R2, #0x00\n" // It is, check the validity of the partition type
502	"CMPNE R2, #0x80\n"
503	"BNE dg_sd_fat32\n" // Invalid, go to next partition
504	// This partition is valid, it's the first one, bingo!
505	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
506
507	"dg_sd_fat32_end:\n"
508	// End of DataGhost's FAT32 autodetection code
509	" LDRB R1, [R4,#0x1C9]\n"
510	" LDRB R3, [R4,#0x1C8]\n"
511	" LDRB R12, [R4,#0x1CC]\n"
512	" MOV R1, R1,LSL#24\n"
513	" ORR R1, R1, R3,LSL#16\n"
514	" LDRB R3, [R4,#0x1C7]\n"
515	" LDRB R2, [R4,#0x1BE]\n"
516	//" LDRB LR, [R4,#0x1FF]\n"
517	" ORR R1, R1, R3,LSL#8\n"
518	" LDRB R3, [R4,#0x1C6]\n"
519	" CMP R2, #0\n"
520	" CMPNE R2, #0x80\n"
521	" ORR R1, R1, R3\n"
522	" LDRB R3, [R4,#0x1CD]\n"
523	" MOV R3, R3,LSL#24\n"
524	" ORR R3, R3, R12,LSL#16\n"
525	" LDRB R12, [R4,#0x1CB]\n"
526	" ORR R3, R3, R12,LSL#8\n"
527	" LDRB R12, [R4,#0x1CA]\n"
528	" ORR R3, R3, R12\n"
529	//" LDRB R12, [R4,#0x1FE]\n"
530	" LDRB R12, [LR,#0x1FE]\n" // +
531	" LDRB LR, [LR,#0x1FF]\n" // +
532	" MOV R4, #0\n"
533	" BNE loc_FF8555C4\n"
534	" CMP R0, R1\n"
535	" BCC loc_FF8555C4\n"
536	" ADD R2, R1, R3\n"
537	" CMP R2, R0\n"
538	" CMPLS R12, #0x55\n"
539	" CMPEQ LR, #0xAA\n"
540	" MOVEQ R7, R1\n"
541	" MOVEQ R6, R3\n"
542	" MOVEQ R4, #1\n"
543	"loc_FF8555C4:\n"
544	" MOV R0, #2\n"
545	" BL sub_FF86C7B0\n" // ExMemMan.c 0
546	" CMP R4, #0\n"
547	" BNE loc_FF855600\n"
548	" LDR R1, [R5,#0x68]\n"
549	" MOV R7, #0\n"
550	" MOV R0, R8\n"
551	" BLX R1\n"
552	" MOV R6, R0\n"
553	" B loc_FF855600\n"
554	"loc_FF8555EC:\n"
555	// jumptable FF8554C4 entry 5
556	" MOV R6, #0x40\n"
557	" B loc_FF855600\n"
558	"loc_FF8555F4:\n"
559	// jumptable FF8554C4 default entry
560	" LDR R1, =0x5C9\n"
561	" LDR R0, =0xFF855400\n" // "Mounter.c"
562	" BL sub_FF81B1CC\n" // DebugAssert
563	"loc_FF855600:\n"
564	" STR R7, [R5,#0x44]!\n"
565	" MOV R0, #1\n"
566	" STR R6, [R5,#4]\n"
567	" LDMFD SP!, {R4-R8,PC}\n"
568	);
569	}
570
571	#if 0
572	const unsigned ledlist[]={
573	0xC0220134, // green
574	0xC0220130, // red
575	};
576	// shamelessly stolen from s5 for debugging
577	extern void msleep(int x);
578	void __attribute__((noinline)) task_blinker() {
579	int ledstate;
580
581	int counter = 0;
582
583	int led = (void) ledlist[0];
584	int i_led = 0;
585
586	int *anypointer; // multi-purpose pointer to poke around in memory
587	int v1, v2, v3, v4; // multi-purpose vars
588
589	ledstate = 0; // init: led off
590	*led = 0x46; // led on
591
592	while (1) {
593
594	if (ledstate == 1) { // toggle LED
595	ledstate = 0;
596	*led = 0x44; // LED off
597	led=(void *)ledlist[(++i_led)%2];
598	//core_test(1);
599	} else {
600	ledstate = 1;
601	*led = 0x46; // LED on
602	//core_test(0);
603	}
604
605	if (counter == 2) {
606	//dump_chdk();
607	//gui_init();
608	//_ExecuteEventProcedure("UIFS_WriteFirmInfoToFile");
609	//_UIFS_WriteFirmInfoToFile(0);
610	}
611
612	if (counter == 10) {
613	//draw_txt_string(2, 2, "test");
614	}
615
616	msleep(500);
617	counter++;
618	}
619	};
620
621	void CreateTask_blinker() {
622	_CreateTask("Blinker", 0x1, 0x200, task_blinker, 0);
623	};
624	#endif
625

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