| 1 | #include "lolevel.h" |
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| 2 | #include "platform.h" |
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| 3 | #include "core.h" |
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| 4 | #include "stdlib.h" |
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| 5 | #include "dryos31.h" |
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| 6 | #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER) |
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| 7 | const char * const new_sa = &_end; |
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| 8 | |
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| 9 | |
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| 10 | // Forward declarations |
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| 11 | void CreateTask_PhySw(); |
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| 12 | void CreateTask_spytask(); |
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| 13 | void task_CaptSeqTask_my(); |
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| 14 | void taskCreateHook(int *p) { |
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| 15 | p-=17; |
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| 16 | if (p[0]==0xFFC736C4) p[0]=(int)init_file_modules_task; |
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| 17 | if (p[0]==0xFFC5C1E8) p[0]=(int)task_CaptSeqTask_my; |
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| 18 | if (p[0]==0xFFC95048) p[0]=(int)exp_drv_task; |
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| 19 | if (p[0]==0xFFD138CC) p[0]=(int)movie_record_task; |
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| 20 | } |
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| 21 | |
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| 22 | void taskCreateHook2(int *p) { |
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| 23 | p-=17; |
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| 24 | if (p[0]==0xFFC736C4) p[0]=(int)init_file_modules_task; |
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| 25 | if (p[0]==0xFFC95048) p[0]=(int)exp_drv_task; |
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| 26 | } |
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| 27 | |
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| 28 | void __attribute__((naked,noinline)) boot() { |
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| 29 | |
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| 30 | asm volatile ( |
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| 31 | "LDR R1, =0xC0410000\n" |
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| 32 | "MOV R0, #0\n" |
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| 33 | "STR R0, [R1]\n" |
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| 34 | "MOV R1, #0x78\n" |
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| 35 | "loc_FFC0001C:\n" |
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| 36 | "MCR p15, 0, R1,c1,c0\n" |
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| 37 | "MOV R1, #0\n" |
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| 38 | "MCR p15, 0, R1,c7,c10, 4\n" |
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| 39 | "loc_FFC00028:\n" |
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| 40 | "MCR p15, 0, R1,c7,c5\n" |
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| 41 | "MCR p15, 0, R1,c7,c6\n" |
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| 42 | "MOV R0, #0x3D\n" |
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| 43 | "MCR p15, 0, R0,c6,c0\n" |
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| 44 | "MOV R0, #0xC000002F\n" |
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| 45 | "MCR p15, 0, R0,c6,c1\n" |
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| 46 | "MOV R0, #0x31\n" |
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| 47 | "MCR p15, 0, R0,c6,c2\n" |
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| 48 | "LDR R0, =0x10000031\n" |
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| 49 | "MCR p15, 0, R0,c6,c3\n" |
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| 50 | "MOV R0, #0x40000017\n" |
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| 51 | "MCR p15, 0, R0,c6,c4\n" |
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| 52 | "LDR R0, =0xFFC0002B\n" |
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| 53 | "MCR p15, 0, R0,c6,c5\n" |
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| 54 | "MOV R0, #0x34\n" |
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| 55 | "MCR p15, 0, R0,c2,c0\n" |
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| 56 | "MOV R0, #0x34\n" |
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| 57 | "MCR p15, 0, R0,c2,c0, 1\n" |
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| 58 | "MOV R0, #0x34\n" |
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| 59 | "MCR p15, 0, R0,c3,c0\n" |
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| 60 | "LDR R0, =0x3333330\n" |
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| 61 | "MCR p15, 0, R0,c5,c0, 2\n" |
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| 62 | "LDR R0, =0x3333330\n" |
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| 63 | "MCR p15, 0, R0,c5,c0, 3\n" |
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| 64 | "MRC p15, 0, R0,c1,c0\n" |
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| 65 | "ORR R0, R0, #0x1000\n" |
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| 66 | "ORR R0, R0, #4\n" |
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| 67 | "ORR R0, R0, #1\n" |
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| 68 | "MCR p15, 0, R0,c1,c0\n" |
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| 69 | "MOV R1, #0x40000006\n" |
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| 70 | "MCR p15, 0, R1,c9,c1\n" |
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| 71 | "MOV R1, #6\n" |
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| 72 | "MCR p15, 0, R1,c9,c1, 1\n" |
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| 73 | "MRC p15, 0, R1,c1,c0\n" |
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| 74 | "ORR R1, R1, #0x50000\n" |
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| 75 | "MCR p15, 0, R1,c1,c0\n" |
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| 76 | "LDR R2, =0xC0200000\n" |
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| 77 | "MOV R1, #1\n" |
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| 78 | "STR R1, [R2,#0x10C]\n" |
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| 79 | "MOV R1, #0xFF\n" |
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| 80 | "STR R1, [R2,#0xC]\n" |
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| 81 | "STR R1, [R2,#0x1C]\n" |
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| 82 | "STR R1, [R2,#0x2C]\n" |
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| 83 | "STR R1, [R2,#0x3C]\n" |
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| 84 | "STR R1, [R2,#0x4C]\n" |
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| 85 | "STR R1, [R2,#0x5C]\n" |
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| 86 | "STR R1, [R2,#0x6C]\n" |
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| 87 | "STR R1, [R2,#0x7C]\n" |
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| 88 | "STR R1, [R2,#0x8C]\n" |
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| 89 | "STR R1, [R2,#0x9C]\n" |
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| 90 | "STR R1, [R2,#0xAC]\n" |
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| 91 | "STR R1, [R2,#0xBC]\n" |
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| 92 | "STR R1, [R2,#0xCC]\n" |
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| 93 | "STR R1, [R2,#0xDC]\n" |
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| 94 | "STR R1, [R2,#0xEC]\n" |
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| 95 | "STR R1, [R2,#0xFC]\n" |
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| 96 | "LDR R1, =0xC0400008\n" |
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| 97 | "LDR R2, =0x430005\n" |
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| 98 | "STR R2, [R1]\n" |
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| 99 | "MOV R1, #1\n" |
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| 100 | "LDR R2, =0xC0243100\n" |
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| 101 | "STR R2, [R1]\n" |
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| 102 | "LDR R2, =0xC0242010\n" |
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| 103 | "LDR R1, [R2]\n" |
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| 104 | "ORR R1, R1, #1\n" |
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| 105 | "STR R1, [R2]\n" |
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| 106 | "LDR R0, =0xFFF03620\n" |
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| 107 | "LDR R1, =0x1900\n" |
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| 108 | "LDR R3, =0xB294\n" |
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| 109 | "loc_FFC0013C:\n" |
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| 110 | "CMP R1, R3\n" |
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| 111 | "LDRCC R2, [R0],#4\n" |
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| 112 | "STRCC R2, [R1],#4\n" |
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| 113 | "BCC loc_FFC0013C\n" |
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| 114 | "LDR R1, =0x133D38 \n" |
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| 115 | "MOV R2, #0\n" |
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| 116 | "loc_FFC00154:\n" |
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| 117 | "CMP R3, R1\n" |
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| 118 | "STRCC R2, [R3],#4\n" |
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| 119 | "BCC loc_FFC00154\n" |
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| 120 | //"B loc_FFC00358\n" |
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| 121 | "B sub_FFC00358_my\n" // ----------------> |
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| 122 | ); |
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| 123 | }; |
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| 124 | |
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| 125 | void __attribute__((naked,noinline)) sub_FFC00358_my() { |
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| 126 | *(int*)0x1930=(int)taskCreateHook; |
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| 127 | *(int*)0x1934=(int)taskCreateHook2; |
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| 128 | *(int*)0x1938=(int)taskCreateHook; |
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| 129 | /* Power ON/OFF detection */ |
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| 130 | *(int*)(0x21B4)= (*(int*)0xC02200A8)&1 ? 0x200000 : 0x100000; // @ FFC43E14 replacement for correct power-on. |
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| 131 | |
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| 132 | asm volatile ( |
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| 133 | "loc_FFC00358:\n" |
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| 134 | "LDR R0, =0xFFC003D0\n" |
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| 135 | "MOV R1, #0\n" |
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| 136 | "LDR R3, =0xFFC00408\n" |
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| 137 | "loc_FFC00364:\n" |
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| 138 | "CMP R0, R3\n" |
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| 139 | "LDRCC R2, [R0],#4\n" |
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| 140 | "STRCC R2, [R1],#4\n" |
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| 141 | "BCC loc_FFC00364\n" |
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| 142 | "LDR R0, =0xFFC00408\n" |
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| 143 | "MOV R1, #0x4B0\n" |
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| 144 | "LDR R3, =0xFFC0061C\n" |
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| 145 | "loc_FFC00380:\n" |
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| 146 | "CMP R0, R3\n" |
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| 147 | "LDRCC R2, [R0],#4\n" |
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| 148 | "STRCC R2, [R1],#4\n" |
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| 149 | "BCC loc_FFC00380\n" |
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| 150 | "MOV R0, #0xD2\n" |
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| 151 | "MSR CPSR_cxsf, R0\n" |
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| 152 | "MOV SP, #0x1000\n" |
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| 153 | "MOV R0, #0xD3\n" |
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| 154 | "MSR CPSR_cxsf, R0\n" |
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| 155 | "MOV SP, #0x1000\n" |
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| 156 | "LDR R0, =0x6C4\n" |
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| 157 | "LDR R2, =0xEEEEEEEE\n" |
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| 158 | "MOV R3, #0x1000\n" |
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| 159 | "loc_FFC003B4:\n" |
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| 160 | "CMP R0, R3\n" |
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| 161 | "STRCC R2, [R0],#4\n" |
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| 162 | "BCC loc_FFC003B4\n" |
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| 163 | //"BL sub_FFC0119C\n" |
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| 164 | "BL sub_FFC0119C_my\n" |
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| 165 | "loc_FFC003C4:\n" |
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| 166 | "ANDEQ R0, R0, R4,ASR#13\n" |
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| 167 | "loc_FFC003C8:\n" |
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| 168 | "ANDEQ R0, R0, R0,ROR R6\n" |
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| 169 | "loc_FFC003CC:\n" |
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| 170 | "ANDEQ R0, R0, R4,ROR R6\n" |
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| 171 | "loc_FFC003D0:\n" |
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| 172 | "NOP\n" |
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| 173 | "LDR PC, =0xFFC0061C\n" |
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| 174 | ); |
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| 175 | }; |
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| 176 | |
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| 177 | |
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| 178 | void __attribute__((naked,noinline)) sub_FFC0119C_my() { |
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| 179 | asm volatile ( |
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| 180 | "STR LR, [SP,#-4]!\n" |
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| 181 | "SUB SP, SP, #0x74\n" |
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| 182 | "MOV R0, SP\n" |
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| 183 | "MOV R1, #0x74\n" |
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| 184 | "BL sub_FFE8D78C\n" |
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| 185 | "MOV R0, #0x53000\n" |
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| 186 | "STR R0, [SP,#4]\n" |
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| 187 | //"LDR R0, =0x133D38\n" // - |
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| 188 | "LDR R0, =new_sa\n" // + |
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| 189 | "LDR R0, [R0]\n" // + |
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| 190 | |
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| 191 | "LDR R2, =0x279C00\n" |
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| 192 | "LDR R1, =0x2724A8\n" |
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| 193 | "STR R0, [SP,#8]\n" |
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| 194 | "SUB R0, R1, R0\n" |
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| 195 | "ADD R3, SP, #0xC\n" |
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| 196 | "STR R2, [SP]\n" |
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| 197 | "STMIA R3, {R0-R2}\n" |
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| 198 | "MOV R0, #0x22\n" |
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| 199 | "STR R0, [SP,#0x18]\n" |
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| 200 | "MOV R0, #0x68\n" |
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| 201 | "STR R0, [SP,#0x1C]\n" |
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| 202 | "LDR R0, =0x19B\n" |
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| 203 | //"LDR R1, =sub_FFC05E5C\n" |
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| 204 | "LDR R1, =sub_FFC05E5C_my\n" |
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| 205 | "STR R0, [SP,#0x20]\n" |
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| 206 | "MOV R0, #0x96\n" |
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| 207 | "STR R0, [SP,#0x24]\n" |
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| 208 | "MOV R0, #0x78\n" |
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| 209 | "STR R0, [SP,#0x28]\n" |
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| 210 | "MOV R0, #0x64\n" |
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| 211 | "STR R0, [SP,#0x2C]\n" |
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| 212 | "MOV R0, #0\n" |
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| 213 | "STR R0, [SP,#0x30]\n" |
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| 214 | "STR R0, [SP,#0x34]\n" |
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| 215 | "MOV R0, #0x10\n" |
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| 216 | "STR R0, [SP,#0x5C]\n" |
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| 217 | "MOV R0, #0x800\n" |
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| 218 | "STR R0, [SP,#0x60]\n" |
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| 219 | "MOV R0, #0xA0\n" |
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| 220 | "STR R0, [SP,#0x64]\n" |
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| 221 | "MOV R0, #0x280\n" |
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| 222 | "STR R0, [SP,#0x68]\n" |
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| 223 | "MOV R0, SP\n" |
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| 224 | "MOV R2, #0\n" |
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| 225 | "BL sub_FFC03408\n" |
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| 226 | "ADD SP, SP, #0x74\n" |
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| 227 | "LDR PC, [SP],#4\n" |
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| 228 | ); |
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| 229 | }; |
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| 230 | |
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| 231 | void __attribute__((naked,noinline)) sub_FFC05E5C_my() { |
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| 232 | asm volatile ( |
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| 233 | "STMFD SP!, {R4,LR}\n" |
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| 234 | "BL sub_FFC00B24\n" |
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| 235 | "BL sub_FFC0A838\n" |
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| 236 | "CMP R0, #0\n" |
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| 237 | "LDRLT R0, =0xFFC05F70\n" |
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| 238 | "BLLT sub_FFC05F50 \n" |
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| 239 | "BL sub_FFC05A98\n" |
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| 240 | "CMP R0, #0\n" |
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| 241 | "LDRLT R0, =0xFFC05F78\n" |
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| 242 | "BLLT sub_FFC05F50\n" |
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| 243 | "LDR R0, =0xFFC05F88\n" |
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| 244 | "BL sub_FFC05B80\n" |
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| 245 | "CMP R0, #0\n" |
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| 246 | "LDRLT R0, =0xFFC05F90\n" |
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| 247 | "BLLT sub_FFC05F50\n" |
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| 248 | "LDR R0, =0xFFC05F88\n" |
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| 249 | "BL sub_FFC03BF4\n" |
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| 250 | "CMP R0, #0\n" |
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| 251 | "LDRLT R0, =0xFFC05FA4\n" |
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| 252 | "BLLT sub_FFC05F50\n" |
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| 253 | "BL sub_FFC0A230\n" |
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| 254 | "CMP R0, #0\n" |
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| 255 | "LDRLT R0, =0xFFC05FB0\n" |
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| 256 | "BLLT sub_FFC05F50\n" |
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| 257 | "BL sub_FFC01680\n" |
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| 258 | "CMP R0, #0\n" |
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| 259 | "LDRLT R0, =0xFFC05FBC\n" |
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| 260 | "BLLT sub_FFC05F50\n" |
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| 261 | "LDMFD SP!, {R4,LR}\n" |
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| 262 | //"B sub_FFC105BC\n" |
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| 263 | "B taskcreate_Startup_my\n" //----------> |
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| 264 | ); |
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| 265 | }; |
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| 266 | |
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| 267 | |
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| 268 | |
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| 269 | void __attribute__((naked,noinline)) taskcreate_Startup_my() { |
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| 270 | asm volatile ( |
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| 271 | "STMFD SP!, {R3,LR}\n" |
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| 272 | "BL sub_FFC23A78\n" |
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| 273 | "BL sub_FFC2AF84\n" |
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| 274 | "CMP R0, #0\n" |
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| 275 | "BNE loc_FFC105F8\n" |
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| 276 | "BL sub_FFC2526C\n" |
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| 277 | "CMP R0, #0\n" |
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| 278 | "BEQ loc_FFC105F8\n" |
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| 279 | "BL sub_FFC23A74\n" |
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| 280 | "CMP R0, #0\n" |
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| 281 | "BNE loc_FFC105F8\n" |
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| 282 | "LDR R1, =0xC0220000\n" |
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| 283 | "MOV R0, #0x44\n" |
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| 284 | "STR R0, [R1,#0x48]\n" |
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| 285 | "loc_FFC105F4:\n" |
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| 286 | "B loc_FFC105F4\n" |
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| 287 | "loc_FFC105F8:\n" |
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| 288 | //"BL sub_FFC23A80\n" // removed, see boot() function |
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| 289 | "BL sub_FFC23A7C\n" |
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| 290 | "BL sub_FFC293A8\n" |
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| 291 | "LDR R1, =0x2CE000\n" |
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| 292 | "MOV R0, #0\n" |
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| 293 | "BL sub_FFC295F0\n" |
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| 294 | "BL sub_FFC2959C\n" |
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| 295 | "MOV R3, #0\n" |
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| 296 | "STR R3, [SP]\n" |
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| 297 | //"ADR R3, 0xFFC10560\n" |
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| 298 | "LDR R3, =task_Startup_my\n" //+ -----------> |
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| 299 | "MOV R2, #0\n" |
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| 300 | "MOV R1, #0x19\n" |
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| 301 | "LDR R0, =0xFFC10640\n" |
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| 302 | "BL sub_FFC0F110\n" |
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| 303 | "MOV R0, #0\n" |
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| 304 | "LDMFD SP!, {R12,PC}\n" |
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| 305 | ); |
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| 306 | }; |
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| 307 | |
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| 308 | void __attribute__((naked,noinline)) task_Startup_my() { |
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| 309 | asm volatile ( |
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| 310 | |
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| 311 | "STMFD SP!, {R4,LR}\n" |
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| 312 | "BL sub_FFC06228\n" |
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| 313 | "BL sub_FFC24B7C\n" |
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| 314 | "BL sub_FFC23414\n" |
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| 315 | "BL sub_FFC2AFC4\n" |
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| 316 | "BL sub_FFC2B1B0\n" |
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| 317 | //"BL sub_FFC2B058\n" // Skip starting diskboot.bin again |
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| 318 | "BL sub_FFC2B34C\n" |
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| 319 | "BL sub_FFC2B1E0\n" |
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| 320 | "BL sub_FFC28840\n" |
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| 321 | "BL sub_FFC2B350\n" |
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| 322 | //"BL sub_FFC23968\n" |
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| 323 | ); |
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| 324 | CreateTask_PhySw(); // + |
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| 325 | CreateTask_spytask(); // + |
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| 326 | asm volatile ( |
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| 327 | "BL sub_FFC26EA8\n" |
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| 328 | "BL sub_FFC2B368\n" |
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| 329 | "BL sub_FFC222BC\n" |
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| 330 | "BL sub_FFC22E6C\n" |
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| 331 | "BL sub_FFC2AD5C\n" |
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| 332 | "BL sub_FFC233C8\n" |
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| 333 | "BL sub_FFC22E08\n" |
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| 334 | "BL sub_FFC2BDCC\n" |
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| 335 | "BL sub_FFC22DE0\n" |
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| 336 | "LDMFD SP!, {R4,LR}\n" |
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| 337 | "B sub_FFC06128\n" |
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| 338 | ); |
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| 339 | }; |
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| 340 | |
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| 341 | void spytask(long ua, long ub, long uc, long ud, long ue, long uf) |
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| 342 | { |
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| 343 | core_spytask(); |
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| 344 | } |
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| 345 | void CreateTask_spytask() { |
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| 346 | _CreateTask("SpyTask", 0x19, 0x2000, spytask, 0); |
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| 347 | }; |
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| 348 | |
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| 349 | void __attribute__((naked,noinline)) CreateTask_PhySw() { |
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| 350 | asm volatile ( |
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| 351 | "STMFD SP!, {R3-R5,LR}\n" |
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| 352 | "LDR R4, =0x1BE4\n" |
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| 353 | "LDR R0, [R4,#0x10]\n" |
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| 354 | "CMP R0, #0\n" |
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| 355 | "BNE loc_FFC2399C\n" |
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| 356 | "MOV R3, #0\n" |
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| 357 | "STR R3, [SP]\n" |
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| 358 | //"LDR R3, =0xFFC23934\n" |
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| 359 | //"MOV R2, #0x800\n" |
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| 360 | "LDR R3, =mykbd_task\n" // task_phySw |
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| 361 | "MOV R2, #0x2000\n" // greater Stacksize |
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| 362 | |
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| 363 | |
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| 364 | "MOV R1, #0x17\n" |
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| 365 | "LDR R0, =0xFFC23B70\n" |
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| 366 | "BL sub_FFC0F3E8 \n" |
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| 367 | "STR R0, [R4,#0x10]\n" |
|---|
| 368 | "loc_FFC2399C:\n" |
|---|
| 369 | "BL sub_FFC6AA64\n" |
|---|
| 370 | "BL sub_FFC251E4\n" |
|---|
| 371 | "CMP R0, #0\n" |
|---|
| 372 | "LDREQ R1, =0x2EEE0\n" |
|---|
| 373 | "LDMEQFD SP!, {R3-R5,LR}\n" |
|---|
| 374 | "BEQ sub_FFC6A9EC\n" |
|---|
| 375 | "LDMFD SP!, {R3-R5,PC}\n" |
|---|
| 376 | "CMP R0, #3\n" |
|---|
| 377 | ); |
|---|
| 378 | }; |
|---|
| 379 | |
|---|
| 380 | void __attribute__((naked,noinline)) init_file_modules_task() { |
|---|
| 381 | asm volatile ( |
|---|
| 382 | |
|---|
| 383 | "STMFD SP!, {R4-R6,LR}\n" |
|---|
| 384 | "BL sub_FFC6CF30\n" |
|---|
| 385 | "LDR R5, =0x5006\n" |
|---|
| 386 | "MOVS R4, R0\n" |
|---|
| 387 | "MOVNE R1, #0\n" |
|---|
| 388 | "MOVNE R0, R5\n" |
|---|
| 389 | "BLNE sub_FFC6F7EC\n" |
|---|
| 390 | //"BL sub_FFC6CF5C\n" |
|---|
| 391 | "BL sub_FFC6CF5C_my\n" |
|---|
| 392 | "BL core_spytask_can_start\n" // + |
|---|
| 393 | "CMP R4, #0\n" |
|---|
| 394 | "MOVEQ R0, R5\n" |
|---|
| 395 | "LDMEQFD SP!, {R4-R6,LR}\n" |
|---|
| 396 | "MOVEQ R1, #0\n" |
|---|
| 397 | "BEQ sub_FFC6F7EC\n" |
|---|
| 398 | "LDMFD SP!, {R4-R6,PC}\n" |
|---|
| 399 | ); |
|---|
| 400 | }; |
|---|
| 401 | |
|---|
| 402 | void __attribute__((naked,noinline)) sub_FFC6CF5C_my() { |
|---|
| 403 | asm volatile ( |
|---|
| 404 | |
|---|
| 405 | "STMFD SP!, {R4,LR}\n" |
|---|
| 406 | "MOV R0, #3\n" |
|---|
| 407 | //"BL sub_FFC52014\n" |
|---|
| 408 | "BL sub_FFC52014_my\n" |
|---|
| 409 | "BL sub_FFCFE338\n" |
|---|
| 410 | "LDR R4, =0x2B70\n" |
|---|
| 411 | "LDR R0, [R4,#4]\n" |
|---|
| 412 | "CMP R0, #0\n" |
|---|
| 413 | "BNE loc_FFC6CF94\n" |
|---|
| 414 | "BL sub_FFC5125C\n" |
|---|
| 415 | "BL sub_FFCF4908\n" |
|---|
| 416 | "BL sub_FFC5125C\n" |
|---|
| 417 | "BL sub_FFC4DCD4\n" |
|---|
| 418 | "BL sub_FFC5115C\n" |
|---|
| 419 | "BL sub_FFCF499C\n" |
|---|
| 420 | "loc_FFC6CF94:\n" |
|---|
| 421 | "MOV R0, #1\n" |
|---|
| 422 | "STR R0, [R4]\n" |
|---|
| 423 | "LDMFD SP!, {R4,PC}\n" |
|---|
| 424 | ); |
|---|
| 425 | }; |
|---|
| 426 | |
|---|
| 427 | |
|---|
| 428 | void __attribute__((naked,noinline)) sub_FFC52014_my() { |
|---|
| 429 | asm volatile ( |
|---|
| 430 | "STMFD SP!, {R4-R8,LR}\n" |
|---|
| 431 | "MOV R8, R0\n" |
|---|
| 432 | "BL sub_FFC51F94\n" |
|---|
| 433 | "LDR R1, =0x33688\n" |
|---|
| 434 | "MOV R6, R0\n" |
|---|
| 435 | "ADD R4, R1, R0,LSL#7\n" |
|---|
| 436 | "LDR R0, [R4,#0x6C]\n" |
|---|
| 437 | "CMP R0, #4\n" |
|---|
| 438 | "LDREQ R1, =0x817\n" |
|---|
| 439 | "LDREQ R0, =0xFFC51AD4\n" |
|---|
| 440 | "BLEQ sub_FFC0F5E8\n" |
|---|
| 441 | "MOV R1, R8\n" |
|---|
| 442 | "MOV R0, R6\n" |
|---|
| 443 | "BL sub_FFC5184C\n" |
|---|
| 444 | "LDR R0, [R4,#0x38]\n" |
|---|
| 445 | "BL sub_FFC526B4\n" |
|---|
| 446 | "CMP R0, #0\n" |
|---|
| 447 | "STREQ R0, [R4,#0x6C]\n" |
|---|
| 448 | "MOV R0, R6\n" |
|---|
| 449 | "BL sub_FFC518DC\n" |
|---|
| 450 | "MOV R0, R6\n" |
|---|
| 451 | //"BL sub_FFC51C3C\n" |
|---|
| 452 | "BL sub_FFC51C3C_my\n" //-------------> |
|---|
| 453 | "MOV R5, R0\n" |
|---|
| 454 | "MOV R0, R6\n" |
|---|
| 455 | "BL sub_FFC51E6C\n" |
|---|
| 456 | "LDR R6, [R4,#0x3C]\n" |
|---|
| 457 | "AND R7, R5, R0\n" |
|---|
| 458 | "CMP R6, #0\n" |
|---|
| 459 | "LDR R1, [R4,#0x38]\n" |
|---|
| 460 | "MOVEQ R0, #0x80000001\n" |
|---|
| 461 | "MOV R5, #0\n" |
|---|
| 462 | "BEQ loc_FFC520C4\n" |
|---|
| 463 | "MOV R0, R1\n" |
|---|
| 464 | "BL sub_FFC513C4\n" |
|---|
| 465 | "CMP R0, #0\n" |
|---|
| 466 | "MOVNE R5, #4\n" |
|---|
| 467 | "CMP R6, #5\n" |
|---|
| 468 | "ORRNE R0, R5, #1\n" |
|---|
| 469 | "BICEQ R0, R5, #1\n" |
|---|
| 470 | "CMP R7, #0\n" |
|---|
| 471 | "BICEQ R0, R0, #2\n" |
|---|
| 472 | "ORREQ R0, R0, #0x80000000\n" |
|---|
| 473 | "BICNE R0, R0, #0x80000000\n" |
|---|
| 474 | "ORRNE R0, R0, #2\n" |
|---|
| 475 | "loc_FFC520C4:\n" |
|---|
| 476 | "CMP R8, #7\n" |
|---|
| 477 | "STR R0, [R4,#0x40]\n" |
|---|
| 478 | "LDMNEFD SP!, {R4-R8,PC}\n" |
|---|
| 479 | "MOV R0, R8\n" |
|---|
| 480 | "BL sub_FFC51FE4\n" |
|---|
| 481 | "CMP R0, #0\n" |
|---|
| 482 | "LDMEQFD SP!, {R4-R8,LR}\n" |
|---|
| 483 | "LDREQ R0, =0xFFC52110\n" |
|---|
| 484 | "BEQ sub_FFC01780\n" |
|---|
| 485 | "LDMFD SP!, {R4-R8,PC}\n" |
|---|
| 486 | ); |
|---|
| 487 | }; |
|---|
| 488 | |
|---|
| 489 | void __attribute__((naked,noinline)) sub_FFC51C3C_my() { |
|---|
| 490 | |
|---|
| 491 | asm volatile ( |
|---|
| 492 | "STMFD SP!, {R4-R6,LR}\n" |
|---|
| 493 | "MOV R5, R0\n" |
|---|
| 494 | "LDR R0, =0x33688\n" |
|---|
| 495 | "ADD R4, R0, R5,LSL#7\n" |
|---|
| 496 | "LDR R0, [R4,#0x6C]\n" |
|---|
| 497 | "TST R0, #2\n" |
|---|
| 498 | "MOVNE R0, #1\n" |
|---|
| 499 | "LDMNEFD SP!, {R4-R6,PC}\n" |
|---|
| 500 | "LDR R0, [R4,#0x38]\n" |
|---|
| 501 | "MOV R1, R5\n" |
|---|
| 502 | //"BL sub_FFC5195C\n" |
|---|
| 503 | "BL sub_FFC5195C_my\n" // ------------------> |
|---|
| 504 | "CMP R0, #0\n" |
|---|
| 505 | "LDRNE R0, [R4,#0x38]\n" |
|---|
| 506 | "MOVNE R1, R5\n" |
|---|
| 507 | "BLNE sub_FFC51AF8\n" |
|---|
| 508 | "LDR R2, =0x33708\n" |
|---|
| 509 | "ADD R1, R5, R5,LSL#4\n" |
|---|
| 510 | "LDR R1, [R2,R1,LSL#2]\n" |
|---|
| 511 | "CMP R1, #4\n" |
|---|
| 512 | "BEQ loc_FFC51C9C\n" |
|---|
| 513 | "CMP R0, #0\n" |
|---|
| 514 | "LDMEQFD SP!, {R4-R6,PC}\n" |
|---|
| 515 | "MOV R0, R5\n" |
|---|
| 516 | "BL sub_FFC51454\n" |
|---|
| 517 | "loc_FFC51C9C:\n" |
|---|
| 518 | "CMP R0, #0\n" |
|---|
| 519 | "LDRNE R1, [R4,#0x6C]\n" |
|---|
| 520 | "ORRNE R1, R1, #2\n" |
|---|
| 521 | "STRNE R1, [R4,#0x6C]\n" |
|---|
| 522 | "LDMFD SP!, {R4-R6,PC}\n" |
|---|
| 523 | ); |
|---|
| 524 | }; |
|---|
| 525 | |
|---|
| 526 | |
|---|
| 527 | void __attribute__((naked,noinline)) sub_FFC5195C_my() { |
|---|
| 528 | asm volatile ( |
|---|
| 529 | "STMFD SP!, {R4-R10,LR}\n" |
|---|
| 530 | "MOV R9, R0\n" |
|---|
| 531 | "LDR R0, =0x33688\n" |
|---|
| 532 | "MOV R8, #0\n" |
|---|
| 533 | "ADD R5, R0, R1,LSL#7\n" |
|---|
| 534 | "LDR R0, [R5,#0x3C]\n" |
|---|
| 535 | "MOV R7, #0\n" |
|---|
| 536 | "CMP R0, #7\n" |
|---|
| 537 | "MOV R6, #0\n" |
|---|
| 538 | "ADDLS PC, PC, R0,LSL#2\n" |
|---|
| 539 | "B loc_FFC51AB4\n" |
|---|
| 540 | "loc_FFC51988:\n" |
|---|
| 541 | "B loc_FFC519C0\n" |
|---|
| 542 | "loc_FFC5198C:\n" |
|---|
| 543 | "B loc_FFC519A8\n" |
|---|
| 544 | "loc_FFC51990:\n" |
|---|
| 545 | "B loc_FFC519A8\n" |
|---|
| 546 | "loc_FFC51994:\n" |
|---|
| 547 | "B loc_FFC519A8\n" |
|---|
| 548 | "loc_FFC51998:\n" |
|---|
| 549 | "B loc_FFC519A8\n" |
|---|
| 550 | "loc_FFC5199C:\n" |
|---|
| 551 | "B loc_FFC51AAC\n" |
|---|
| 552 | "loc_FFC519A0:\n" |
|---|
| 553 | "B loc_FFC519A8\n" |
|---|
| 554 | "loc_FFC519A4:\n" |
|---|
| 555 | "B loc_FFC519A8\n" |
|---|
| 556 | "loc_FFC519A8:\n" |
|---|
| 557 | "MOV R2, #0\n" |
|---|
| 558 | "MOV R1, #0x200\n" |
|---|
| 559 | "MOV R0, #2\n" |
|---|
| 560 | "BL sub_FFC6715C\n" |
|---|
| 561 | "MOVS R4, R0\n" |
|---|
| 562 | "BNE loc_FFC519C8\n" |
|---|
| 563 | "loc_FFC519C0:\n" |
|---|
| 564 | "MOV R0, #0\n" |
|---|
| 565 | "LDMFD SP!, {R4-R10,PC}\n" |
|---|
| 566 | "loc_FFC519C8:\n" |
|---|
| 567 | "LDR R12, [R5,#0x50]\n" |
|---|
| 568 | "MOV R3, R4\n" |
|---|
| 569 | "MOV R2, #1\n" |
|---|
| 570 | "MOV R1, #0\n" |
|---|
| 571 | "MOV R0, R9\n" |
|---|
| 572 | "BLX R12\n" |
|---|
| 573 | "CMP R0, #1\n" |
|---|
| 574 | "BNE loc_FFC519F4\n" |
|---|
| 575 | "MOV R0, #2\n" |
|---|
| 576 | "BL sub_FFC672A8\n" |
|---|
| 577 | "B loc_FFC519C0\n" |
|---|
| 578 | "loc_FFC519F4:\n" |
|---|
| 579 | "LDR R1, [R5,#0x64]\n" |
|---|
| 580 | "MOV R0, R9\n" |
|---|
| 581 | "BLX R1\n" |
|---|
| 582 | |
|---|
| 583 | "MOV R1, R4\n" // pointer to MBR in R1 |
|---|
| 584 | // "BL mbr_read_dryos\n" // total sectors count in R0 before and after call |
|---|
| 585 | |
|---|
| 586 | // Start of DataGhost's FAT32 autodetection code |
|---|
| 587 | // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage |
|---|
| 588 | // According to the code below, we can use R1, R2, R3 and R12. |
|---|
| 589 | // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing |
|---|
| 590 | // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :) |
|---|
| 591 | "MOV R12, R4\n" // Copy the MBR start address so we have something to work with |
|---|
| 592 | "MOV LR, R4\n" // Save old offset for MBR signature |
|---|
| 593 | "MOV R1, #1\n" // Note the current partition number |
|---|
| 594 | "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet! |
|---|
| 595 | "dg_sd_fat32:\n" |
|---|
| 596 | "CMP R1, #4\n" // Did we already see the 4th partition? |
|---|
| 597 | "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything. |
|---|
| 598 | "ADD R12, R12, #0x10\n" // Second partition |
|---|
| 599 | "ADD R1, R1, #1\n" // Second partition for the loop |
|---|
| 600 | "dg_sd_fat32_enter:\n" |
|---|
| 601 | "LDRB R2, [R12, #0x1BE]\n" // Partition status |
|---|
| 602 | "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB) |
|---|
| 603 | "CMP R3, #0xB\n" // Is this a FAT32 partition? |
|---|
| 604 | "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then? |
|---|
| 605 | "BNE dg_sd_fat32\n" // No, it isn't. |
|---|
| 606 | "CMP R2, #0x00\n" // It is, check the validity of the partition type |
|---|
| 607 | "CMPNE R2, #0x80\n" |
|---|
| 608 | "BNE dg_sd_fat32\n" // Invalid, go to next partition |
|---|
| 609 | // This partition is valid, it's the first one, bingo! |
|---|
| 610 | "MOV R4, R12\n" // Move the new MBR offset for the partition detection. |
|---|
| 611 | |
|---|
| 612 | "dg_sd_fat32_end:\n" |
|---|
| 613 | // End of DataGhost's FAT32 autodetection code |
|---|
| 614 | |
|---|
| 615 | |
|---|
| 616 | "LDRB R1, [R4,#0x1C9]\n" |
|---|
| 617 | "LDRB R3, [R4,#0x1C8]\n" |
|---|
| 618 | "LDRB R12, [R4,#0x1CC]\n" |
|---|
| 619 | "MOV R1, R1,LSL#24\n" |
|---|
| 620 | "ORR R1, R1, R3,LSL#16\n" |
|---|
| 621 | "LDRB R3, [R4,#0x1C7]\n" |
|---|
| 622 | "LDRB R2, [R4,#0x1BE]\n" |
|---|
| 623 | //"LDRB LR, [R4,#0x1FF]\n" // replaced, see below |
|---|
| 624 | "ORR R1, R1, R3,LSL#8\n" |
|---|
| 625 | "LDRB R3, [R4,#0x1C6]\n" |
|---|
| 626 | "CMP R2, #0\n" |
|---|
| 627 | "CMPNE R2, #0x80\n" |
|---|
| 628 | "ORR R1, R1, R3\n" |
|---|
| 629 | "LDRB R3, [R4,#0x1CD]\n" |
|---|
| 630 | "MOV R3, R3,LSL#24\n" |
|---|
| 631 | "ORR R3, R3, R12,LSL#16\n" |
|---|
| 632 | "LDRB R12, [R4,#0x1CB]\n" |
|---|
| 633 | "ORR R3, R3, R12,LSL#8\n" |
|---|
| 634 | "LDRB R12, [R4,#0x1CA]\n" |
|---|
| 635 | "ORR R3, R3, R12\n" |
|---|
| 636 | //"LDRB R12, [R4,#0x1FE]\n" // replaced, see below |
|---|
| 637 | "LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55) |
|---|
| 638 | "LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA) |
|---|
| 639 | "BNE loc_FFC51A80\n" |
|---|
| 640 | "CMP R0, R1\n" |
|---|
| 641 | "BCC loc_FFC51A80\n" |
|---|
| 642 | "ADD R2, R1, R3\n" |
|---|
| 643 | "CMP R2, R0\n" |
|---|
| 644 | "CMPLS R12, #0x55\n" |
|---|
| 645 | "CMPEQ LR, #0xAA\n" |
|---|
| 646 | "MOVEQ R7, R1\n" |
|---|
| 647 | "MOVEQ R6, R3\n" |
|---|
| 648 | "MOVEQ R4, #1\n" |
|---|
| 649 | "BEQ loc_FFC51A84\n" |
|---|
| 650 | "loc_FFC51A80:\n" |
|---|
| 651 | "MOV R4, R8\n" |
|---|
| 652 | "loc_FFC51A84:\n" |
|---|
| 653 | "MOV R0, #2\n" |
|---|
| 654 | "BL sub_FFC672A8\n" |
|---|
| 655 | "CMP R4, #0\n" |
|---|
| 656 | "BNE loc_FFC51AC0\n" |
|---|
| 657 | "LDR R1, [R5,#0x64]\n" |
|---|
| 658 | "MOV R7, #0\n" |
|---|
| 659 | "MOV R0, R9\n" |
|---|
| 660 | "BLX R1\n" |
|---|
| 661 | "MOV R6, R0\n" |
|---|
| 662 | "B loc_FFC51AC0\n" |
|---|
| 663 | "loc_FFC51AAC:\n" |
|---|
| 664 | "MOV R6, #0x40\n" |
|---|
| 665 | "B loc_FFC51AC0\n" |
|---|
| 666 | "loc_FFC51AB4:\n" |
|---|
| 667 | "LDR R1, =0x572\n" |
|---|
| 668 | "LDR R0, =0xFFC51AD4\n" |
|---|
| 669 | "BL sub_FFC0F5E8\n" |
|---|
| 670 | "loc_FFC51AC0:\n" |
|---|
| 671 | "STR R7, [R5,#0x44]!\n" |
|---|
| 672 | "STMIB R5, {R6,R8}\n" |
|---|
| 673 | "MOV R0, #1\n" |
|---|
| 674 | "LDMFD SP!, {R4-R10,PC}\n" |
|---|
| 675 | |
|---|
| 676 | ); |
|---|
| 677 | }; |
|---|
| 678 | |
|---|
