| 1 | #include "lolevel.h" |
|---|
| 2 | #include "platform.h" |
|---|
| 3 | #include "core.h" |
|---|
| 4 | #include "dryos31.h" |
|---|
| 5 | |
|---|
| 6 | #define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER) |
|---|
| 7 | |
|---|
| 8 | const char * const new_sa = &_end; |
|---|
| 9 | |
|---|
| 10 | extern void task_CaptSeq(); |
|---|
| 11 | extern void task_InitFileModules(); |
|---|
| 12 | extern void task_MovieRecord(); |
|---|
| 13 | extern void task_ExpDrv(); |
|---|
| 14 | extern void task_PhySw(); |
|---|
| 15 | |
|---|
| 16 | void taskHook(context_t **context) { |
|---|
| 17 | task_t *tcb=(task_t*)((char*)context-offsetof(task_t, context)); |
|---|
| 18 | |
|---|
| 19 | // Replace firmware task addresses with ours |
|---|
| 20 | if(tcb->entry == (void*)task_PhySw) tcb->entry = (void*)mykbd_task; |
|---|
| 21 | if(tcb->entry == (void*)task_CaptSeq) tcb->entry = (void*)capt_seq_task; |
|---|
| 22 | if(tcb->entry == (void*)task_InitFileModules) tcb->entry = (void*)init_file_modules_task; |
|---|
| 23 | //if(tcb->entry == (void*)task_MovieRecord) tcb->entry = (void*)movie_record_task; |
|---|
| 24 | //if(tcb->entry == (void*)task_ExpDrv) tcb->entry = (void*)exp_drv_task; |
|---|
| 25 | } |
|---|
| 26 | |
|---|
| 27 | void CreateTask_spytask() { |
|---|
| 28 | |
|---|
| 29 | _CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0); |
|---|
| 30 | }; |
|---|
| 31 | |
|---|
| 32 | |
|---|
| 33 | void __attribute__((naked,noinline)) boot() { |
|---|
| 34 | |
|---|
| 35 | asm volatile ( |
|---|
| 36 | "LDR R1, =0xC0410000\n" |
|---|
| 37 | "MOV R0, #0\n" |
|---|
| 38 | "STR R0, [R1]\n" |
|---|
| 39 | "MOV R1, #0x78\n" |
|---|
| 40 | "MCR p15, 0, R1,c1,c0\n" |
|---|
| 41 | "MOV R1, #0\n" |
|---|
| 42 | "MCR p15, 0, R1,c7,c10, 4\n" |
|---|
| 43 | " loc_FFC00028:\n" |
|---|
| 44 | "MCR p15, 0, R1,c7,c5\n" |
|---|
| 45 | "MCR p15, 0, R1,c7,c6\n" |
|---|
| 46 | "MOV R0, #0x3D\n" |
|---|
| 47 | "MCR p15, 0, R0,c6,c0\n" |
|---|
| 48 | "MOV R0, #0xC000002F\n" |
|---|
| 49 | "MCR p15, 0, R0,c6,c1\n" |
|---|
| 50 | "MOV R0, #0x33\n" |
|---|
| 51 | "MCR p15, 0, R0,c6,c2\n" |
|---|
| 52 | "MOV R0, #0x40000033\n" |
|---|
| 53 | "MCR p15, 0, R0,c6,c3\n" |
|---|
| 54 | "MOV R0, #0x80000017\n" |
|---|
| 55 | "MCR p15, 0, R0,c6,c4\n" |
|---|
| 56 | "LDR R0, =0xFFC0002B\n" |
|---|
| 57 | "MCR p15, 0, R0,c6,c5\n" |
|---|
| 58 | "MOV R0, #0x34\n" |
|---|
| 59 | "MCR p15, 0, R0,c2,c0\n" |
|---|
| 60 | "MOV R0, #0x34\n" |
|---|
| 61 | "MCR p15, 0, R0,c2,c0, 1\n" |
|---|
| 62 | "MOV R0, #0x34\n" |
|---|
| 63 | "MCR p15, 0, R0,c3,c0\n" |
|---|
| 64 | "LDR R0, =0x3333330\n" |
|---|
| 65 | "MCR p15, 0, R0,c5,c0, 2\n" |
|---|
| 66 | "LDR R0, =0x3333330\n" |
|---|
| 67 | "MCR p15, 0, R0,c5,c0, 3\n" |
|---|
| 68 | "MRC p15, 0, R0,c1,c0\n" |
|---|
| 69 | "ORR R0, R0, #0x1000\n" |
|---|
| 70 | "ORR R0, R0, #4\n" |
|---|
| 71 | "ORR R0, R0, #1\n" |
|---|
| 72 | "MCR p15, 0, R0,c1,c0\n" |
|---|
| 73 | "MOV R1, #0x80000006\n" |
|---|
| 74 | "MCR p15, 0, R1,c9,c1\n" |
|---|
| 75 | "MOV R1, #6\n" |
|---|
| 76 | "MCR p15, 0, R1,c9,c1, 1\n" |
|---|
| 77 | "MRC p15, 0, R1,c1,c0\n" |
|---|
| 78 | "ORR R1, R1, #0x50000\n" |
|---|
| 79 | "MCR p15, 0, R1,c1,c0\n" |
|---|
| 80 | "LDR R2, =0xC0200000\n" |
|---|
| 81 | "MOV R1, #1\n" |
|---|
| 82 | "STR R1, [R2,#0x10C]\n" |
|---|
| 83 | "MOV R1, #0xFF\n" |
|---|
| 84 | "STR R1, [R2,#0xC]\n" |
|---|
| 85 | "STR R1, [R2,#0x1C]\n" |
|---|
| 86 | "STR R1, [R2,#0x2C]\n" |
|---|
| 87 | "STR R1, [R2,#0x3C]\n" |
|---|
| 88 | "STR R1, [R2,#0x4C]\n" |
|---|
| 89 | "STR R1, [R2,#0x5C]\n" |
|---|
| 90 | "STR R1, [R2,#0x6C]\n" |
|---|
| 91 | "STR R1, [R2,#0x7C]\n" |
|---|
| 92 | "STR R1, [R2,#0x8C]\n" |
|---|
| 93 | "STR R1, [R2,#0x9C]\n" |
|---|
| 94 | "STR R1, [R2,#0xAC]\n" |
|---|
| 95 | "STR R1, [R2,#0xBC]\n" |
|---|
| 96 | "STR R1, [R2,#0xCC]\n" |
|---|
| 97 | "STR R1, [R2,#0xDC]\n" |
|---|
| 98 | "STR R1, [R2,#0xEC]\n" |
|---|
| 99 | "STR R1, [R2,#0xFC]\n" |
|---|
| 100 | "LDR R1, =0xC0400008\n" |
|---|
| 101 | "LDR R2, =0x430005\n" |
|---|
| 102 | "STR R2, [R1]\n" |
|---|
| 103 | "MOV R1, #1\n" |
|---|
| 104 | "LDR R2, =0xC0243100\n" |
|---|
| 105 | "STR R2, [R1]\n" |
|---|
| 106 | "LDR R2, =0xC0242010\n" |
|---|
| 107 | "LDR R1, [R2]\n" |
|---|
| 108 | "ORR R1, R1, #1\n" |
|---|
| 109 | "STR R1, [R2]\n" |
|---|
| 110 | "LDR R0, =0xFFED53A0\n" |
|---|
| 111 | "LDR R1, =0x1900\n" |
|---|
| 112 | "LDR R3, =0xB1B0\n" |
|---|
| 113 | "loc_FFC0013C:\n" |
|---|
| 114 | "CMP R1, R3\n" |
|---|
| 115 | "LDRCC R2, [R0],#4\n" |
|---|
| 116 | "STRCC R2, [R1],#4\n" |
|---|
| 117 | "BCC loc_FFC0013C\n" |
|---|
| 118 | "LDR R1, =0x12ED1C\n" |
|---|
| 119 | "MOV R2, #0\n" |
|---|
| 120 | "loc_FFC00154:\n" |
|---|
| 121 | "CMP R3, R1\n" |
|---|
| 122 | "STRCC R2, [R3],#4\n" |
|---|
| 123 | "BCC loc_FFC00154\n" |
|---|
| 124 | // "B loc_FFC001A0\n" |
|---|
| 125 | "B sub_FFC001A0_my\n" |
|---|
| 126 | ); |
|---|
| 127 | }; |
|---|
| 128 | |
|---|
| 129 | |
|---|
| 130 | void __attribute__((naked,noinline)) sub_FFC001A0_my() { |
|---|
| 131 | |
|---|
| 132 | //*(int*)0x1930=(int)taskHook; |
|---|
| 133 | *(int*)0x1934=(int)taskHook; |
|---|
| 134 | *(int*)0x1938=(int)taskHook; |
|---|
| 135 | |
|---|
| 136 | *(int*)(0x2234)= (*(int*)0xC0220134)&1 ?0x200000 : 0x100000; // replacement of sub_FFC3040C for correct power-on. |
|---|
| 137 | |
|---|
| 138 | |
|---|
| 139 | asm volatile ( |
|---|
| 140 | "LDR R0, =0xFFC00218\n" |
|---|
| 141 | "MOV R1, #0 \n" |
|---|
| 142 | "LDR R3, =0xFFC00250\n" |
|---|
| 143 | "loc_FFC001AC:\n" |
|---|
| 144 | "CMP R0, R3\n" |
|---|
| 145 | "LDRCC R2, [R0],#4\n" |
|---|
| 146 | "STRCC R2, [R1],#4\n" |
|---|
| 147 | "BCC loc_FFC001AC\n" |
|---|
| 148 | "LDR R0, =0xFFC00250\n" |
|---|
| 149 | "MOV R1, #0x4B0\n" |
|---|
| 150 | "LDR R3, =0xFFC00464\n" |
|---|
| 151 | "loc_FFC001C8:\n" |
|---|
| 152 | "CMP R0, R3\n" |
|---|
| 153 | "LDRCC R2, [R0],#4\n" |
|---|
| 154 | "STRCC R2, [R1],#4\n" |
|---|
| 155 | "BCC loc_FFC001C8\n" |
|---|
| 156 | "MOV R0, #0xD2\n" |
|---|
| 157 | "MSR CPSR_cxsf, R0\n" |
|---|
| 158 | "MOV SP, #0x1000\n" |
|---|
| 159 | "MOV R0, #0xD3\n" |
|---|
| 160 | "MSR CPSR_cxsf, R0\n" |
|---|
| 161 | "MOV SP, #0x1000\n" |
|---|
| 162 | "LDR R0, =0x6C4\n" |
|---|
| 163 | "LDR R2, =0xEEEEEEEE\n" |
|---|
| 164 | "MOV R3, #0x1000\n" |
|---|
| 165 | "loc_FFC001FC:\n" |
|---|
| 166 | "CMP R0, R3\n" |
|---|
| 167 | "STRCC R2, [R0],#4\n" |
|---|
| 168 | "BCC loc_FFC001FC\n" |
|---|
| 169 | // "BL sub_FFC00FC4\n" |
|---|
| 170 | "BL sub_FFC00FC4_my\n" //--------> |
|---|
| 171 | ); |
|---|
| 172 | } |
|---|
| 173 | //----------------------------------------------------------------------------------------------------------------------------------to doing |
|---|
| 174 | void __attribute__((naked,noinline)) sub_FFC00FC4_my() { |
|---|
| 175 | |
|---|
| 176 | asm volatile ( |
|---|
| 177 | "STR LR, [SP,#-4]!\n" |
|---|
| 178 | "SUB SP, SP, #0x74\n" |
|---|
| 179 | "MOV R0, SP\n" |
|---|
| 180 | "MOV R1, #0x74\n" |
|---|
| 181 | "BL sub_FFE6C5B0\n" |
|---|
| 182 | "MOV R0, #0x53000\n" |
|---|
| 183 | "STR R0, [SP,#4]\n" |
|---|
| 184 | // "LDR R0, =0x12ED1C\n" |
|---|
| 185 | // Replacement |
|---|
| 186 | "LDR R0, =new_sa\n" |
|---|
| 187 | "LDR R0, [R0]\n" |
|---|
| 188 | |
|---|
| 189 | "LDR R2, =0x2F9C00\n" |
|---|
| 190 | "LDR R1, =0x2F24A8\n" |
|---|
| 191 | "STR R0, [SP,#8]\n" |
|---|
| 192 | "SUB R0, R1, R0\n" |
|---|
| 193 | "ADD R3, SP, #0xC\n" |
|---|
| 194 | "STR R2, [SP]\n" |
|---|
| 195 | "STMIA R3, {R0-R2}\n" |
|---|
| 196 | "MOV R0, #0x22\n" |
|---|
| 197 | "STR R0, [SP,#0x18]\n" |
|---|
| 198 | "MOV R0, #0x68\n" |
|---|
| 199 | "STR R0, [SP,#0x1C]\n" |
|---|
| 200 | "LDR R0, =0x19B\n" |
|---|
| 201 | // "LDR R1, =sub_FFC04D38\n" |
|---|
| 202 | "LDR R1, =sub_FFC04D38_my\n" //---------> |
|---|
| 203 | |
|---|
| 204 | "B sub_FFC01018 \n" // continue in firmware |
|---|
| 205 | ); |
|---|
| 206 | } |
|---|
| 207 | |
|---|
| 208 | //ÐèÒªÐÞ¸Ä |
|---|
| 209 | void __attribute__((naked,noinline)) sub_FFC04D38_my() { |
|---|
| 210 | |
|---|
| 211 | asm volatile ( |
|---|
| 212 | "STMFD SP!, {R4,LR}\n" |
|---|
| 213 | "BL sub_FFC00954\n" |
|---|
| 214 | "BL sub_FFC090B4\n" |
|---|
| 215 | "CMP R0, #0\n" |
|---|
| 216 | // "ADRLT R0, sub_FFC04E4C\n" // ; "dmSetup"\n" |
|---|
| 217 | "LDRLT R0,=0xFFC04E4C\n" |
|---|
| 218 | "BLLT sub_FFC04E2C\n" |
|---|
| 219 | "BL sub_FFC04974\n" |
|---|
| 220 | "CMP R0, #0\n" |
|---|
| 221 | // "ADRLT R0, sub_FFC04E54\n"// ; "termDriverInit"\n" |
|---|
| 222 | "LDRLT R0,=0xFFC04E54\n" |
|---|
| 223 | "BLLT sub_FFC04E2\n" |
|---|
| 224 | // "ADR R0, sub_FFC04E64\n" //; "/_term" |
|---|
| 225 | "LDR R0,=0xFFC04E64\n" |
|---|
| 226 | "BL sub_FFC04A5C\n" |
|---|
| 227 | "CMP R0, #0\n" |
|---|
| 228 | // "ADRLT R0, sub_FFC04E6C \n"//; "termDeviceCreate" |
|---|
| 229 | "LDRLT R0,=0xFFC04E6C\n" |
|---|
| 230 | "BLLT sub_FFC04E2C\n" |
|---|
| 231 | // "ADR R0, sub_FFC04E64 \n" // ; "/_term" |
|---|
| 232 | "LDR R0,=0xFFC04E64 \n" |
|---|
| 233 | "BL sub_FFC03578\n" |
|---|
| 234 | "CMP R0, #0\n" |
|---|
| 235 | // "ADRLT R0, sub_FFC04E80\n" //; "stdioSetup" |
|---|
| 236 | "LDRLT R0,=0xFFC04E80\n" |
|---|
| 237 | "BLLT sub_FFC04E2C\n" |
|---|
| 238 | "BL sub_FFC08BCC\n" |
|---|
| 239 | "CMP R0, #0\n" |
|---|
| 240 | // "ADRLT R0, sub_FFC04E8C\n" //; "stdlibSetup" |
|---|
| 241 | "LDRLT R0,=0xFFC04E8C\n" |
|---|
| 242 | "BLLT sub_FFC04E2C\n" |
|---|
| 243 | "BL sub_FFC014A8\n" |
|---|
| 244 | "CMP R0, #0\n" |
|---|
| 245 | // "ADRLT R0, sub_FFC04E98\n" //; "armlib_setup" |
|---|
| 246 | "LDRLT R0,=0xFFC04E98\n" |
|---|
| 247 | "BLLT sub_FFC04E2C\n" |
|---|
| 248 | "LDMFD SP!, {R4,LR}\n" |
|---|
| 249 | // "B taskcreate_Startup\n" |
|---|
| 250 | "B taskcreate_Startup_my\n" //--------> |
|---|
| 251 | |
|---|
| 252 | ); |
|---|
| 253 | }; |
|---|
| 254 | |
|---|
| 255 | void __attribute__((naked,noinline)) taskcreate_Startup_my() { |
|---|
| 256 | |
|---|
| 257 | asm volatile ( |
|---|
| 258 | "STMFD SP!, {R3,LR}\n" |
|---|
| 259 | // "BL j_nullsub_178\n" |
|---|
| 260 | "BL sub_FFC18680\n" |
|---|
| 261 | "CMP R0, #0\n" |
|---|
| 262 | "BNE loc_FFC0C29C\n" |
|---|
| 263 | "BL sub_FFC117B0\n" |
|---|
| 264 | "CMP R0, #0\n" |
|---|
| 265 | "BNE loc_FFC0C29C\n" |
|---|
| 266 | "BL sub_FFC10E84\n" |
|---|
| 267 | "LDR R1, =0xC0220000\n" |
|---|
| 268 | "MOV R0, #0x44\n" |
|---|
| 269 | "STR R0, [R1,#0x84]\n" |
|---|
| 270 | "STR R0, [R1,#0x80]\n" |
|---|
| 271 | "BL sub_FFC11074\n" |
|---|
| 272 | "loc_FFC0C298:\n" |
|---|
| 273 | "B loc_FFC0C298\n" |
|---|
| 274 | "loc_FFC0C29C:\n" |
|---|
| 275 | // "BL sub_FFC117BC\n" // removed for correct power-on on 'on/off' button. |
|---|
| 276 | // "BL j_nullsub_179\n" |
|---|
| 277 | "BL sub_FFC1693C\n" |
|---|
| 278 | "LDR R1, =0x34E000\n" |
|---|
| 279 | "MOV R0, #0\n" |
|---|
| 280 | "BL sub_FFC16D84\n" |
|---|
| 281 | "BL sub_FFC16B30\n" |
|---|
| 282 | "MOV R3, #0\n" |
|---|
| 283 | "STR R3, [SP]\n" |
|---|
| 284 | // "ADR R3, task_Startup\n" |
|---|
| 285 | "LDR R3, =task_Startup_my\n" //--------> |
|---|
| 286 | "MOV R2, #0\n" |
|---|
| 287 | "MOV R1, #0x19\n" |
|---|
| 288 | // "ADR R0, aStartup\n" ; "Startup" |
|---|
| 289 | "LDR R0,=0xFFC0C2E4\n" |
|---|
| 290 | "BL sub_FFC0AFAC\n" |
|---|
| 291 | "MOV R0, #0\n" |
|---|
| 292 | "LDMFD SP!, {R12,PC}\n" |
|---|
| 293 | ); |
|---|
| 294 | } |
|---|
| 295 | |
|---|
| 296 | void __attribute__((naked,noinline)) task_Startup_my() { |
|---|
| 297 | |
|---|
| 298 | asm volatile ( |
|---|
| 299 | "STMFD SP!, {R4,LR}\n" |
|---|
| 300 | "BL sub_FFC05394\n" |
|---|
| 301 | "BL sub_FFC128A0\n" |
|---|
| 302 | "BL sub_FFC10B28\n" |
|---|
| 303 | // "BL j_nullsub_182\n" |
|---|
| 304 | "BL sub_FFC188A4\n" |
|---|
| 305 | // "BL sub_FFC18754\n" // //start diskboot.bin, //StartDiskboot --> removed |
|---|
| 306 | "BL sub_FFC18A40\n" |
|---|
| 307 | "BL sub_FFC0FB94\n" |
|---|
| 308 | "BL sub_FFC188D4\n" |
|---|
| 309 | "BL sub_FFC15F3C\n" |
|---|
| 310 | "BL sub_FFC18A44\n" |
|---|
| 311 | "BL CreateTask_spytask\n" // <--- function added |
|---|
| 312 | "BL sub_FFC116B0\n" //taskcreate_PhySw |
|---|
| 313 | "BL sub_FFC146BC\n" |
|---|
| 314 | "BL sub_FFC18A5C\n" |
|---|
| 315 | // "BL nullsub_2\n" |
|---|
| 316 | "BL sub_FFC104B0\n" |
|---|
| 317 | "BL sub_FFC18464\n" |
|---|
| 318 | "BL sub_FFC10AD8\n" |
|---|
| 319 | "BL sub_FFC103D4\n" |
|---|
| 320 | "BL sub_FFC0FBC8\n" |
|---|
| 321 | "BL sub_FFC194A4\n" |
|---|
| 322 | "BL sub_FFC103AC\n" |
|---|
| 323 | "LDMFD SP!, {R4,LR}\n" |
|---|
| 324 | "B sub_FFC054B4\n" |
|---|
| 325 | ); |
|---|
| 326 | } |
|---|
| 327 | |
|---|
| 328 | /*******************************************************************/ |
|---|
| 329 | |
|---|
| 330 | void __attribute__((naked,noinline)) init_file_modules_task() { |
|---|
| 331 | asm volatile( |
|---|
| 332 | "STMFD SP!, {R4-R6,LR}\n" |
|---|
| 333 | "BL sub_FFC59C9C\n" |
|---|
| 334 | "LDR R5, =0x5006\n" |
|---|
| 335 | "MOVS R4, R0\n" |
|---|
| 336 | "MOVNE R1, #0\n" |
|---|
| 337 | "MOVNE R0, R5\n" |
|---|
| 338 | "BLNE sub_FFC5C35C\n" |
|---|
| 339 | "BL sub_FFC59CC8_my\n" //-------------> |
|---|
| 340 | // "BL sub_FFC59CC8\n" |
|---|
| 341 | "BL core_spytask_can_start\n" // + set "it's safe to start" flag for spytask |
|---|
| 342 | "CMP R4, #0\n" |
|---|
| 343 | "MOVEQ R0, R5\n" |
|---|
| 344 | "LDMEQFD SP!, {R4-R6,LR}\n" |
|---|
| 345 | "MOVEQ R1, #0\n" |
|---|
| 346 | "BEQ sub_FFC5C35C\n" |
|---|
| 347 | "LDMFD SP!, {R4-R6,PC}\n" |
|---|
| 348 | ); |
|---|
| 349 | } |
|---|
| 350 | |
|---|
| 351 | void __attribute__((naked,noinline)) sub_FFC59CC8_my() { |
|---|
| 352 | |
|---|
| 353 | asm volatile( |
|---|
| 354 | "STMFD SP!, {R4,LR}\n" |
|---|
| 355 | "MOV R0, #3\n" |
|---|
| 356 | //"BL sub_FFC3E9BC\n" |
|---|
| 357 | "BL sub_FFC3E9BC_my\n" //----------> |
|---|
| 358 | // "BL nullsub_64\n" |
|---|
| 359 | "LDR R4, =0x2B70\n" |
|---|
| 360 | "LDR R0, [R4,#4]\n" |
|---|
| 361 | "CMP R0, #0\n" |
|---|
| 362 | "BNE loc_FFC59D00\n" |
|---|
| 363 | "BL sub_FFC3DD80\n" |
|---|
| 364 | "BL sub_FFCCF594\n" |
|---|
| 365 | "BL sub_FFC3DD80\n" |
|---|
| 366 | "BL sub_FFC3A1E4\n" |
|---|
| 367 | "BL sub_FFC3DC80\n" |
|---|
| 368 | "BL sub_FFCCF658\n" |
|---|
| 369 | "loc_FFC59D00:\n" // ; CODE XREF: sub_FFC59CC8+1C |
|---|
| 370 | "MOV R0, #1\n" |
|---|
| 371 | "STR R0, [R4]\n" |
|---|
| 372 | "LDMFD SP!, {R4,PC}\n" |
|---|
| 373 | |
|---|
| 374 | ); |
|---|
| 375 | } |
|---|
| 376 | |
|---|
| 377 | |
|---|
| 378 | void __attribute__((naked,noinline)) sub_FFC3E9BC_my() { |
|---|
| 379 | asm volatile( |
|---|
| 380 | "STMFD SP!, {R4-R8,LR}\n" |
|---|
| 381 | "MOV R6, R0\n" |
|---|
| 382 | "BL sub_FFC3E924\n" |
|---|
| 383 | "LDR R1, =0xE5D8\n" |
|---|
| 384 | "MOV R5, R0\n" |
|---|
| 385 | "ADD R4, R1, R0,LSL#7\n" |
|---|
| 386 | "LDR R0, [R4,#0x70]\n" |
|---|
| 387 | "CMP R0, #4\n" |
|---|
| 388 | "LDREQ R1, =0x6D8\n" |
|---|
| 389 | // "ADREQ R0, aMounter_c\n"// ; "Mounter.c" |
|---|
| 390 | "LDREQ R0,=0xFFC3E448\n" |
|---|
| 391 | "BLEQ sub_FFC0B284\n" |
|---|
| 392 | "MOV R1, R6\n" |
|---|
| 393 | "MOV R0, R5\n" |
|---|
| 394 | "BL sub_FFC3E390\n" |
|---|
| 395 | "LDR R0, [R4,#0x38]\n" |
|---|
| 396 | "BL sub_FFC3EEE8\n" |
|---|
| 397 | "CMP R0, #0\n" |
|---|
| 398 | "STREQ R0, [R4,#0x70]\n" |
|---|
| 399 | "MOV R0, R5\n" |
|---|
| 400 | "BL sub_FFC3E468\n" |
|---|
| 401 | "MOV R0, R5\n" |
|---|
| 402 | // "BL sub_FFC3E75C\n" |
|---|
| 403 | "BL sub_FFC3E75C_my\n" //---------> |
|---|
| 404 | |
|---|
| 405 | "B sub_FFC3EA14 \n" // continue in firmware |
|---|
| 406 | ); |
|---|
| 407 | } |
|---|
| 408 | |
|---|
| 409 | void __attribute__((naked,noinline)) sub_FFC3E75C_my() { |
|---|
| 410 | asm volatile( |
|---|
| 411 | "STMFD SP!, {R4-R6,LR}\n" |
|---|
| 412 | "MOV R5, R0\n" |
|---|
| 413 | "LDR R0, =0xE5D8\n" |
|---|
| 414 | "ADD R4, R0, R5,LSL#7\n" |
|---|
| 415 | "LDR R0, [R4,#0x70]\n" |
|---|
| 416 | "TST R0, #2\n" |
|---|
| 417 | "MOVNE R0, #1\n" |
|---|
| 418 | "LDMNEFD SP!, {R4-R6,PC}\n" |
|---|
| 419 | "LDR R0, [R4,#0x38]\n" |
|---|
| 420 | "MOV R1, R5\n" |
|---|
| 421 | // "BL sub_FFC3E4EC\n" |
|---|
| 422 | "BL sub_FFC3E4EC_my\n" //---------> |
|---|
| 423 | |
|---|
| 424 | "B sub_FFC3E788 \n" // Continue in firmware |
|---|
| 425 | ); |
|---|
| 426 | } |
|---|
| 427 | |
|---|
| 428 | void __attribute__((naked,noinline)) sub_FFC3E4EC_my() { |
|---|
| 429 | asm volatile( |
|---|
| 430 | "STMFD SP!, {R4-R8,LR}\n" |
|---|
| 431 | "MOV R8, R0\n" |
|---|
| 432 | "LDR R0, =0xE5D8\n" |
|---|
| 433 | "MOV R7, #0\n" |
|---|
| 434 | "ADD R5, R0, R1,LSL#7\n" |
|---|
| 435 | "LDR R0, [R5,#0x3C]\n" |
|---|
| 436 | "MOV R6, #0\n" |
|---|
| 437 | "CMP R0, #7\n" |
|---|
| 438 | "ADDLS PC, PC, R0,LSL#2\n" |
|---|
| 439 | "B loc_FFC3E63C\n" |
|---|
| 440 | "loc_FFC3E514:\n" |
|---|
| 441 | "B loc_FFC3E54C\n" |
|---|
| 442 | "loc_FFC3E518:\n" |
|---|
| 443 | "B loc_FFC3E534\n" |
|---|
| 444 | "loc_FFC3E51C:\n" |
|---|
| 445 | "B loc_FFC3E534\n" |
|---|
| 446 | "loc_FFC3E520:\n" |
|---|
| 447 | "B loc_FFC3E534\n" |
|---|
| 448 | "loc_FFC3E524:\n" |
|---|
| 449 | "B loc_FFC3E534\n" |
|---|
| 450 | "loc_FFC3E528:\n" |
|---|
| 451 | "B loc_FFC3E634\n" |
|---|
| 452 | "loc_FFC3E52C:\n" |
|---|
| 453 | "B loc_FFC3E534\n" |
|---|
| 454 | "loc_FFC3E530:\n" |
|---|
| 455 | "B loc_FFC3E534\n" |
|---|
| 456 | "loc_FFC3E534:\n" |
|---|
| 457 | "MOV R2, #0\n" |
|---|
| 458 | "MOV R1, #0x200\n" |
|---|
| 459 | "MOV R0, #2\n" |
|---|
| 460 | "BL sub_FFC53D0C\n" |
|---|
| 461 | "MOVS R4, R0\n" |
|---|
| 462 | "BNE loc_FFC3E554\n" |
|---|
| 463 | "loc_FFC3E54C:\n" |
|---|
| 464 | "MOV R0, #0\n" |
|---|
| 465 | "LDMFD SP!, {R4-R8,PC}\n" |
|---|
| 466 | "loc_FFC3E554:\n" |
|---|
| 467 | "LDR R12, [R5,#0x4C]\n" |
|---|
| 468 | "MOV R3, R4\n" |
|---|
| 469 | "MOV R2, #1\n" |
|---|
| 470 | "MOV R1, #0\n" |
|---|
| 471 | "MOV R0, R8\n" |
|---|
| 472 | "BLX R12\n" |
|---|
| 473 | "CMP R0, #1\n" |
|---|
| 474 | "BNE loc_FFC3E580\n" |
|---|
| 475 | "MOV R0, #2\n" |
|---|
| 476 | "BL sub_FFC53E58\n" |
|---|
| 477 | "B loc_FFC3E54C\n" |
|---|
| 478 | "loc_FFC3E580:\n" |
|---|
| 479 | "LDR R1, [R5,#0x68]\n" |
|---|
| 480 | "MOV R0, R8\n" |
|---|
| 481 | "BLX R1\n" |
|---|
| 482 | |
|---|
| 483 | "MOV R1, R4\n" // + pointer to MBR in R1 |
|---|
| 484 | "BL mbr_read_dryos\n" // + total sectors count in R0 before and after call ÐèÒªÐÞ¸Ä |
|---|
| 485 | |
|---|
| 486 | // Start of DataGhost's FAT32 autodetection code |
|---|
| 487 | // Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage |
|---|
| 488 | // According to the code below, we can use R1, R2, R3 and R12. |
|---|
| 489 | // LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing |
|---|
| 490 | // that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :) |
|---|
| 491 | "MOV R12, R4\n" // Copy the MBR start address so we have something to work with |
|---|
| 492 | "MOV LR, R4\n" // Save old offset for MBR signature |
|---|
| 493 | "MOV R1, #1\n" // Note the current partition number |
|---|
| 494 | "B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet! |
|---|
| 495 | "dg_sd_fat32:\n" |
|---|
| 496 | "CMP R1, #4\n" // Did we already see the 4th partition? |
|---|
| 497 | "BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything. |
|---|
| 498 | "ADD R12, R12, #0x10\n" // Second partition |
|---|
| 499 | "ADD R1, R1, #1\n" // Second partition for the loop |
|---|
| 500 | "dg_sd_fat32_enter:\n" |
|---|
| 501 | "LDRB R2, [R12, #0x1BE]\n" // Partition status |
|---|
| 502 | "LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB) |
|---|
| 503 | "CMP R3, #0xB\n" // Is this a FAT32 partition? |
|---|
| 504 | "CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then? |
|---|
| 505 | "BNE dg_sd_fat32\n" // No, it isn't. Loop again. |
|---|
| 506 | "CMP R2, #0x00\n" // It is, check the validity of the partition type |
|---|
| 507 | "CMPNE R2, #0x80\n" |
|---|
| 508 | "BNE dg_sd_fat32\n" // Invalid, go to next partition |
|---|
| 509 | // This partition is valid, it's the first one, bingo! |
|---|
| 510 | "MOV R4, R12\n" // Move the new MBR offset for the partition detection. |
|---|
| 511 | |
|---|
| 512 | "dg_sd_fat32_end:\n" |
|---|
| 513 | // End of DataGhost's FAT32 autodetection code |
|---|
| 514 | |
|---|
| 515 | "LDRB R1, [R4,#0x1C9]\n" |
|---|
| 516 | "LDRB R3, [R4,#0x1C8]\n" |
|---|
| 517 | "LDRB R12, [R4,#0x1CC]\n" |
|---|
| 518 | "MOV R1, R1,LSL#24\n" |
|---|
| 519 | "ORR R1, R1, R3,LSL#16\n" |
|---|
| 520 | "LDRB R3, [R4,#0x1C7]\n" |
|---|
| 521 | "LDRB R2, [R4,#0x1BE]\n" |
|---|
| 522 | // "LDRB LR, [R4,#0x1FF]\n" |
|---|
| 523 | "ORR R1, R1, R3,LSL#8\n" |
|---|
| 524 | "LDRB R3, [R4,#0x1C6]\n" |
|---|
| 525 | "CMP R2, #0\n" |
|---|
| 526 | "CMPNE R2, #0x80\n" |
|---|
| 527 | "ORR R1, R1, R3\n" |
|---|
| 528 | "LDRB R3, [R4,#0x1CD]\n" |
|---|
| 529 | "MOV R3, R3,LSL#24\n" |
|---|
| 530 | "ORR R3, R3, R12,LSL#16\n" |
|---|
| 531 | "LDRB R12, [R4,#0x1CB]\n" |
|---|
| 532 | "ORR R3, R3, R12,LSL#8\n" |
|---|
| 533 | "LDRB R12, [R4,#0x1CA]\n" |
|---|
| 534 | "ORR R3, R3, R12\n" |
|---|
| 535 | // "LDRB R12, [R4,#0x1FE]\n" |
|---|
| 536 | "LDRB R12, [LR,#0x1FE]\n" // + First MBR signature byte (0x55), LR is original offset. |
|---|
| 537 | "LDRB LR, [LR,#0x1FF]\n" // + Last MBR signature byte (0xAA), LR is original offset. |
|---|
| 538 | "MOV R4, #0\n" |
|---|
| 539 | "BNE loc_FFC3E60C\n" |
|---|
| 540 | "CMP R0, R1\n" |
|---|
| 541 | "BCC loc_FFC3E60C\n" |
|---|
| 542 | "ADD R2, R1, R3\n" |
|---|
| 543 | "CMP R2, R0\n" |
|---|
| 544 | "CMPLS R12, #0x55\n" |
|---|
| 545 | "CMPEQ LR, #0xAA\n" |
|---|
| 546 | "MOVEQ R7, R1\n" |
|---|
| 547 | "MOVEQ R6, R3\n" |
|---|
| 548 | "MOVEQ R4, #1\n" |
|---|
| 549 | "loc_FFC3E60C:\n" |
|---|
| 550 | "MOV R0, #2\n" |
|---|
| 551 | "BL sub_FFC53E58\n" |
|---|
| 552 | "CMP R4, #0\n" |
|---|
| 553 | "BNE loc_FFC3E648\n" |
|---|
| 554 | "LDR R1, [R5,#0x68]\n" |
|---|
| 555 | "MOV R7, #0\n" |
|---|
| 556 | "MOV R0, R8\n" |
|---|
| 557 | "BLX R1\n" |
|---|
| 558 | "MOV R6, R0\n" |
|---|
| 559 | "B loc_FFC3E648\n" |
|---|
| 560 | "loc_FFC3E634:\n" |
|---|
| 561 | "MOV R6, #0x40\n" |
|---|
| 562 | "B loc_FFC3E648\n" |
|---|
| 563 | "loc_FFC3E63C:\n" |
|---|
| 564 | "LDR R1, =0x5C9\n" |
|---|
| 565 | // "ADR R0, aMounter_c\n" ; "Mounter.c" |
|---|
| 566 | "LDR R0,=0xFFC3E448\n" |
|---|
| 567 | "BL sub_FFC0B284\n" |
|---|
| 568 | "loc_FFC3E648:\n" |
|---|
| 569 | "STR R7, [R5,#0x44]!\n" |
|---|
| 570 | "MOV R0, #1\n" |
|---|
| 571 | "STR R6, [R5,#4]\n" |
|---|
| 572 | "LDMFD SP!, {R4-R8,PC}\n" |
|---|
| 573 | ); |
|---|
| 574 | } |
|---|
| 575 | |
|---|
| 576 | |
|---|
| 577 | |
|---|
