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boot.c @ 2792

Revision 888, 30.8 KB checked in by reyalp, 3 years ago (diff)
add s90 from err99 in 3 posts starting at http://chdk.setepontos.com/index.php/topic,650.msg49290.html#msg49290
Property svn:eol-style set to `native`

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4	#include "stdlib.h"
5
6
7	const char * const new_sa = &_end;
8
9
10	// Forward declarations
11	void CreateTask_PhySw();
12	void CreateTask_spytask();
13	extern volatile int jogdial_stopped;
14	void JogDial_task_my(void);
15
16	void taskCreateHook(int *p) {
17	p-=17;
18	if (p[0]==0xFF87A208) p[0]=(int)capt_seq_task;
19	if (p[0]==0xFF96172C) p[0]=(int)movie_record_task;
20	if (p[0]==0xFF8982E8) p[0]=(int)init_file_modules_task;
21	if (p[0]==0xFF8C0E54) p[0]=(int)exp_drv_task;
22	if (p[0]==0xFF85E508) p[0]=(int)JogDial_task_my;
23	}
24
25	void taskCreateHook2(int *p) {
26	p-=17;
27	if (p[0]==0xFF8982E8) p[0]=(int)init_file_modules_task;
28	if (p[0]==0xFF8C0E54) p[0]=(int)exp_drv_task;
29	}
30
31	void __attribute__((naked,noinline)) boot() {
32	asm volatile (
33	"LDR R1, =0xC0410000\n"
34	"MOV R0, #0\n"
35	"STR R0, [R1]\n"
36	"MOV R1, #0x78\n"
37	"MCR p15, 0, R1,c1,c0\n"
38	"MOV R1, #0\n"
39	"MCR p15, 0, R1,c7,c10, 4\n"
40	"MCR p15, 0, R1,c7,c5\n"
41	"MCR p15, 0, R1,c7,c6\n"
42	"MOV R0, #0x3D\n"
43	"MCR p15, 0, R0,c6,c0\n"
44	"MOV R0, #0xC000002F\n"
45	"MCR p15, 0, R0,c6,c1\n"
46	"MOV R0, #0x33\n"
47	"MCR p15, 0, R0,c6,c2\n"
48	"MOV R0, #0x40000033\n"
49	"MCR p15, 0, R0,c6,c3\n"
50	"MOV R0, #0x80000017\n"
51	"MCR p15, 0, R0,c6,c4\n"
52	"LDR R0, =0xFF80002D\n"
53	"MCR p15, 0, R0,c6,c5\n"
54	"MOV R0, #0x34\n"
55	"MCR p15, 0, R0,c2,c0\n"
56	"MOV R0, #0x34\n"
57	"MCR p15, 0, R0,c2,c0, 1\n"
58	"MOV R0, #0x34\n"
59	"MCR p15, 0, R0,c3,c0\n"
60	"LDR R0, =0x3333330\n"
61	"MCR p15, 0, R0,c5,c0, 2\n"
62	"LDR R0, =0x3333330\n"
63	"MCR p15, 0, R0,c5,c0, 3\n"
64	"MRC p15, 0, R0,c1,c0\n"
65	"ORR R0, R0, #0x1000\n"
66	"ORR R0, R0, #4\n"
67	"ORR R0, R0, #1\n"
68	"MCR p15, 0, R0,c1,c0\n"
69	"MOV R1, #0x80000006\n"
70	"MCR p15, 0, R1,c9,c1\n"
71	"MOV R1, #6\n"
72	"MCR p15, 0, R1,c9,c1, 1\n"
73	"MRC p15, 0, R1,c1,c0\n"
74	"ORR R1, R1, #0x50000\n"
75	"MCR p15, 0, R1,c1,c0\n"
76	"LDR R2, =0xC0200000\n"
77	"MOV R1, #1\n"
78	"STR R1, [R2,#0x10C]\n"
79	"MOV R1, #0xFF\n"
80	"STR R1, [R2,#0xC]\n"
81	"STR R1, [R2,#0x1C]\n"
82	"STR R1, [R2,#0x2C]\n"
83	"STR R1, [R2,#0x3C]\n"
84	"STR R1, [R2,#0x4C]\n"
85	"STR R1, [R2,#0x5C]\n"
86	"STR R1, [R2,#0x6C]\n"
87	"STR R1, [R2,#0x7C]\n"
88	"STR R1, [R2,#0x8C]\n"
89	"STR R1, [R2,#0x9C]\n"
90	"STR R1, [R2,#0xAC]\n"
91	"STR R1, [R2,#0xBC]\n"
92	"STR R1, [R2,#0xCC]\n"
93	"STR R1, [R2,#0xDC]\n"
94	"STR R1, [R2,#0xEC]\n"
95	"STR R1, [R2,#0xFC]\n"
96	"LDR R1, =0xC0400008\n"
97	"LDR R2, =0x430005\n"
98	"STR R2, [R1]\n"
99	"MOV R1, #1\n"
100	"LDR R2, =0xC0243100\n"
101	"STR R2, [R1]\n"
102	"LDR R2, =0xC0242010\n"
103	"LDR R1, [R2]\n"
104	"ORR R1, R1, #1\n"
105	"STR R1, [R2]\n"
106	"LDR R0, =0xFFC14C88\n" //"dated already"
107	"LDR R1, =0x1900\n" // MEMBASEADDR=0x1900
108	"LDR R3, =0xF470\n"
109
110	"loc_FF81013C:\n"
111	"CMP R1, R3\n"
112	"LDRCC R2, [R0],#4\n"
113	"STRCC R2, [R1],#4\n"
114	"BCC loc_FF81013C\n"
115	"LDR R1, =0x141DBC\n" // MEMISOSTART=0x141DBC
116	"MOV R2, #0\n"
117
118	"loc_FF810154:\n"
119	"CMP R3, R1\n"
120	"STRCC R2, [R3],#4\n"
121	"BCC loc_FF810154\n"
122	// "B loc_FF810354\n"
123	"B sub_FF810354_my\n" // ---------------->
124	);
125	};
126
127	void __attribute__((naked,noinline)) sub_FF810354_my() {
128
129	(int)0x1930=(int)taskCreateHook;
130	(int)0x1934=(int)taskCreateHook2;
131	(int)0x1938=(int)taskCreateHook;
132
133	/* Power ON/OFF detection */
134	(int)(0x254C)= ((int)0xC0220128)&1 ? 0x2000000 : 0x1000000; // replacement for correct power-on.
135
136	asm volatile (
137	"LDR R0, =0xFF8103CC\n"
138	"MOV R1, #0\n"
139	"LDR R3, =0xFF810404\n"
140
141	"loc_FF810360:\n"
142	"CMP R0, R3\n"
143	"LDRCC R2, [R0],#4\n"
144	"STRCC R2, [R1],#4\n"
145	"BCC loc_FF810360\n"
146	"LDR R0, =0xFF810404\n"
147	"MOV R1, #0x4B0\n"
148	"LDR R3, =0xFF810618\n"
149
150	"loc_FF81037C:\n"
151	"CMP R0, R3\n"
152	"LDRCC R2, [R0],#4\n"
153	"STRCC R2, [R1],#4\n"
154	"BCC loc_FF81037C\n"
155	"MOV R0, #0xD2\n"
156	"MSR CPSR_cxsf, R0\n"
157	"MOV SP, #0x1000\n"
158	"MOV R0, #0xD3\n"
159	"MSR CPSR_cxsf, R0\n"
160	"MOV SP, #0x1000\n"
161	"LDR R0, =0x6C4\n"
162	"LDR R2, =0xEEEEEEEE\n"
163	"MOV R3, #0x1000\n"
164
165	"loc_FF8103B0:\n"
166	"CMP R0, R3\n"
167	"STRCC R2, [R0],#4\n"
168	"BCC loc_FF8103B0\n"
169	//"BL sub_FF811178\n"
170	"BL sub_FF811178_my\n" // ------------->
171
172	"loc_FF8103C0:\n"
173	"ANDEQ R0, R0, R4,ASR#13\n"
174
175	"loc_FF8103C4:\n"
176	"ANDEQ R0, R0, R0,ROR R6\n"
177
178	"loc_FF8103C8:\n"
179	"ANDEQ R0, R0, R4,ROR R6\n"
180	"NOP\n"
181	"LDR PC, =0xFF810618\n"
182	);
183	};
184
185
186	void __attribute__((naked,noinline)) sub_FF811178_my() {
187	asm volatile (
188	"STR LR, [SP,#-4]!\n"
189	"SUB SP, SP, #0x74\n"
190	"MOV R0, SP\n"
191	"MOV R1, #0x74\n"
192	"BL sub_FFB34E24\n"
193	"MOV R0, #0x53000\n"
194	"STR R0, [SP,#4]\n"
195	//"LDR R0, =0x141DBC\n"
196	"LDR R0, =new_sa\n" // +
197	"LDR R0, [R0]\n" // +
198	"LDR R2, =0x379C00\n"
199	"LDR R1, =0x3724A8\n"
200	"STR R0, [SP,#8]\n"
201	"SUB R0, R1, R0\n"
202	"ADD R3, SP, #0xC\n"
203	"STR R2, [SP]\n"
204	"STMIA R3, {R0-R2}\n"
205	"MOV R0, #0x22\n"
206	"STR R0, [SP,#0x18]\n"
207	"MOV R0, #0x68\n"
208	"STR R0, [SP,#0x1C]\n"
209	"LDR R0, =0x19B\n"
210	//"LDR R1, =sub_FF815E34\n"
211	"LDR R1, =sub_FF815E34_my\n"
212	"STR R0, [SP,#0x20]\n"
213	"MOV R0, #0x96\n"
214	"STR R0, [SP,#0x24]\n"
215	"MOV R0, #0x78\n"
216	"STR R0, [SP,#0x28]\n"
217	"MOV R0, #0x64\n"
218	"STR R0, [SP,#0x2C]\n"
219	"MOV R0, #0\n"
220	"STR R0, [SP,#0x30]\n"
221	"STR R0, [SP,#0x34]\n"
222	"MOV R0, #0x10\n"
223	"STR R0, [SP,#0x5C]\n"
224	"MOV R0, #0x800\n"
225	"STR R0, [SP,#0x60]\n"
226	"MOV R0, #0xA0\n"
227	"STR R0, [SP,#0x64]\n"
228	"MOV R0, #0x280\n"
229	"STR R0, [SP,#0x68]\n"
230	"MOV R0, SP\n"
231	"MOV R2, #0\n"
232	"BL sub_FF8133E4\n"
233	"ADD SP, SP, #0x74\n"
234	"LDR PC, [SP],#4\n"
235	);
236	};
237
238	void __attribute__((naked,noinline)) sub_FF815E34_my() {
239	asm volatile (
240	"STMFD SP!, {R4,LR}\n"
241	"BL sub_FF810B08\n"
242	"BL sub_FF81A148\n"
243	"CMP R0, #0\n"
244	//"ADRLT R0, 0xFF815F48\n"
245	"LDRLT R0, =0xFF815F48\n"
246	"BLLT sub_FF815F28\n"
247	"BL sub_FF815A70\n"
248	"CMP R0, #0\n"
249	//"ADRLT R0, 0xFF815F50\n"
250	"LDRLT R0, =0xFF815F50\n"
251	"BLLT sub_FF815F28\n"
252	//"ADR R0, 0xFF815F60\n"
253	"LDR R0, =0xFF815F60\n"
254	"BL sub_FF815B58\n"
255	"CMP R0, #0\n"
256	//"ADRLT R0, 0xFF815F68\n"
257	"LDRLT R0, =0xFF815F68\n"
258	"BLLT sub_FF815F28\n"
259	//"ADR R0, 0xFF815F60\n"
260	"LDR R0, =0xFF815F60\n"
261	"BL sub_FF813BE0\n"
262	"CMP R0, #0\n"
263	//"ADRLT R0, 0xFF815F7C\n"
264	"LDRLT R0, =0xFF815F7C\n"
265	"BLLT sub_FF815F28\n"
266	"BL sub_FF819B5C\n"
267	"CMP R0, #0\n"
268	//"ADRLT R0, 0xFF815F88\n"
269	"LDRLT R0, =0xFF815F88\n"
270	"BLLT sub_FF815F28\n"
271	"BL sub_FF81165C\n"
272	"CMP R0, #0\n"
273	//"ADRLT R0, 0xFF815F94\n"
274	"LDRLT R0, =0xFF815F94\n"
275	"BLLT sub_FF815F28\n"
276	"LDMFD SP!, {R4,LR}\n"
277	//"B sub_FF81F868\n"
278	"B taskcreate_Startup_my\n" //---------->
279	);
280	};
281
282
283
284	void __attribute__((naked,noinline)) taskcreate_Startup_my() {
285	asm volatile (
286	"STMFD SP!, {R3-R5,LR}\n"
287	"BL sub_FF833350\n"
288	"BL sub_FF83A614\n"
289	"CMP R0, #0\n"
290	"BNE loc_FF81F8B0\n"
291	"LDR R4, =0xC0220000\n"
292	"LDR R0, [R4,#0x12C]\n"
293	"TST R0, #1\n"
294	"MOVEQ R0, #0x12C\n"
295	"BLEQ sub_FF838A50\n"
296	"BL sub_FF83334C\n"
297	"CMP R0, #0\n"
298	"BNE loc_FF81F8B0\n"
299	"BL sub_FF8329F4\n"
300	"MOV R0, #0x44\n"
301	"STR R0, [R4,#0x1C]\n"
302	"BL sub_FF832BE8\n"
303	"loc_FF81F8AC:\n"
304	"B loc_FF81F8AC\n"
305	"loc_FF81F8B0:\n"
306	//"BL sub_FF833358\n" // removed, see boot() function
307	"BL sub_FF833354\n"
308	"BL sub_FF8388C8\n"
309	"LDR R1, =0x3CE000\n"
310	"MOV R0, #0\n"
311	"BL sub_FF838D10\n"
312	"BL sub_FF838ABC\n"
313	"MOV R3, #0\n"
314	"STR R3, [SP]\n"
315	"LDR R3, =task_Startup_my\n" //+ ----------->
316	//"ADR R3, sub_FF81F804\n"
317	"MOV R2, #0\n"
318	"MOV R1, #0x19\n"
319	//"ADR R0, 0xFF81F8F8\n"
320	"LDR R0, =0xFF81F8F8\n"
321	"BL sub_FF81E5B4\n"
322	"MOV R0, #0\n"
323	"LDMFD SP!, {R3-R5,PC}\n"
324
325	//"LDMFD SP!, {R12,PC}\n" ??????????????????????????????????????????????????
326	);
327	};
328
329	void __attribute__((naked,noinline)) task_Startup_my() {
330
331	asm volatile (
332	"STMFD SP!, {R4,LR}\n"
333	"BL sub_FF816490\n"
334	"BL sub_FF83444C\n"
335	"BL sub_FF832670\n"
336	"BL sub_FF83A654\n"
337	"BL sub_FF83A838\n"
338	// "BL sub_FF83A6E8\n" // Skip starting diskboot.bin again
339	"BL sub_FF83A9D8\n"
340	"BL sub_FF83136C\n"
341	"BL sub_FF83A868\n"
342	"BL sub_FF83806C\n"
343	"BL sub_FF83A9DC\n"
344	//"BL sub_FF83323C\n" ; taskcreate_PhySw
345	);
346	CreateTask_PhySw(); // +
347	CreateTask_spytask(); // +
348	asm volatile (
349	"BL sub_FF836080\n"
350	"BL sub_FF83A9F4\n"
351	"BL sub_FF8306A4\n"
352	"BL sub_FF831FC8\n"
353	"BL sub_FF83A3F0\n"
354	"BL sub_FF832624\n"
355	"BL sub_FF831ED4\n"
356	"BL sub_FF8313A0\n"
357	"BL sub_FF83B564\n"
358	"BL sub_FF831EAC\n"
359	"LDMFD SP!, {R4,LR}\n"
360	"B sub_FF8165B0\n"
361	);
362	};
363
364	void spytask(long ua, long ub, long uc, long ud, long ue, long uf)
365	{
366	core_spytask();
367	}
368	void CreateTask_spytask() {
369	_CreateTask("SpyTask", 0x19, 0x2000, spytask, 0);
370	};
371
372	void __attribute__((naked,noinline)) CreateTask_PhySw() {
373	asm volatile (
374
375	"STMFD SP!, {R3-R5,LR}\n"
376	"LDR R4, =0x1C38\n"
377	"LDR R0, [R4,#0x10]\n"
378	"CMP R0, #0\n"
379	"BNE loc_FF833270\n"
380	"MOV R3, #0\n"
381	"STR R3, [SP]\n"
382	//"ADR R3, sub_FF833208\n"
383	//"MOV R2, #0x800\n"
384	"LDR R3, =mykbd_task\n" // task_phySw
385	"MOV R2, #0x2000\n" // greater Stacksize
386	"MOV R1, #0x17\n"
387	//"ADR R0, 0xFF833444\n"
388	"LDR R0, =0xFF833444\n"
389	"BL sub_FF838B10\n"
390	"STR R0, [R4,#0x10]\n"
391	"loc_FF833270:\n"
392	"BL sub_FF85E8B0\n"
393	"BL sub_FF88AF00\n"
394	"BL sub_FF861E20\n"
395	"CMP R0, #0\n"
396	"LDREQ R1, =0x330E4\n"
397	"LDMEQFD SP!, {R3-R5,LR}\n"
398	"BEQ sub_FF88AE88\n"
399	"LDMFD SP!, {R3-R5,PC}\n"
400	"NOP\n"
401	);
402	};
403
404	void __attribute__((naked,noinline)) init_file_modules_task() {
405	asm volatile (
406	"STMFD SP!, {R4-R6,LR}\n"
407	"BL sub_FF88D304\n"
408	"LDR R5, =0x5006\n"
409	"MOVS R4, R0\n"
410	"MOVNE R1, #0\n"
411	"MOVNE R0, R5\n"
412	"BLNE sub_FF8924F4\n"
413	//"BL sub_FF88D330\n"
414	"BL sub_FF88D330_my\n"
415	"BL core_spytask_can_start\n" // +
416	"CMP R4, #0\n"
417	"MOVEQ R0, R5\n"
418	"LDMEQFD SP!, {R4-R6,LR}\n"
419	"MOVEQ R1, #0\n"
420	"BEQ sub_FF8924F4\n"
421	"LDMFD SP!, {R4-R6,PC}\n"
422	);
423	};
424
425	void __attribute__((naked,noinline)) sub_FF88D330_my() {
426	asm volatile (
427	"STMFD SP!, {R4,LR}\n"
428	"MOV R0, #3\n"
429	//"BL sub_FF86DFAC\n"
430	"BL sub_FF86DFAC_my\n" // ----------->
431	"BL sub_FF9475FC\n"
432	"LDR R4, =0x302C\n"
433	"LDR R0, [R4,#4]\n"
434	"CMP R0, #0\n"
435	"BNE loc_FF88D368\n"
436	"BL sub_FF86D2B8\n"
437	"BL sub_FF93B638\n"
438	"BL sub_FF86D2B8\n"
439	"BL sub_FF8695B4\n"
440	"BL sub_FF86D1B8\n"
441	"BL sub_FF93B700\n"
442	"loc_FF88D368:\n"
443	"MOV R0, #1\n"
444	"STR R0, [R4]\n"
445	"LDMFD SP!, {R4,PC}\n"
446	);
447	};
448
449
450	void __attribute__((naked,noinline)) sub_FF86DFAC_my() {
451	asm volatile (
452	"STMFD SP!, {R4-R8,LR}\n"
453	"MOV R8, R0\n"
454	"BL sub_FF86DF2C\n"
455	"LDR R1, =0x37EA0\n"
456	"MOV R6, R0\n"
457	"ADD R4, R1, R0,LSL#7\n"
458	"LDR R0, [R4,#0x6C]\n"
459	"CMP R0, #4\n"
460	"LDREQ R1, =0x804\n"
461	//"ADREQ R0, 0xFF86DA78\n"
462	"LDREQ R0, =0xFF86DA78\n"
463	"BLEQ sub_FF81E88C\n"
464	"MOV R1, R8\n"
465	"MOV R0, R6\n"
466	"BL sub_FF86D7CC\n"
467	"LDR R0, [R4,#0x38]\n"
468	"BL sub_FF86E5C8\n"
469	"CMP R0, #0\n"
470	"STREQ R0, [R4,#0x6C]\n"
471	"MOV R0, R6\n"
472	"BL sub_FF86D85C\n"
473	"MOV R0, R6\n"
474	//"BL sub_FF86DBE0\n"
475	"BL sub_FF86DBE0_my\n" //------------->
476	"MOV R5, R0\n"
477	"MOV R0, R6\n"
478	"BL sub_FF86DE08\n"
479	"LDR R6, [R4,#0x3C]\n"
480	"AND R7, R5, R0\n"
481	"CMP R6, #0\n"
482	"LDR R1, [R4,#0x38]\n"
483	"MOVEQ R0, #0x80000001\n"
484	"MOV R5, #0\n"
485	"BEQ loc_FF86E05C\n"
486	"MOV R0, R1\n"
487	"BL sub_FF86D420\n"
488	"CMP R0, #0\n"
489	"MOVNE R5, #4\n"
490	"CMP R6, #5\n"
491	"ORRNE R0, R5, #1\n"
492	"BICEQ R0, R5, #1\n"
493	"CMP R7, #0\n"
494	"BICEQ R0, R0, #2\n"
495	"ORREQ R0, R0, #0x80000000\n"
496	"BICNE R0, R0, #0x80000000\n"
497	"ORRNE R0, R0, #2\n"
498	"loc_FF86E05C:\n"
499	"CMP R8, #7\n"
500	"STR R0, [R4,#0x40]\n"
501	"LDMNEFD SP!, {R4-R8,PC}\n"
502	"MOV R0, R8\n"
503	"BL sub_FF86DF7C\n"
504	"CMP R0, #0\n"
505	"LDMEQFD SP!, {R4-R8,LR}\n"
506	//"ADREQ R0, 0xFF86E0A8\n"
507	"LDREQ R0, =0xFF86E0A8\n"
508	"BEQ sub_FF81175C\n"
509	"LDMFD SP!, {R4-R8,PC}\n"
510	);
511	};
512
513	void __attribute__((naked,noinline)) sub_FF86DBE0_my() {
514
515	asm volatile (
516	"STMFD SP!, {R4-R6,LR}\n"
517	"MOV R5, R0\n"
518	"LDR R0, =0x37EA0\n"
519	"ADD R4, R0, R5,LSL#7\n"
520	"LDR R0, [R4,#0x6C]\n"
521	"TST R0, #2\n"
522	"MOVNE R0, #1\n"
523	"LDMNEFD SP!, {R4-R6,PC}\n"
524	"LDR R0, [R4,#0x38]\n"
525	"MOV R1, R5\n"
526	//"BL sub_FF86D8DC\n"
527	"BL sub_FF86D8DC_my\n" // ------------------>
528	"CMP R0, #0\n"
529	"LDRNE R0, [R4,#0x38]\n"
530	"MOVNE R1, R5\n"
531	"BLNE sub_FF86DA9C\n"
532	"LDR R2, =0x37F20\n"
533	"ADD R1, R5, R5,LSL#4\n"
534	"LDR R1, [R2,R1,LSL#2]\n"
535	"CMP R1, #4\n"
536	"BEQ loc_FF86DC40\n"
537	"CMP R0, #0\n"
538	"LDMEQFD SP!, {R4-R6,PC}\n"
539	"MOV R0, R5\n"
540	"BL sub_FF86D4B0\n"
541	"loc_FF86DC40:\n"
542	"CMP R0, #0\n"
543	"LDRNE R1, [R4,#0x6C]\n"
544	"ORRNE R1, R1, #2\n"
545	"STRNE R1, [R4,#0x6C]\n"
546	"LDMFD SP!, {R4-R6,PC}\n"
547	);
548	};
549
550
551	void __attribute__((naked,noinline)) sub_FF86D8DC_my() {
552	asm volatile (
553
554	"sub_FF86D8DC:\n"
555	"STMFD SP!, {R4-R10,LR}\n"
556	"MOV R9, R0\n"
557	"LDR R0, =0x37EA0\n"
558	"MOV R8, #0\n"
559	"ADD R5, R0, R1,LSL#7\n"
560	"LDR R0, [R5,#0x3C]\n"
561	"MOV R7, #0\n"
562	"CMP R0, #7\n"
563	"MOV R6, #0\n"
564	"ADDLS PC, PC, R0,LSL#2\n"
565	"B loc_FF86DA34\n"
566	"loc_FF86D908:\n"
567	"B loc_FF86D940\n"
568	"loc_FF86D90C:\n"
569	"B loc_FF86D928\n"
570	"loc_FF86D910:\n"
571	"B loc_FF86D928\n"
572	"loc_FF86D914:\n"
573	"B loc_FF86D928\n"
574	"loc_FF86D918:\n"
575	"B loc_FF86D928\n"
576	"loc_FF86D91C:\n"
577	"B loc_FF86DA2C\n"
578	"loc_FF86D920:\n"
579	"B loc_FF86D928\n"
580	"loc_FF86D924:\n"
581	"B loc_FF86D928\n"
582	"loc_FF86D928:\n"
583	"MOV R2, #0\n"
584	"MOV R1, #0x200\n"
585	"MOV R0, #2\n"
586	"BL sub_FF887384\n"
587	"MOVS R4, R0\n"
588	"BNE loc_FF86D948\n"
589	"loc_FF86D940:\n"
590	"MOV R0, #0\n"
591	"LDMFD SP!, {R4-R10,PC}\n"
592	"loc_FF86D948:\n"
593	"LDR R12, [R5,#0x50]\n"
594	"MOV R3, R4\n"
595	"MOV R2, #1\n"
596	"MOV R1, #0\n"
597	"MOV R0, R9\n"
598	"BLX R12\n"
599	"CMP R0, #1\n"
600	"BNE loc_FF86D974\n"
601	"MOV R0, #2\n"
602	"BL sub_FF8874D0\n"
603	"B loc_FF86D940\n"
604	"loc_FF86D974:\n"
605	"LDR R1, [R5,#0x64]\n"
606	"MOV R0, R9\n"
607	"BLX R1\n"
608
609
610	"MOV R1, R4\n" // pointer to MBR in R1
611	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
612
613	// Start of DataGhost's FAT32 autodetection code
614	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
615	// According to the code below, we can use R1, R2, R3 and R12.
616	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
617	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
618	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
619	"MOV LR, R4\n" // Save old offset for MBR signature
620	"MOV R1, #1\n" // Note the current partition number
621	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
622	"dg_sd_fat32:\n"
623	"CMP R1, #4\n" // Did we already see the 4th partition?
624	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
625	"ADD R12, R12, #0x10\n" // Second partition
626	"ADD R1, R1, #1\n" // Second partition for the loop
627	"dg_sd_fat32_enter:\n"
628	"LDRB R2, [R12, #0x1BE]\n" // Partition status
629	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
630	"CMP R3, #0xB\n" // Is this a FAT32 partition?
631	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
632	"BNE dg_sd_fat32\n" // No, it isn't.
633	"CMP R2, #0x00\n" // It is, check the validity of the partition type
634	"CMPNE R2, #0x80\n"
635	"BNE dg_sd_fat32\n" // Invalid, go to next partition
636	// This partition is valid, it's the first one, bingo!
637	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
638
639	"dg_sd_fat32_end:\n"
640	// End of DataGhost's FAT32 autodetection code
641
642	"LDRB R1, [R4,#0x1C9]\n"
643	"LDRB R3, [R4,#0x1C8]\n"
644	"LDRB R12, [R4,#0x1CC]\n"
645	"MOV R1, R1,LSL#24\n"
646	"ORR R1, R1, R3,LSL#16\n"
647	"LDRB R3, [R4,#0x1C7]\n"
648	"LDRB R2, [R4,#0x1BE]\n"
649	//"LDRB LR, [R4,#0x1FF]\n" // replaced, see below
650	"ORR R1, R1, R3,LSL#8\n"
651	"LDRB R3, [R4,#0x1C6]\n"
652	"CMP R2, #0\n"
653	"CMPNE R2, #0x80\n"
654	"ORR R1, R1, R3\n"
655	"LDRB R3, [R4,#0x1CD]\n"
656	"MOV R3, R3,LSL#24\n"
657	"ORR R3, R3, R12,LSL#16\n"
658	"LDRB R12, [R4,#0x1CB]\n"
659	"ORR R3, R3, R12,LSL#8\n"
660	"LDRB R12, [R4,#0x1CA]\n"
661	"ORR R3, R3, R12\n"
662	//"LDRB R12, [R4,#0x1FE]\n" // replaced, see below
663	"LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55)
664	"LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA)
665	"BNE loc_FF86DA00\n"
666	"CMP R0, R1\n"
667	"BCC loc_FF86DA00\n"
668	"ADD R2, R1, R3\n"
669	"CMP R2, R0\n"
670	"CMPLS R12, #0x55\n"
671	"CMPEQ LR, #0xAA\n"
672	"MOVEQ R7, R1\n"
673	"MOVEQ R6, R3\n"
674	"MOVEQ R4, #1\n"
675	"BEQ loc_FF86DA04\n"
676	"loc_FF86DA00:\n"
677	"MOV R4, R8\n"
678	"loc_FF86DA04:\n"
679	"MOV R0, #2\n"
680	"BL sub_FF8874D0\n"
681	"CMP R4, #0\n"
682	"BNE loc_FF86DA40\n"
683	"LDR R1, [R5,#0x64]\n"
684	"MOV R7, #0\n"
685	"MOV R0, R9\n"
686	"BLX R1\n"
687	"MOV R6, R0\n"
688	"B loc_FF86DA40\n"
689	"loc_FF86DA2C:\n"
690	"MOV R6, #0x40\n"
691	"B loc_FF86DA40\n"
692	"loc_FF86DA34:\n"
693	"LDR R1, =0x568\n"
694	//"ADR R0, 0xFF86DA78\n"
695	"LDR R0, =0xFF86DA78\n"
696	"BL sub_FF81E88C\n"
697	"loc_FF86DA40:\n"
698	"STR R7, [R5,#0x44]!\n"
699	"STMIB R5, {R6,R8}\n"
700	"MOV R0, #1\n"
701	"LDMFD SP!, {R4-R10,PC}\n"
702	);
703	};
704
705	void __attribute__((naked,noinline)) JogDial_task_my() {
706	asm volatile (
707	"STMFD SP!, {R4-R11,LR}\n"
708	"SUB SP, SP, #0x34\n"
709	"BL sub_FF85E904\n"
710	"LDR R1, =0x2560\n"
711	"LDR R9, =0xFFB3AB0C\n"
712	"MOV R0, #0\n"
713	"ADD R2, SP, #0x1C\n"
714	"ADD R3, SP, #0x20\n"
715	"ADD R10, SP, #0xC\n"
716	"ADD R8, SP, #0x14\n"
717	"MOV R7, #0\n"
718	"loc_FF85E534:\n"
719	"ADD R3, SP, #0x20\n"
720	"ADD R12, R3, R0,LSL#1\n"
721	"ADD R2, SP, #0x1C\n"
722	"STRH R7, [R12]\n"
723	"ADD R12, R2, R0,LSL#1\n"
724	"STRH R7, [R12]\n"
725	"STR R7, [R8,R0,LSL#2]\n"
726	"STR R7, [R10,R0,LSL#2]\n"
727	"ADD R0, R0, #1\n"
728	"CMP R0, #2\n"
729	"BLT loc_FF85E534\n"
730	"loc_FF85E560:\n"
731	"LDR R0, =0x2560\n"
732	"MOV R2, #0\n"
733	"LDR R0, [R0,#8]\n"
734	"ADD R1, SP, #4\n"
735	"BL sub_FF8382FC\n"
736	"TST R0, #1\n"
737	"LDRNE R1, =0x229\n"
738	//"ADRNE R0, 0xFF85E830\n"
739	"LDRNE R0, =0xFF85E830\n"
740	"BLNE sub_FF81E88C\n"
741
742	//------------------ added code ---------------------
743	"labelA:\n"
744	"LDR R0, =jogdial_stopped\n"
745	"LDR R0, [R0]\n"
746	"CMP R0, #1\n"
747	"BNE labelB\n"
748	"MOV R0, #40\n"
749	"BL _SleepTask\n"
750	"B labelA\n"
751	"labelB:\n"
752	//------------------ original code ------------------
753
754	"LDR R0, [SP,#4]\n"
755	"AND R4, R0, #0xFF\n"
756	"AND R0, R0, #0xFF00\n"
757	"CMP R0, #0x100\n"
758	"BEQ loc_FF85E5E4\n"
759	"CMP R0, #0x200\n"
760	"BEQ loc_FF85E61C\n"
761	"CMP R0, #0x300\n"
762	"BEQ loc_FF85E884\n"
763	"CMP R0, #0x400\n"
764	"BNE loc_FF85E560\n"
765	"CMP R4, #0\n"
766	"LDRNE R1, =0x2DB\n"
767	//"ADRNE R0, 0xFF85E830\n"
768	"LDRNE R0, =0xFF85E830\n"
769	"BLNE sub_FF81E88C\n"
770	"LDR R2, =0xFFB3AAE4\n"
771	"ADD R0, R4, R4,LSL#2\n"
772	"LDR R1, [R2,R0,LSL#2]\n"
773	"STR R7, [R1]\n"
774	"MOV R1, #1\n"
775	"ADD R0, R2, R0,LSL#2\n"
776	"loc_FF85E5D8:\n"
777	"LDR R0, [R0,#8]\n"
778	"STR R1, [R0]\n"
779	"B loc_FF85E560\n"
780	"loc_FF85E5E4:\n"
781	"LDR R5, =0x2570\n"
782	"LDR R0, [R5,R4,LSL#2]\n"
783	"BL sub_FF839294\n"
784	//"ADR R2, 0xFF85E45C\n"
785	"LDR R2, =0xFF85E45C\n"
786	"ADD R1, R2, #0\n"
787	"ORR R3, R4, #0x200\n"
788	"MOV R0, #0x28\n"
789	"BL sub_FF8391B0\n"
790	"TST R0, #1\n"
791	"CMPNE R0, #0x15\n"
792	"STR R0, [R10,R4,LSL#2]\n"
793	"BEQ loc_FF85E560\n"
794	"LDR R1, =0x23E\n"
795	"B loc_FF85E81C\n"
796	"loc_FF85E61C:\n"
797	"LDR R1, =0xFFB3AAE4\n"
798	"ADD R0, R4, R4,LSL#2\n"
799	"STR R0, [SP,#0x30]\n"
800	"ADD R0, R1, R0,LSL#2\n"
801	"STR R0, [SP,#0x2C]\n"
802	"LDR R0, [R0,#4]\n"
803	"LDR R0, [R0]\n"
804	"MOV R2, R0,ASR#16\n"
805	"ADD R0, SP, #0x20\n"
806	"ADD R0, R0, R4,LSL#1\n"
807	"STR R0, [SP,#0x28]\n"
808	"STRH R2, [R0]\n"
809	"ADD R0, SP, #0x1C\n"
810	"ADD R0, R0, R4,LSL#1\n"
811	"STR R0, [SP,#0x24]\n"
812	"LDRSH R3, [R0]\n"
813	"SUB R0, R2, R3\n"
814	"CMP R0, #0\n"
815	"BNE loc_FF85E6AC\n"
816	"LDR R0, [R8,R4,LSL#2]\n"
817	"CMP R0, #0\n"
818	"BEQ loc_FF85E7D4\n"
819	"LDR R5, =0x2570\n"
820	"LDR R0, [R5,R4,LSL#2]\n"
821	"BL sub_FF839294\n"
822	//"ADR R2, sub_FF85E468\n"
823	"LDR R2, =0xFF85E468\n"
824	"ADD R1, R2, #0\n"
825	"ORR R3, R4, #0x300\n"
826	"MOV R0, #0x1F4\n"
827	"BL sub_FF8391B0\n"
828	"TST R0, #1\n"
829	"CMPNE R0, #0x15\n"
830	"STR R0, [R5,R4,LSL#2]\n"
831	"BEQ loc_FF85E7D4\n"
832	"LDR R1, =0x25B\n"
833	"B loc_FF85E7CC\n"
834	"loc_FF85E6AC:\n"
835	"MOV R1, R0\n"
836	"RSBLT R0, R0, #0\n"
837	"MOVLE R5, #0\n"
838	"MOVGT R5, #1\n"
839	"CMP R0, #0xFF\n"
840	"BLS loc_FF85E6EC\n"
841	"CMP R1, #0\n"
842	"RSBLE R0, R3, #0xFF\n"
843	"ADDLE R0, R0, #0x7F00\n"
844	"ADDLE R0, R0, R2\n"
845	"RSBGT R0, R2, #0xFF\n"
846	"ADDGT R0, R0, #0x7F00\n"
847	"ADDGT R0, R0, R3\n"
848	"ADD R0, R0, #0x8000\n"
849	"ADD R0, R0, #1\n"
850	"EOR R5, R5, #1\n"
851	"loc_FF85E6EC:\n"
852	"STR R0, [SP,#8]\n"
853	"LDR R0, [R8,R4,LSL#2]\n"
854	"CMP R0, #0\n"
855	"BEQ loc_FF85E73C\n"
856	"LDR R1, =0xFFB3AB24\n"
857	"ADD R1, R1, R4,LSL#3\n"
858	"LDR R1, [R1,R5,LSL#2]\n"
859	"CMP R1, R0\n"
860	"BEQ loc_FF85E758\n"
861	"ADD R11, R4, R4,LSL#1\n"
862	"ADD R6, R9, R11,LSL#2\n"
863	"LDRB R0, [R6,#9]\n"
864	"CMP R0, #1\n"
865	"LDREQ R0, [R6,#4]\n"
866	"BLEQ sub_FF894354\n"
867	"LDRB R0, [R6,#8]\n"
868	"CMP R0, #1\n"
869	"BNE loc_FF85E758\n"
870	"LDR R0, [R9,R11,LSL#2]\n"
871	"B loc_FF85E754\n"
872	"loc_FF85E73C:\n"
873	"ADD R0, R4, R4,LSL#1\n"
874	"ADD R1, R9, R0,LSL#2\n"
875	"LDRB R1, [R1,#8]\n"
876	"CMP R1, #1\n"
877	"BNE loc_FF85E758\n"
878	"LDR R0, [R9,R0,LSL#2]\n"
879	"loc_FF85E754:\n"
880	"BL sub_FF894354\n"
881	"loc_FF85E758:\n"
882	"LDR R0, =0xFFB3AB24\n"
883	"LDR R1, [SP,#8]\n"
884	"ADD R6, R0, R4,LSL#3\n"
885	"LDR R0, [R6,R5,LSL#2]\n"
886	"BL sub_FF894284\n"
887	"LDR R0, [R6,R5,LSL#2]\n"
888	"STR R0, [R8,R4,LSL#2]\n"
889	"LDR R0, [SP,#0x28]\n"
890	"LDR R1, [SP,#0x24]\n"
891	"LDRH R0, [R0]\n"
892	"STRH R0, [R1]\n"
893	"ADD R0, R4, R4,LSL#1\n"
894	"ADD R0, R9, R0,LSL#2\n"
895	"LDRB R0, [R0,#9]\n"
896	"CMP R0, #1\n"
897	"BNE loc_FF85E7D4\n"
898	"LDR R5, =0x2570\n"
899	"LDR R0, [R5,R4,LSL#2]\n"
900	"BL sub_FF839294\n"
901	//"ADR R2, sub_FF85E468\n"
902	"LDR R2, =0xFF85E468\n"
903	"ADD R1, R2, #0\n"
904	"ORR R3, R4, #0x300\n"
905	"MOV R0, #0x1F4\n"
906	"BL sub_FF8391B0\n"
907	"TST R0, #1\n"
908	"CMPNE R0, #0x15\n"
909	"STR R0, [R5,R4,LSL#2]\n"
910	"BEQ loc_FF85E7D4\n"
911	"LDR R1, =0x2B5\n"
912	"loc_FF85E7CC:\n"
913	//"ADR R0, 0xFF85E830\n"
914	"LDR R0, =0xFF85E830\n"
915	"BL sub_FF81E88C\n"
916	"loc_FF85E7D4:\n"
917	"ADD R0, R4, R4,LSL#1\n"
918	"ADD R0, R9, R0,LSL#2\n"
919	"LDRB R0, [R0,#0xA]\n"
920	"CMP R0, #1\n"
921	"BNE loc_FF85E868\n"
922	"LDR R0, =0x2560\n"
923	"LDR R0, [R0,#0xC]\n"
924	"CMP R0, #0\n"
925	"BEQ loc_FF85E868\n"
926	//"ADR R2, 0xFF85E45C\n"
927	"LDR R2, =0xFF85E45C\n"
928	"ADD R1, R2, #0\n"
929	"ORR R3, R4, #0x400\n"
930	"BL sub_FF8391B0\n"
931	"TST R0, #1\n"
932	"CMPNE R0, #0x15\n"
933	"STR R0, [R10,R4,LSL#2]\n"
934	"BEQ loc_FF85E560\n"
935	"MOV R1, #0x2C0\n"
936	"loc_FF85E81C:\n"
937	//"ADR R0, 0xFF85E830\n"
938	"LDR R0, =0xFF85E830\n"
939	"BL sub_FF81E88C\n"
940	"B loc_FF85E560\n"
941	"NOP\n"
942
943	"loc_FF85E868:\n"
944	"LDR R1, =0xFFB3AAE4\n"
945	"LDR R0, [SP,#0x30]\n"
946	"LDR R0, [R1,R0,LSL#2]\n"
947	"STR R7, [R0]\n"
948	"LDR R0, [SP,#0x2C]\n"
949	"MOV R1, #1\n"
950	"B loc_FF85E5D8\n"
951	"loc_FF85E884:\n"
952	"LDR R0, [R8,R4,LSL#2]\n"
953	"CMP R0, #0\n"
954	"LDREQ R1, =0x2CD\n"
955	//"ADREQ R0, 0xFF85E830\n"
956	"LDREQ R0, =0xFF85E830\n"
957	"BLEQ sub_FF81E88C\n"
958	"ADD R0, R4, R4,LSL#1\n"
959	"ADD R0, R9, R0,LSL#2\n"
960	"LDR R0, [R0,#4]\n"
961	"BL sub_FF894354\n"
962	"STR R7, [R8,R4,LSL#2]\n"
963	"B loc_FF85E560\n"
964
965	);
966	};

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source: branches/release-1_0/platform/s90/sub/100c/boot.c @ 2792

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