Context Navigation

← Previous Revision
Latest Revision
Next Revision →
Blame
Revision Log

boot.c @ 1625

Revision 1625, 54.5 KB checked in by reyalp, 16 months ago (diff)

a470 updates from srsa_4c in http://chdk.setepontos.com/index.php?topic=650.msg80692#msg80692

extra long exposures implemented (all 3 fw revisions, tested on 1.02c)
fixed the dark frame subtraction setting, bug mentioned here: http://chdk.setepontos.com/index.php?topic=3368.msg39071#msg39071 for all 3 revisions
flash params table and params count fixed (I've verified the addresses manually, so all 3 rev. should be ok)
defined CAM_STARTUP_CRASH_FILE_OPEN_FIX (previously camera crashed when "refresh" was issued in chdkptp GUI)
also defined CAM_DETECT_SCREEN_ERASE
strange check removed from kbd.c
multiple corrections for 1.02c according to stubs_entry.S (can't be sure it would be ok for the other 2)
debug code removed from capt_seq.c

Property svn:eol-style set to native

Line
1	#include "lolevel.h"
2	#include "platform.h"
3	#include "core.h"
4
5	const char * const new_sa = &_end;
6
7	/* Ours stuff */
8	extern long wrs_kernel_bss_start;
9	extern long wrs_kernel_bss_end;
10
11	// Forward declarations
12	void CreateTask_PhySw();
13	void CreateTask_spytask();
14
15	void boot();
16
17	void taskCreateHook(int *p) { //function taken from the ixus80 port, adapted of course
18	p-=16;
19	if (p[0]==0xffc905d4) p[0]=(int)exp_drv_task;
20	}
21
22	//All strings changed, now to change subroutines
23
24	void boot() { //#fs
25	long canon_data_src = (void)0xFFEABED8; //found with "romdata start" string
26	long canon_data_dst = (void)0x1900;
27	long canon_data_len = 0xEBF8 - 0x1900; // data_end - data_start
28	long canon_bss_start = (void)0xEBF8; // just after data
29	long canon_bss_len = 0xA5798 - 0xEBF8; // found using heapstart
30
31	long i;
32
33	// Code taken from VxWorks CHDK. Changes CPU speed?
34	asm volatile (
35	"MRC p15, 0, R0,c1,c0\n"
36	"ORR R0, R0, #0x1000\n"
37	"ORR R0, R0, #4\n"
38	"ORR R0, R0, #1\n"
39	"MCR p15, 0, R0,c1,c0\n"
40	:::"r0");
41
42	for(i=0;i<canon_data_len/4;i++)
43	canon_data_dst[i]=canon_data_src[i];
44
45	for(i=0;i<canon_bss_len/4;i++)
46	canon_bss_start[i]=0;
47
48	(int)0x1930=(int)taskCreateHook; //from ixus80 port
49	(int)0x1934=(int)taskCreateHook; //from ixus80 port (was taskCreateHook2...)
50
51	/* asm volatile (
52	"MRC p15, 0, R0,c1,c0\n"
53	"ORR R0, R0, #0x1000\n"
54	"BIC R0, R0, #4\n"
55	"ORR R0, R0, #1\n"
56	"MCR p15, 0, R0,c1,c0\n"
57	:::"r0");
58	*/
59
60	// jump to init-sequence that follows the data-copy-routine
61	asm volatile ("B sub_FFC001a4_my\n");
62	}; //#fe
63
64
65	// init
66	void __attribute__((naked,noinline)) sub_FFC001a4_my() { //#fs
67	asm volatile (
68	"LDR R0, =0xFFC0021C\n"
69	"MOV R1, #0\n"
70	"LDR R3, =0xFFC00254\n"
71
72	"loc_FFC001B0:\n"
73	"CMP R0, R3\n"
74	"LDRCC R2, [R0],#4\n"
75	"STRCC R2, [R1],#4\n"
76	"BCC loc_FFC001B0\n"
77
78	"LDR R0, =0xFFC00254\n"
79	"MOV R1, #0x4B0\n"
80	"LDR R3, =0xFFC00468\n"
81
82	"loc_FFC001CC:\n"
83	"CMP R0, R3\n"
84	"LDRCC R2, [R0],#4\n"
85	"STRCC R2, [R1],#4\n"
86	"BCC loc_FFC001CC\n"
87	"MOV R0, #0xD2\n"
88	"MSR CPSR_cxsf, R0\n"
89	"MOV SP, #0x1000\n"
90	"MOV R0, #0xD3\n"
91	"MSR CPSR_cxsf, R0\n"
92	"MOV SP, #0x1000\n"
93	"LDR R0, =0x6C4\n"
94	"LDR R2, =0xEEEEEEEE\n"
95	"MOV R3, #0x1000\n"
96
97	"loc_FFC00200:\n"
98	"CMP R0, R3\n"
99	"STRCC R2, [R0],#4\n"
100	"BCC loc_FFC00200\n"
101
102	//"BL sub_FFC00FA0\n"
103	"BL sub_FFC00FA0_my\n"
104	);
105	} //#fe
106
107	void __attribute__((naked,noinline)) sub_FFC00FA0_my() { //#fs
108	asm volatile (
109	//"STR LR, [SP,#0xFFFFFFFC]!\n"
110	"STR LR, [SP,#-4]!\n" // inspired by original CHDK-code
111	"SUB SP, SP, #0x74\n"
112	"MOV R0, SP\n"
113	"MOV R1, #0x74\n"
114	"BL sub_FFE4ECA0\n"
115	"MOV R0, #0x53000\n"
116	"STR R0, [SP,#0x74-0x70]\n"
117	);
118	// "LDR R0, =0xA5798\n"
119	asm volatile (
120	"LDR R0, =new_sa\n"
121	"LDR R0, [R0]\n"
122	);
123	asm volatile (
124	"LDR R2, =0x279C00\n"
125	"LDR R1, =0x272968\n"
126	"STR R0, [SP,#0x74-0x6C]\n"
127	"SUB R0, R1, R0\n"
128	"ADD R3, SP, #0x74-0x68\n"
129	"STR R2, [SP,#0x74-0x74]\n"
130	"STMIA R3, {R0-R2}\n"
131	"MOV R0, #0x22\n"
132	"STR R0, [SP,#0x74-0x5C]\n"
133	"MOV R0, #0x68\n"
134	"STR R0, [SP,#0x74-0x58]\n"
135	"LDR R0, =0x19B\n"
136	"MOV R1, #0x64\n"
137	//"STRD R0, [SP,#0x74-0x54]\n" // "strd not supported by cpu" claims gcc
138	"STR R0, [SP,#0x74-0x54]\n" // split in two single-word STRs
139	"STR R1, [SP,#0x74-0x50]\n"
140
141	"MOV R0, #0x78\n"
142	//"STRD R0, [SP,#0x74-0x4C]\n" // "strd not supported by cpu" claims gcc
143	"STR R0, [SP,#0x74-0x4C]\n" // split in two single-word STRs
144	"STR R1, [SP,#0x74-0x48]\n"
145
146	"MOV R0, #0\n"
147	"STR R0, [SP,#0x74-0x44]\n"
148	"STR R0, [SP,#0x74-0x40]\n"
149	"MOV R0, #0x10\n"
150	"STR R0, [SP,#0x74-0x18]\n"
151	"MOV R0, #0x800\n"
152	"STR R0, [SP,#0x74-0x14]\n"
153	"MOV R0, #0xA0\n"
154	"STR R0, [SP,#0x74-0x10]\n"
155	"MOV R0, #0x280\n"
156	"STR R0, [SP,#0x74-0x0C]\n"
157
158	//"LDR R1, =0xFFC04DA4\n" // uHwSetup = 0xFFC04DA4
159	"LDR R1, =uHwSetup_my\n" // followup to own function
160
161	"MOV R0, SP\n"
162	"MOV R2, #0\n"
163	"BL sub_FFC02D58\n"
164	"ADD SP, SP, #0x74\n"
165	"LDR PC, [SP],#4\n"
166	);
167	}; //#fe
168
169	void __attribute__((naked,noinline)) uHwSetup_my() { //#fs
170	asm volatile (
171	"STMFD SP!, {R4,LR}\n"
172	"BL sub_FFC0094C\n"
173	"BL sub_FFC0972C\n" // _dmSetup
174	"CMP R0, #0\n"
175	"LDRLT R0, =0xFFC04EB8\n" // FFC04EB8 aDmsetup
176	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
177	"BL sub_FFC049C8\n" // _termDriverInit
178	"CMP R0, #0\n"
179	"LDRLT R0, =0xFFC04EC0\n" // aTermdriverinit
180	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
181	"LDR R0, =0xFFC04ED0\n" // a_term
182	"BL sub_FFC04AB4\n" // _termDeviceCreate
183	"CMP R0, #0\n"
184	"LDRLT R0, =0xFFC04ED8\n" // aTermdevicecrea
185	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
186	"LDR R0, =0xFFC04ED0\n" // a_term
187	"BL sub_FFC03564\n" // _stdioSetup
188	"CMP R0, #0\n"
189	"LDRLT R0, =0xFFC04EEC\n" // aStdiosetup
190	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
191	"BL sub_FFC092B4\n" // _stdlibSetup
192	"CMP R0, #0\n"
193	"LDRLT R0, =0xFFC04EF8\n" // aStdlibsetup
194	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
195	"BL sub_FFC014B8\n" // _armlib_setup
196	"CMP R0, #0\n"
197	"LDRLT R0, =0xFFC04F04\n" // aArmlib_setup
198	"BLLT sub_FFC04E98\n" // FFC04EB0 _err_init_task
199	"LDMFD SP!, {R4,LR}\n"
200	//"B _CreateTaskStartup\n" // FFC0CD84
201	"B CreateTask_Startup_my\n"
202
203	);
204	}; //#fe
205
206	void __attribute__((naked,noinline)) CreateTask_Startup_my() { //#fs
207	asm volatile (
208	"STMFD SP!, {R3,LR}\n"
209	//"BL nullsub_42\n"
210	"BL sub_FFC1978C\n"
211	"CMP R0, #0\n"
212	"BNE loc_FFC0CDB4\n"
213	"BL sub_FFC119C0\n"
214	"CMP R0, #0\n"
215	"BNE loc_FFC0CDB4\n"
216	"LDR R1, =0xC0220000\n"
217	"MOV R0, #0x44\n"
218	"STR R0, [R0,#0xA0]\n"
219	"loc_FFC0CDB0:\n"
220	"B loc_FFC0CDB0\n"
221	"loc_FFC0CDB4:\n"
222	//"BL nullsub_44\n"
223	//"BL nullsub_43\n"
224	"BL sub_FFC17B14\n"
225	"LDR R1, =0x2CE000\n"
226	"MOV R0, #0\n"
227
228	"BL sub_FFC17D5C\n"
229	"BL sub_FFC17D08\n"
230	"MOV R3, #0\n"
231	"STR R3, [SP,#8-8]\n"
232
233	//"LDR R3, =0xFFC0CD28\n" // Startup, FFC0CD28
234	"LDR R3, =task_Startup_my\n" // followup to own function
235
236	"MOV R2, #0\n"
237	"MOV R1, #0x19\n"
238	"LDR R0, =0xFFC0CDFC\n" // aStartup, 0xFFC0CDFC
239	"BL sub_FFC0B8E0\n" // CreateTask
240	"MOV R0, #0\n"
241	"LDMFD SP!, {R12,PC}\n"
242
243	);
244	}; //#fe
245
246	void __attribute__((naked,noinline)) task_Startup_my() { //#fs
247
248	asm volatile (
249	"STMFD SP!, {R4,LR}\n"
250	"BL sub_FFC051BC\n" // uRegClockSave
251	"BL sub_FFC12B1C\n"
252	"BL sub_FFC0FDFC\n"
253	"BL sub_FFC197CC\n"
254	"BL sub_FFC19994\n"
255	//"BL sub_FFC19854\n" // StartDiskboot
256	);
257
258	CreateTask_spytask();
259
260	asm volatile (
261	"BL sub_FFC19B48\n"
262	"BL sub_FFC199E4\n"
263
264	"BL sub_FFC17054\n"
265	"BL sub_FFC19B4C\n"
266	);
267
268	CreateTask_PhySw();
269
270	asm volatile (
271	//"BL sub_FFC118D8\n" // CreateTask_PhySw - checks buttons and acts accordingly
272
273	"BL sub_FFC14A18_my\n" // divert to intercept task_ShootSeqTask
274	"BL sub_FFC19B64\n"
275	//"BL nullsub_2\n"
276	"BL sub_FFC10DAC\n"
277	"BL sub_FFC19554\n" // taskCreate_bye
278	"BL sub_FFC11408\n"
279	"BL sub_FFC10CAC\n"
280	//"BL sub_FFC1A4CC\n"
281	"BL sub_FFC1A4CC_my\n" // divert for SDHC-bootdisk-support
282	"BL sub_FFC10C68\n"
283
284	// modification: BL instead of B to last function to control action after its return
285	"BL sub_FFC05070\n"
286	"LDMFD SP!, {R4,PC}\n" // restore stack to PC instead of LR to return to caller
287	);
288	}; //#fe
289
290	void CreateTask_spytask() { //#fs
291	_CreateTask("SpyTask", 0x19, 0x2000, core_spytask, 0);
292
293	}; //#fe
294
295	void CreateTask_PhySw() { //#fs
296	_CreateTask("PhySw", 0x18, 0x800, mykbd_task, 0);
297	}; //#fe
298
299	void __attribute__((naked,noinline)) sub_FFC14A18_my() { //#fs
300	asm volatile (
301	"STMFD SP!, {R4,LR}\n"
302	"LDR R4, =0x1C04\n"
303	"MOV R0, #0\n"
304	"MOV R1, #4\n"
305	"STR R0, [R4,#0xC]\n"
306	"BL sub_FFC0BC10\n"
307	"STR R0, [R4,#4]\n"
308	"MOV R0, #0\n"
309	"MOV R1, #1\n"
310	"BL sub_FFC0BC34\n"
311	"STR R0, [R4,#8]\n"
312	"BL sub_FFC4BC30\n"
313	"BL sub_FFC4CE04\n"
314	"BL sub_FFC4AD44\n"
315	//"BL sub_FFC47D30\n"
316	"BL sub_FFC47D30_my\n" // divert this for ShootSeqTask
317	"BL sub_FFC4BEF0\n"
318	"LDR R0, [R4,#4]\n"
319	"LDMFD SP!, {R4,LR}\n"
320	"MOV R1, #0x1000\n"
321	"B sub_FFC173B8\n"
322	);
323	}; //#fe
324
325	void __attribute__((naked,noinline)) sub_FFC47D30_my() { //#fs
326	asm volatile (
327	"STMFD SP!, {R4,LR}\n"
328	"LDR R4, =0x52C0\n"
329	"LDR R0, [R4,#4]\n"
330	"CMP R0, #0\n"
331	"BNE loc_FFC47D9C\n"
332	//"BL nullsub_5\n"
333	"MOV R1, #1\n"
334	"MOV R0, #0\n"
335	"BL sub_FFC0BC34\n"
336	"STR R0, [R4,#0xC]\n"
337	"MOV R0, #0\n"
338	"MOV R1, #0\n"
339	"BL sub_FFC0BC10\n"
340	"STR R0, [R4,#0x10]\n"
341	"BL sub_FFC4802C\n"
342	"BL sub_FFC4857C\n" // continue here for task_ShootSeqTask (this is nonsense. We just need CaptSeqTask)
343	"MOV R0, #0\n"
344	"STR R0, [R4,#0x8]\n"
345	"ADD R0, R4, #0x14\n"
346	"MOV R1, #0\n"
347	"STR R1, [R0],#4\n"
348	"STR R1, [R0]\n"
349	"BL sub_FFC4871C\n"
350	"BL sub_FFC4C09C\n"
351	"BL sub_FFC4A714\n"
352	//"BL sub_FFC49048\n"
353	"BL sub_FFC49048_my\n" // continue here for task_CaptSeqTask
354	"BL sub_FFC4A25C\n"
355	"loc_FFC47D9C:\n"
356	"MOV R0, #1\n"
357	"STR R0, [R4,#4]\n"
358	"LDMFD SP!, {R4,PC}\n"
359	);
360	}; //#fe
361
362	void __attribute__((naked,noinline)) sub_FFC49048_my() { //#fs // CreateTask_CaptSeqTask
363	asm volatile (
364	"STMFD SP!, {R3-R5,LR}\n"
365	"LDR R2, =0x1965C\n"
366	"MOV R0, #0\n"
367	"MOV R1, #0\n"
368	"loc_FFC49058:\n"
369	"ADD R3, R2, R0,LSL#4\n"
370	"ADD R0, R0, #1\n"
371	"CMP R0, #5\n"
372	"STR R1, [R3,#8]\n"
373	"BCC loc_FFC49058\n"
374	"BL sub_FFD0C400\n"
375	"BL sub_FFD0DFD8\n"
376	"MOV R1, #5\n"
377	"MOV R0, #0\n"
378	"BL sub_FFC0BBEC\n"
379	"LDR R4, =0x52F8\n"
380	"LDR R1, =0x1001FF\n"
381	"STR R0, [R4,#8]\n"
382	"MOV R0, #0\n"
383	"BL sub_FFC0BC10\n"
384	"STR R0, [R4,#4]\n"
385	"MOV R0, #0\n"
386	"MOV R1, #1\n"
387	"BL sub_FFC0BC34\n"
388	"STR R0, [R4,#0xC]\n"
389	"MOV R3, #0\n"
390	//"STR R3, [SP,#0x10+var_10]\n"
391	"STR R3, [SP]\n"
392	//"LDR R3, =0xFFC48DC0\n" // task_CaptSeqTask
393	"LDR R3, =task_CaptSeqTask_my\n" // task_CaptSeqTask
394	"LDR R0, =0xFFC4917C\n" // aCaptseqtask ; "CaptSeqTask"
395	"MOV R2, #0x1000\n"
396	"MOV R1, #0x17\n"
397	"BL sub_FFC0BBB8\n" // uKernelMiscCreateTask o. CreateTaskStrict
398	"LDMFD SP!, {R3-R5,PC}\n"
399	".ltorg\n"
400	);
401	}; //#fe
402
403	//<!-> Porting done until here!
404
405	// -----------------
406	// SDHC-Boot-Support
407	// -----------------
408	// Required subs:
409	// Startup -> FFC1A4CC -> FFC1A080 -> FFC5DFE0 -> uAC_Boot -> CreateTask_InitFileModules -> task_InitFileModules -> FFC57CDC -> FFC3CA60 -> FFC3C89C -> FFC3C62C
410	// \->FFC5EE40 -> FFC5F410 ->/\|
411	// -> StartFactoryModeController =>\|\|
412	//
413	// uAC_Boot: FFC5D9A8
414	// CreateTask_InitFileModules: FFC5F164
415	// task_InitFileModules: FFC5F754
416
417
418	void __attribute__((naked,noinline)) sub_FFC1A4CC_my() { //#fs
419	asm volatile (
420	"STMFD SP!, {R4,LR}\n"
421	"BL sub_FFC5C4D0\n"
422	"BL sub_FFC3400C\n" //IsFactoryMode
423	"CMP R0, #1\n"
424	"BNE loc_FFC1A4EC\n"
425	"BL sub_FFC5F270\n"
426	"LDMFD SP!, {R4,LR}\n"
427	"B sub_FFC3407C\n" //StartFactoryModeController
428	"loc_FFC1A4EC:\n"
429	"BL sub_FFC5E2B8\n"
430	"LDR R4, =0x1D18\n"
431	"LDR R0, [R4,#4]\n"
432	"CMP R0, #0\n"
433	"LDMNEFD SP!, {R4,PC}\n"
434	"MOV R1, #0\n"
435	"LDR R0, =sub_FFC1A080_my\n" //------->
436	"BL sub_FFC5A938\n" //eventproc_export_CreateController
437	"STR R0, [R4,#4]\n"
438	"LDMFD SP!, {R4,PC}\n"
439	);
440	}; //#fe
441
442	void __attribute__((naked,noinline)) sub_FFC1A080_my() { //#fs
443	asm volatile (
444	"STMFD SP!, {R3-R11,LR}\n"
445	"LDR R6, =0x1D18\n"
446	"MOV R5, R1\n"
447	"LDR R0, [R6,#0x14]\n"
448	"MOV R4, R3\n"
449	"CMP R0, #1\n"
450	"BNE loc_FFC1A0A4\n"
451	"BL sub_FFC5CCF4\n"
452	"B loc_FFC1A13C\n"
453	"loc_FFC1A0A4:\n"
454	"LDR R11, =0x1167\n"
455	"MOV R7, #0\n"
456	"SUB R12, R11, #5\n"
457	"CMP R5, R12\n"
458	"MOV R9, #1\n"
459	"BEQ loc_FFC1A3D8\n"
460	"BGT loc_FFC1A1D4\n"
461	"LDR R3, =0x1063\n"
462	"CMP R5, R3\n"
463	"SUB LR, R3, #0xD\n"
464	"SUB R1, R3, #8\n"
465	"SUB R8, R3, #5\n"
466	"SUB R2, R3, #2\n"
467	"SUB R0, R3, #1\n"
468	"BEQ loc_FFC1A470\n"
469	"BGT loc_FFC1A15C\n"
470	"CMP R5, LR\n"
471	"BEQ loc_FFC1A470\n"
472	"BGT loc_FFC1A144\n"
473	"SUB R12, R5, #0x800\n"
474	"SUBS R12, R12, #3\n"
475	"BEQ loc_FFC1A2F4\n"
476	"SUB R12, R5, #0x800\n"
477	"SUBS R12, R12, #0x144\n"
478	"BEQ loc_FFC1A4A8\n"
479	"SUB R12, R5, #0x900\n"
480	"SUBS R12, R12, #0xA3\n"
481	"SUBNE R12, R5, #0x900\n"
482	"SUBNES R12, R12, #0xA5\n"
483	"BNE loc_FFC1A4C4\n"
484	"LDR R0, [R6,#0xC]\n"
485	"SUB R12, R0, #0x8000\n"
486	"SUBS R12, R12, #2\n"
487	"BEQ loc_FFC1A13C\n"
488	"LDR R0, =0x10A5\n"
489	"BL sub_FFC5B7B0\n"
490	"CMP R0, #0\n"
491	"BEQ loc_FFC1A4C4\n"
492	"loc_FFC1A13C:\n"
493	"MOV R0, #0\n"
494	"LDMFD SP!, {R3-R11,PC}\n"
495	"loc_FFC1A144:\n"
496	"CMP R5, R1\n"
497	"CMPNE R5, R8\n"
498	"CMPNE R5, R2\n"
499	"CMPNE R5, R0\n"
500	"BNE loc_FFC1A4C4\n"
501	"B loc_FFC1A470\n"
502	"loc_FFC1A15C:\n"
503	"LDR R12, =0x10AE\n"
504	"CMP R5, R12\n"
505	"BEQ loc_FFC1A40C\n"
506	"BGT loc_FFC1A1A4\n"
507	"SUB R12, R5, #0x1000\n"
508	"SUBS R12, R12, #0x65\n"
509	"BEQ loc_FFC1A470\n"
510	"SUB R12, R5, #0x1000\n"
511	"LDR R0, =0x10A3\n"
512	"SUBS R12, R12, #0xA9\n"
513	"BEQ loc_FFC1A3E8\n"
514	"SUB R12, R5, #0x1000\n"
515	"SUBS R12, R12, #0xAA\n"
516	"BEQ loc_FFC1A400\n"
517	"SUB R12, R5, #0x1000\n"
518	"SUBS R12, R12, #0xAD\n"
519	"BNE loc_FFC1A4C4\n"
520	"B loc_FFC1A3F4\n"
521	"loc_FFC1A1A4:\n"
522	"SUB R12, R5, #0x1000\n"
523	"SUBS R12, R12, #0xAF\n"
524	"BEQ loc_FFC1A3F4\n"
525	"SUB R12, R5, #0x1000\n"
526	"SUBS R12, R12, #0xB0\n"
527	"BEQ loc_FFC1A40C\n"
528	"SUB R12, R5, #0x1000\n"
529	"SUBS R12, R12, #0xB2\n"
530	"BNE loc_FFC1A4C4\n"
531	"LDR R0, =0x1008\n"
532	"MOV R1, R4\n"
533	"B loc_FFC1A3D0\n"
534	"loc_FFC1A1D4:\n"
535	"LDR R10, =0x201B\n"
536	"LDR R0, =0x1D18\n"
537	"CMP R5, R10\n"
538	"LDR R2, [R0,#0x10]!\n"
539	"LDR R1, [R0,#0x10]\n"
540	"SUB R8, R10, #0x17\n"
541	"BEQ loc_FFC1A3AC\n"
542	"BGT loc_FFC1A290\n"
543	"LDR R10, =0x116A\n"
544	"CMP R5, R10\n"
545	"BEQ loc_FFC1A398\n"
546	"BGT loc_FFC1A24C\n"
547	"SUB R12, R5, #0x1100\n"
548	"SUBS R12, R12, #0x63\n"
549	"MOVEQ R1, #0\n"
550	"MOVEQ R0, #0x82\n"
551	"BEQ loc_FFC1A3C4\n"
552	"SUB R12, R5, #0x1100\n"
553	"SUBS R12, R12, #0x65\n"
554	"BEQ loc_FFC1A3BC\n"
555	"LDR R4, =0x1168\n"
556	"CMP R5, R11\n"
557	"CMPNE R5, R4\n"
558	"BNE loc_FFC1A4C4\n"
559	"STR R9, [R6,#0x10]\n"
560	"LDR R6, =0x4508\n"
561	"CMP R1, #0\n"
562	"BEQ loc_FFC1A380\n"
563	"BL sub_FFC5CD28\n"
564	"B loc_FFC1A38C\n"
565	"loc_FFC1A24C:\n"
566	"SUB R12, R5, #0x2000\n"
567	"SUBS R12, R12, #2\n"
568	"BEQ loc_FFC1A43C\n"
569	"CMP R5, R8\n"
570	"MOV R0, R8\n"
571	"BEQ loc_FFC1A448\n"
572	"SUB R12, R5, #0x2000\n"
573	"SUBS R12, R12, #5\n"
574	"BEQ loc_FFC1A43C\n"
575	"SUB R12, R5, #0x2000\n"
576	"SUBS R12, R12, #0x19\n"
577	"BNE loc_FFC1A4C4\n"
578	"CMP R1, #0\n"
579	"BEQ loc_FFC1A13C\n"
580	"CMP R2, #0\n"
581	"BNE loc_FFC1A13C\n"
582	"B loc_FFC1A4A0\n"
583	"loc_FFC1A290:\n"
584	"LDR R12, =0x3111\n"
585	"CMP R5, R12\n"
586	"BEQ loc_FFC1A410\n"
587	"BGT loc_FFC1A2D0\n"
588	"SUB R12, R5, #0x2000\n"
589	"SUBS R12, R12, #0x1D\n"
590	"BEQ loc_FFC1A43C\n"
591	"LDR R0, =0x2027\n"
592	"CMP R5, R0\n"
593	"BEQ loc_FFC1A418\n"
594	"SUB R12, R5, #0x3000\n"
595	"SUBS R12, R12, #6\n"
596	"SUBNE R12, R5, #0x3000\n"
597	"SUBNES R12, R12, #0x110\n"
598	"BNE loc_FFC1A4C4\n"
599	"B loc_FFC1A410\n"
600	"loc_FFC1A2D0:\n"
601	"CMP R5, #0x3140\n"
602	"BEQ loc_FFC1A464\n"
603	"SUB R12, R5, #0x3200\n"
604	"SUBS R12, R12, #1\n"
605	"BEQ loc_FFC1A4C4\n"
606	"SUB R12, R5, #0x3200\n"
607	"SUBS R12, R12, #2\n"
608	"BNE loc_FFC1A4C4\n"
609	"B loc_FFC1A410\n"
610	"loc_FFC1A2F4:\n"
611	"MOV R4, #1\n"
612	"MOV R0, #2\n"
613	"BL sub_FFC5C564\n"
614	"CMP R0, #1\n"
615	"MOVEQ R4, #2\n"
616	"MOV R0, R4\n"
617	"BL sub_FFC11030\n"
618	"CMP R0, #0\n"
619	"STRNE R9, [R6,#0x14]\n"
620	"BNE loc_FFC1A34C\n"
621	"BL sub_FFC61D2C\n"
622	"BL sub_FFC5FBC8\n"
623	"BL sub_FFC606CC\n"
624	"BL sub_FFC5F518\n"
625	"BL sub_FFC60D24\n"
626	"CMP R0, #0\n"
627	"BEQ loc_FFC1A354\n"
628	"BL sub_FFC19DA4\n"
629	"BL sub_FFC60C88\n"
630	"MOV R1, R0\n"
631	"MOV R0, R11\n"
632	"BL sub_FFC5B140\n"
633	"loc_FFC1A34C:\n"
634	"MOV R0, R7\n"
635	"LDMFD SP!, {R3-R11,PC}\n"
636	"loc_FFC1A354:\n"
637	"BL sub_FFC1507C\n"
638	"CMP R0, #1\n"
639	"LDRNE R0, =0x310B\n"
640	"LDREQ R0, =0x310C\n"
641	"MOV R1, #0\n"
642	"BL sub_FFC5B140\n"
643	"BL sub_FFC5EE40_my\n" // Continue here (possibility 1) for SDHC-boot
644	"B loc_FFC1A34C\n"
645	"loc_FFC1A374:\n"
646	"MOV R0, R6\n"
647	"BL sub_FFC4661C\n"
648	"B loc_FFC1A13C\n"
649	"loc_FFC1A380:\n"
650	"BL sub_FFC5FE40\n"
651	"BL sub_FFC5FDA4\n"
652	"BL sub_FFC14D5C\n"
653	"loc_FFC1A38C:\n"
654	"CMP R5, R4\n"
655	"BNE loc_FFC1A13C\n"
656	"B loc_FFC1A374\n"
657	"loc_FFC1A398:\n"
658	"MOV R0, #1\n"
659	"BL sub_FFC5CE54\n"
660	"LDR R0, =0x1005\n"
661	"MOV R1, R10\n"
662	"B loc_FFC1A3D0\n"
663	"loc_FFC1A3AC:\n"
664	"CMP R2, #1\n"
665	"BNE loc_FFC1A410\n"
666	"BL sub_FFC5CD28\n"
667	"B loc_FFC1A13C\n"
668	"loc_FFC1A3BC:\n"
669	"MOV R1, #0\n"
670	"MOV R0, #0x83\n"
671	"loc_FFC1A3C4:\n"
672	"BL sub_FFC607A4\n"
673	"B loc_FFC1A13C\n"
674	"loc_FFC1A3CC:\n"
675	"MOV R0, R5\n"
676	"loc_FFC1A3D0:\n"
677	"BL sub_FFC5DFE0_my\n" // Continue here (possibility 2) for SDHC-boot
678	"LDMFD SP!, {R3-R11,PC}\n"
679	"loc_FFC1A3D8:\n"
680	"BL sub_FFC63CC4\n"
681	"CMP R0, #0\n"
682	"BLNE sub_FFC62BF8\n"
683	"B loc_FFC1A410\n"
684	"loc_FFC1A3E8:\n"
685	"BL sub_FFC5B7B0\n"
686	"CMP R0, #0\n"
687	"BNE loc_FFC1A13C\n"
688	"loc_FFC1A3F4:\n"
689	"MOV R0, R5\n"
690	"BL sub_FFC19E70\n"
691	"LDMFD SP!, {R3-R11,PC}\n"
692	"loc_FFC1A400:\n"
693	"BL sub_FFC5B7B0\n"
694	"CMP R0, #0\n"
695	"BNE loc_FFC1A13C\n"
696	"loc_FFC1A40C:\n"
697	"BL sub_FFC1A8CC\n"
698	"loc_FFC1A410:\n"
699	"MOV R1, R4\n"
700	"B loc_FFC1A3CC\n"
701	"loc_FFC1A418:\n"
702	"MOV R1, #0\n"
703	"BL sub_FFC5DFE0_my\n" // Continue here (possibility 2) for SDHC-boot
704	"MOV R1, #0\n"
705	"MOV R0, R10\n"
706	"BL sub_FFC5DFE0_my\n" // Continue here (possibility 2) for SDHC-boot
707	"MOV R1, #0\n"
708	"MOV R0, R8\n"
709	"loc_FFC1A434:\n"
710	"BL sub_FFC5DFE0_my\n" // Continue here (possibility 2) for SDHC-boot
711	"B loc_FFC1A13C\n"
712	"loc_FFC1A43C:\n"
713	"STR R7, [R6,#0x20]\n"
714	"BL sub_FFC1A690\n"
715	"B loc_FFC1A410\n"
716	"loc_FFC1A448:\n"
717	"STR R7, [R6,#0x20]\n"
718	"BL sub_FFC1A690\n"
719	"LDR R0, [R6,#0x10]\n"
720	"CMP R0, #1\n"
721	"BNE loc_FFC1A410\n"
722	"BL sub_FFC5CD6C\n"
723	"B loc_FFC1A13C\n"
724	"loc_FFC1A464:\n"
725	"CMP R1, #0\n"
726	"BLEQ sub_FFC1A690\n"
727	"B loc_FFC1A13C\n"
728	"loc_FFC1A470:\n"
729	"CMP R5, R2\n"
730	"MOVEQ R0, R2\n"
731	"BEQ loc_FFC1A4A0\n"
732	"BGT loc_FFC1A490\n"
733	"CMP R5, LR\n"
734	"CMPNE R5, R8\n"
735	"BEQ loc_FFC1A4A0\n"
736	"B loc_FFC1A49C\n"
737	"loc_FFC1A490:\n"
738	"CMP R5, R0\n"
739	"CMPNE R5, R3\n"
740	"BEQ loc_FFC1A4A0\n"
741	"loc_FFC1A49C:\n"
742	"MOV R0, R1\n"
743	"loc_FFC1A4A0:\n"
744	"MOV R1, #0\n"
745	"B loc_FFC1A434\n"
746	"loc_FFC1A4A8:\n"
747	"TST R4, #0x80000000\n"
748	"MOVNE R0, #1\n"
749	"LDMNEFD SP!, {R3-R11,PC}\n"
750	"BL sub_FFC65190\n"
751	"CMP R0, #0\n"
752	"BLEQ sub_FFC16F6C\n"
753	"B loc_FFC1A13C\n"
754	"loc_FFC1A4C4:\n"
755	"MOV R1, #0\n"
756	"B loc_FFC1A3CC\n"
757	);
758	}; //#fe
759
760	void __attribute__((naked,noinline)) sub_FFC5EE40_my() { //#fs
761	asm volatile (
762	"STMFD SP!, {R4,LR}\n"
763	"BL sub_FFC1A644\n"
764	"CMP R0, #0\n"
765	"LDRNE R0, =0x1061\n"
766	"BNE loc_FFC5EE68\n"
767	"BL sub_FFC1A62C\n"
768	"CMP R0, #0\n"
769	"LDRNE R0, =0x105B\n"
770	"BNE loc_FFC5EE68\n"
771	"BL sub_FFC1A65C\n"
772	"loc_FFC5EE68:\n"
773	"MOV R4, R0\n"
774	"BL sub_FFC5EFC8\n"
775	"MOV R0, R4\n"
776	"BL sub_FFC5F068\n"
777	"LDR R0, =0x5844\n"
778	"LDR R0, [R0]\n"
779	"TST R0, #1\n"
780	"TSTEQ R0, #0x10\n"
781	"BEQ loc_FFC5EE98\n"
782	"loc_FFC5EE8C:\n"
783	"MOV R1, R4\n"
784	"MOV R0, #2\n"
785	"B loc_FFC5EEDC\n"
786	"loc_FFC5EE98:\n"
787	"TST R0, #0x40\n"
788	"BEQ loc_FFC5EEAC\n"
789	"loc_FFC5EEA0:\n"
790	"MOV R1, R4\n"
791	"MOV R0, #1\n"
792	"B loc_FFC5EEDC\n"
793	"loc_FFC5EEAC:\n"
794	"TST R0, #0x20\n"
795	"BEQ loc_FFC5EEC8\n"
796	"TST R0, #0x4000\n"
797	"BNE loc_FFC5EEC8\n"
798	"loc_FFC5EEBC:\n"
799	"MOV R1, R4\n"
800	"MOV R0, #0\n"
801	"B loc_FFC5EEDC\n"
802	"loc_FFC5EEC8:\n"
803	"LDR R1, =0x102\n"
804	"BICS R1, R1, R0\n"
805	"BNE loc_FFC5EEE4\n"
806	"MOV R1, R4\n"
807	"MOV R0, #6\n"
808	"loc_FFC5EEDC:\n"
809	"LDMFD SP!, {R4,LR}\n"
810	"B sub_FFC5EDDC_my\n" // cont. for SDHC-boot
811	"loc_FFC5EEE4:\n"
812	"TST R0, #0x100\n"
813	"BNE loc_FFC5EE8C\n"
814	"TST R0, #0x400\n"
815	"BNE loc_FFC5EEA0\n"
816	"TST R0, #0x200\n"
817	"TSTEQ R0, #2\n"
818	"BNE loc_FFC5EEBC\n"
819	"TST R0, #0x40000\n"
820	"BEQ loc_FFC5EE8C\n"
821	"TST R0, #0x200000\n"
822	"MOVEQ R1, R4\n"
823	"MOVEQ R0, #1\n"
824	"BLEQ sub_FFC5EDDC_my\n" // cont. for SDHC-boot
825	"B loc_FFC5EE8C\n"
826	);
827	}; //#fe
828
829	void __attribute__((naked,noinline)) sub_FFC5EDDC_my() { //#fs
830	asm volatile (
831	"STMFD SP!, {R4-R6,LR}\n"
832	"MOVS R4, R0\n"
833	"MOV R0, #1\n"
834	"MOV R5, R1\n"
835	"BNE loc_FFC5EE1C\n"
836	"MOV R1, #0\n"
837	"MOV R0, #0\n"
838	"BL sub_FFC5C4F4\n"
839	"BL sub_FFC1A65C\n"
840	"SUB R12, R0, #0x1000\n"
841	"SUBS R12, R12, #0x5B\n"
842	"BNE loc_FFC5EE14\n"
843	"loc_FFC5EE0C:\n"
844	"BL sub_FFC5ED10\n"
845	"B loc_FFC5EE24\n"
846	"loc_FFC5EE14:\n"
847	"BL sub_FFC5ED70\n"
848	"B loc_FFC5EE24\n"
849	"loc_FFC5EE1C:\n"
850	"CMP R4, #5\n"
851	"BEQ loc_FFC5EE0C\n"
852	"loc_FFC5EE24:\n"
853	"CMP R0, #0\n"
854	"LDREQ R5, =0x1162\n"
855	"MOVEQ R4, #2\n"
856	"MOV R0, R4\n"
857	"MOV R1, R5\n"
858	"LDMFD SP!, {R4-R6,LR}\n"
859	"B sub_FFC5DFE0_my\n" //----->
860	);
861	}; //#fe
862
863	void __attribute__((naked,noinline)) sub_FFC5DFE0_my() { //#fs
864	asm volatile (
865	"STMFD SP!, {R4-R8,LR}\n"
866	"MOV R7, R1\n"
867	"MOV R6, R0\n"
868	"BL sub_FFC60D24\n"
869	"CMP R0, #0\n"
870	"BNE loc_FFC5E2B0\n"
871	"MOV R1, R7\n"
872	"MOV R0, R6\n"
873	"BL sub_FFC5D024\n"
874	"LDR R4, =0x5788\n"
875	"MOV R5, #0\n"
876	"LDR R0, [R4,#0x10]\n"
877	"CMP R0, #0x16\n"
878	"ADDLS PC, PC, R0,LSL#2\n"
879	"B loc_FFC5E2B0\n"
880	"loc_FFC5E01C:\n"
881	"B loc_FFC5E078\n"
882	"loc_FFC5E020:\n"
883	"B loc_FFC5E094\n"
884	"loc_FFC5E024:\n"
885	"B loc_FFC5E0C8\n"
886	"loc_FFC5E028:\n"
887	"B loc_FFC5E178\n"
888	"loc_FFC5E02C:\n"
889	"B loc_FFC5E188\n"
890	"loc_FFC5E030:\n"
891	"B loc_FFC5E2B0\n"
892	"loc_FFC5E034:\n"
893	"B loc_FFC5E2B0\n"
894	"loc_FFC5E038:\n"
895	"B loc_FFC5E20C\n"
896	"loc_FFC5E03C:\n"
897	"B loc_FFC5E088\n"
898	"loc_FFC5E040:\n"
899	"B loc_FFC5E2B0\n"
900	"loc_FFC5E044:\n"
901	"B loc_FFC5E20C\n"
902	"loc_FFC5E048:\n"
903	"B loc_FFC5E0BC\n"
904	"loc_FFC5E04C:\n"
905	"B loc_FFC5E2B0\n"
906	"loc_FFC5E050:\n"
907	"B loc_FFC5E2B0\n"
908	"loc_FFC5E054:\n"
909	"B loc_FFC5E0D4\n"
910	"loc_FFC5E058:\n"
911	"B loc_FFC5E0E0\n"
912	"loc_FFC5E05C:\n"
913	"B loc_FFC5E150\n"
914	"loc_FFC5E060:\n"
915	"B loc_FFC5E0A0\n"
916	"loc_FFC5E064:\n"
917	"B loc_FFC5E298\n"
918	"loc_FFC5E068:\n"
919	"B loc_FFC5E218\n"
920	"loc_FFC5E06C:\n"
921	"B loc_FFC5E248\n"
922	"loc_FFC5E070:\n"
923	"B loc_FFC5E248\n"
924	"loc_FFC5E074:\n"
925	"B loc_FFC5E194\n"
926	"loc_FFC5E078:\n"
927	"MOV R1, R7\n"
928	"MOV R0, R6\n"
929	"LDMFD SP!, {R4-R8,LR}\n"
930	"B sub_FFC5D9A8_my\n" // uAC_Boot // divert for SDHC-boot
931	"loc_FFC5E088:\n"
932	"MOV R0, R6\n"
933	"LDMFD SP!, {R4-R8,LR}\n"
934	"B sub_FFC5E9DC\n"
935	"loc_FFC5E094:\n"
936	"MOV R0, R6\n"
937	"LDMFD SP!, {R4-R8,LR}\n"
938	"B sub_FFC5D648\n"
939	"loc_FFC5E0A0:\n"
940	"SUB R12, R6, #0x3000\n"
941	"SUBS R12, R12, #6\n"
942	"BNE loc_FFC5E2B0\n"
943	"MOV R0, #0\n"
944	"BL sub_FFC19C3C\n"
945	"BL sub_FFC5E8D8\n"
946	"B loc_FFC5E2A8\n"
947	"loc_FFC5E0BC:\n"
948	"MOV R0, R6\n"
949	"LDMFD SP!, {R4-R8,LR}\n"
950	"B sub_FFC5E910\n"
951	"loc_FFC5E0C8:\n"
952	"MOV R0, R6\n"
953	"LDMFD SP!, {R4-R8,LR}\n"
954	"B sub_FFC5D7D8\n"
955	"loc_FFC5E0D4:\n"
956	"MOV R0, R6\n"
957	"LDMFD SP!, {R4-R8,LR}\n"
958	"B sub_FFC5DD80\n"
959	"loc_FFC5E0E0:\n"
960	"SUB R12, R6, #0x3200\n"
961	"SUBS R12, R12, #2\n"
962	"BNE loc_FFC5E2B0\n"
963	"MOV R0, #3\n"
964	"BL sub_FFC5CF30\n"
965	"MOV R0, #8\n"
966	"BL sub_FFC19B9C\n"
967	"MOV R1, #0\n"
968	"MOV R0, #0x19\n"
969	"BL sub_FFC2795C\n"
970	"BL sub_FFC5FE40\n"
971	"BL sub_FFC600D8\n"
972	"BL sub_FFC5F588\n"
973	"B loc_FFC5E2A8\n"
974	"loc_FFC5E150:\n"
975	"SUB R12, R6, #0x3300\n"
976	"SUBS R12, R12, #1\n"
977	"BNE loc_FFC5E2B0\n"
978	"LDR R0, =0x4010\n"
979	"BL sub_FFC19B9C\n"
980	"BL sub_FFD5AE0C\n"
981	"BL sub_FFC5F588\n"
982	"MOV R0, #4\n"
983	"BL sub_FFC5CF30\n"
984	"B loc_FFC5E2A8\n"
985	"loc_FFC5E178:\n"
986	"MOV R1, R7\n"
987	"MOV R0, R6\n"
988	"LDMFD SP!, {R4-R8,LR}\n"
989	"B sub_FFC5DEDC\n"
990	"loc_FFC5E188:\n"
991	"MOV R0, R6\n"
992	"LDMFD SP!, {R4-R8,LR}\n"
993	"B sub_FFC5EB20\n"
994	"loc_FFC5E194:\n"
995	"LDR R7, =0x1182\n"
996	"MOV R0, R6\n"
997	"CMP R0, R7\n"
998	"MOV R6, #1\n"
999	"STREQ R6, [R4,#0xA8]\n"
1000	"BEQ loc_FFC5E2A8\n"
1001	"SUB R12, R0, #0x1000\n"
1002	"SUBS R12, R12, #0x1AC\n"
1003	"BEQ loc_FFC5E1F4\n"
1004	"SUB R12, R0, #0x3000\n"
1005	"SUBS R12, R12, #0x224\n"
1006	"BNE loc_FFC5E2B0\n"
1007	"MOV R0, #8\n"
1008	"BL sub_FFC19B9C\n"
1009	"MOV R0, #3\n"
1010	"BL sub_FFC5CF30\n"
1011	"STR R5, [R4,#0xAC]\n"
1012	"LDR R0, [R4,#0xA8]\n"
1013	"CMP R0, #0\n"
1014	"MOVNE R1, #0\n"
1015	"MOVNE R0, R7\n"
1016	"STRNE R5, [R4,#0xA8]\n"
1017	"BLNE sub_FFC5DEDC\n"
1018	"B loc_FFC5E2A8\n"
1019	"loc_FFC5E1F4:\n"
1020	"LDR R0, [R4,#0xAC]\n"
1021	"CMP R0, #0\n"
1022	"BNE loc_FFC5E2A8\n"
1023	"BL sub_FFD58D34\n"
1024	"STR R6, [R4,#0xAC]\n"
1025	"B loc_FFC5E2A8\n"
1026	"loc_FFC5E20C:\n"
1027	"MOV R0, R6\n"
1028	"LDMFD SP!, {R4-R8,LR}\n"
1029	"B sub_FFC5DCA0_my\n" //----------> movie_rec.c
1030	"loc_FFC5E218:\n"
1031	"LDR R12, =0x10B0\n"
1032	"CMP R6, R12\n"
1033	"BEQ loc_FFC5E244\n"
1034	"BGT loc_FFC5E250\n"
1035	"CMP R6, #4\n"
1036	"BEQ loc_FFC5E278\n"
1037	"SUB R12, R6, #0x1000\n"
1038	"SUBS R12, R12, #0xAA\n"
1039	"SUBNE R12, R6, #0x1000\n"
1040	"SUBNES R12, R12, #0xAE\n"
1041	"BNE loc_FFC5E2B0\n"
1042	"loc_FFC5E244:\n"
1043	"BL sub_FFC5CC10\n"
1044	"loc_FFC5E248:\n"
1045	"MOV R0, R5\n"
1046	"LDMFD SP!, {R4-R8,PC}\n"
1047	"loc_FFC5E250:\n"
1048	"SUB R12, R6, #0x2000\n"
1049	"SUBS R12, R12, #4\n"
1050	"BEQ loc_FFC5E290\n"
1051	"SUB R12, R6, #0x5000\n"
1052	"SUBS R12, R12, #1\n"
1053	"SUBNE R12, R6, #0x5000\n"
1054	"SUBNES R12, R12, #6\n"
1055	"BNE loc_FFC5E2B0\n"
1056	"BL sub_FFC5D5B4\n"
1057	"B loc_FFC5E2A8\n"
1058	"loc_FFC5E278:\n"
1059	"LDR R0, [R4,#0x2C]\n"
1060	"CMP R0, #0\n"
1061	"BNE loc_FFC5E290\n"
1062	"BL sub_FFC5E46C\n"
1063	"BL sub_FFC14BF8\n"
1064	"B loc_FFC5E2A8\n"
1065	"loc_FFC5E290:\n"
1066	"BL sub_FFC5CC4C\n"
1067	"B loc_FFC5E2A8\n"
1068	"loc_FFC5E298:\n"
1069	"SUB R12, R6, #0x3000\n"
1070	"SUBS R12, R12, #0x130\n"
1071	"BNE loc_FFC5E2B0\n"
1072	"BL sub_FFC5CCF4\n"
1073	"loc_FFC5E2A8:\n"
1074	"MOV R0, #0\n"
1075	"LDMFD SP!, {R4-R8,PC}\n"
1076	"loc_FFC5E2B0:\n"
1077	"MOV R0, #1\n"
1078	"LDMFD SP!, {R4-R8,PC}\n"
1079	);
1080	}; //#fe
1081
1082	void __attribute__((naked,noinline)) sub_FFC5D9A8_my() { //#fs uAC_Boot
1083	asm volatile (
1084	"STMFD SP!, {R4-R8,LR}\n"
1085	"LDR R7, =0x8002\n"
1086	"LDR R4, =0x5788\n"
1087	"CMP R0, #2\n"
1088	"MOV R6, R1\n"
1089	"MOV R5, #1\n"
1090	"BEQ loc_FFC5DA34\n"
1091	"BGT loc_FFC5DA1C\n"
1092	"CMP R0, #0\n"
1093	"BEQ loc_FFC5DA60\n"
1094	"CMP R0, #1\n"
1095	"BNE loc_FFC5DAF8\n"
1096	"MOV R0, #8\n"
1097	"BL sub_FFC5CF30\n"
1098	"BL sub_FFC5F1A0\n"
1099	"BL sub_FFC5FCA8\n"
1100	"LDR R1, =0xFFC5DC58\n"
1101	"MOV R0, #0x20\n"
1102	"BL sub_FFC547F4\n"
1103	"BL sub_FFC5F164_my\n" //------>
1104	"BL sub_FFC5F270\n"
1105	"BL sub_FFC1A5BC\n"
1106	"LDR R0, =0x4004\n"
1107	"BL sub_FFC19B9C\n"
1108	"LDR R0, [R4,#0x68]\n"
1109	"CMP R0, #0\n"
1110	"BNE loc_FFC5DAD8\n"
1111	"BL sub_FFC19D80\n"
1112	"B loc_FFC5DADC\n"
1113	"loc_FFC5DA1C:\n"
1114	"CMP R0, #6\n"
1115	"STREQ R5, [R4,#0x28]\n"
1116	"BEQ loc_FFC5DAEC\n"
1117	"SUB R12, R0, #0x2000\n"
1118	"SUBS R12, R12, #4\n"
1119	"BNE loc_FFC5DAF8\n"
1120	"loc_FFC5DA34:\n"
1121	"SUB R12, R6, #0x1100\n"
1122	"SUBS R12, R12, #0x62\n"
1123	"BNE loc_FFC5DA50\n"
1124	"MOV R1, R7\n"
1125	"MOV R0, #0\n"
1126	"BL sub_FFC607A4\n"
1127	"STR R5, [R4,#0x60]\n"
1128	"loc_FFC5DA50:\n"
1129	"BL sub_FFC5FE40\n"
1130	"BL sub_FFC600D8\n"
1131	"BL sub_FFC5D554\n"
1132	"B loc_FFC5DAF0\n"
1133	"loc_FFC5DA60:\n"
1134	"MOV R0, #7\n"
1135	"BL sub_FFC5CF30\n"
1136	"MOV R0, R7\n"
1137	"BL sub_FFC19B9C\n"
1138	"BL sub_FFC5F1A0\n"
1139	"BL sub_FFC5FCA8\n"
1140	"LDR R1, =0xFFC5DC68\n"
1141	"MOV R0, #0x20\n"
1142	"STR R6, [R4,#0x18]\n"
1143	"BL sub_FFC547F4\n"
1144	"LDR R1, =0xFFC5DC74\n"
1145	"MOV R0, #0x20\n"
1146	"BL sub_FFC547F4\n"
1147	"STR R5, [R4,#0x28]\n"
1148	"BL sub_FFC19D10\n"
1149	"BL sub_FFC19C64\n"
1150	"LDR R0, [R4,#0x1C]\n"
1151	"LDR R1, [R4,#0x20]\n"
1152	"ORRS R0, R0, R1\n"
1153	"BLNE sub_FFC5E448\n"
1154	"LDR R0, [R4,#0x68]\n"
1155	"CMP R0, #0\n"
1156	"BNE loc_FFC5DAC4\n"
1157	"BL sub_FFC19D80\n"
1158	"B loc_FFC5DACC\n"
1159	"loc_FFC5DAC4:\n"
1160	"BL sub_FFC14A7C\n"
1161	"BL sub_FFC1A5F4\n"
1162	"loc_FFC5DACC:\n"
1163	"BL sub_FFC5F164_my\n" //------>
1164	"BL sub_FFC5F1DC\n"
1165	"B loc_FFC5DAF0\n"
1166	"loc_FFC5DAD8:\n"
1167	"BL sub_FFC14A7C\n"
1168	"loc_FFC5DADC:\n"
1169	"BL sub_FFC5F20C\n"
1170	"LDR R0, [R4,#0x30]\n"
1171	"CMP R0, #0\n"
1172	"BEQ loc_FFC5DAF0\n"
1173	"loc_FFC5DAEC:\n"
1174	"BL sub_FFC5E490\n"
1175	"loc_FFC5DAF0:\n"
1176	"MOV R0, #0\n"
1177	"LDMFD SP!, {R4-R8,PC}\n"
1178	"loc_FFC5DAF8:\n"
1179	"MOV R0, #1\n"
1180	"LDMFD SP!, {R4-R8,PC}\n"
1181	);
1182	}; //#fe
1183
1184	void __attribute__((naked,noinline)) sub_FFC5F164_my() { //#fs CreateTask_InitFileModules
1185	asm volatile (
1186	"LDR R0, =0x5850\n"
1187	"STMFD SP!, {R3,LR}\n"
1188	"LDR R1, [R0,#4]\n"
1189	"CMP R1, #0\n"
1190	"BNE locret_FFC5F19C\n"
1191	"MOV R1, #1\n"
1192	"STR R1, [R0,#4]\n"
1193	"MOV R3, #0\n"
1194	"STR R3, [SP,#8-0x8]\n"
1195	"ADR R3, task_InitFileModules_my\n" // continue for SDHC-boot (orig: FFC5F114)
1196	"MOV R1, #0x19\n"
1197	"LDR R0, =0xFFC5F2C8\n"
1198	"MOV R2, #0x1000\n"
1199	"BL sub_FFC0B8E0\n"
1200	"locret_FFC5F19C:\n"
1201	"LDMFD SP!, {R12,PC}\n"
1202	);
1203	}; //#fe
1204
1205	void __attribute__((naked,noinline)) task_InitFileModules_my() { //#fs
1206	asm volatile (
1207	"STMFD SP!, {R4-R6,LR}\n"
1208	"BL sub_FFC57CB0\n"
1209	"LDR R5, =0x5006\n"
1210	"MOVS R4, R0\n"
1211	"MOVNE R1, #0\n"
1212	"MOVNE R0, R5\n"
1213	"BLNE sub_FFC5B140\n"
1214	"BL sub_FFC57CDC_my\n" // continue to SDHC-hook here!
1215	"BL core_spytask_can_start\n" // CHDK: Set "it's-save-to-start"-Flag for spytask
1216	"CMP R4, #0\n"
1217	"MOVEQ R0, R5\n"
1218	"LDMEQFD SP!, {R4-R6,LR}\n"
1219	"MOVEQ R1, #0\n"
1220	"BEQ sub_FFC5B140\n"
1221	"LDMFD SP!, {R4-R6,PC}\n"
1222	);
1223	}; //#fe
1224
1225	void __attribute__((naked,noinline)) sub_FFC57CDC_my() { //#fs
1226	asm volatile (
1227	"STMFD SP!, {R4,LR}\n"
1228	"BL sub_FFC3CA60_my\n" // continue to SDHC-hook here!
1229	"LDR R4, =0x55D0\n"
1230	"LDR R0, [R4,#4]\n"
1231	"CMP R0, #0\n"
1232	"BNE loc_FFC57D0C\n"
1233	"BL sub_FFC660A4\n"
1234	"BL sub_FFCDCC74\n"
1235	"BL sub_FFC660A4\n"
1236	"BL sub_FFC3A450\n"
1237	"BL sub_FFC660B4\n"
1238	"BL sub_FFCDCD40\n"
1239	"loc_FFC57D0C:\n"
1240	"MOV R0, #1\n"
1241	"STR R0, [R4]\n"
1242	"LDMFD SP!, {R4,PC}\n"
1243	);
1244	}; //#fe
1245
1246	void __attribute__((naked,noinline)) sub_FFC3CA60_my() { //#fs
1247	asm volatile (
1248	"STMFD SP!, {R4-R6,LR}\n"
1249	"MOV R6, #0\n"
1250	"MOV R0, R6\n"
1251	"BL sub_FFC3C520\n"
1252	"LDR R4, =0x111A8\n"
1253	"MOV R5, #0\n"
1254	"LDR R0, [R4,#0x38]\n"
1255	"BL sub_FFC3CF54\n"
1256	"CMP R0, #0\n"
1257	"LDREQ R0, =0x287C\n"
1258	"STREQ R5, [R0,#0x10]\n"
1259	"STREQ R5, [R0,#0x14]\n"
1260	"STREQ R5, [R0,#0x18]\n"
1261	"MOV R0, R6\n"
1262	"BL sub_FFC3C560\n"
1263	"MOV R0, R6\n"
1264	"BL sub_FFC3C89C_my\n" // continue to SDHC-hook here!
1265	"MOV R5, R0\n"
1266	"MOV R0, R6\n"
1267	"BL sub_FFC3C908\n"
1268	"LDR R1, [R4,#0x3C]\n"
1269	"AND R2, R5, R0\n"
1270	"CMP R1, #0\n"
1271	"MOV R0, #0\n"
1272	"MOVEQ R0, #0x80000001\n"
1273	"BEQ loc_FFC3CAF4\n"
1274	"LDR R3, [R4,#0x2C]\n"
1275	"CMP R3, #2\n"
1276	"MOVEQ R0, #4\n"
1277	"CMP R1, #5\n"
1278	"ORRNE R0, R0, #1\n"
1279	"BICEQ R0, R0, #1\n"
1280	"CMP R2, #0\n"
1281	"BICEQ R0, R0, #2\n"
1282	"ORREQ R0, R0, #0x80000000\n"
1283	"BICNE R0, R0, #0x80000000\n"
1284	"ORRNE R0, R0, #2\n"
1285	"loc_FFC3CAF4:\n"
1286	"STR R0, [R4,#0x40]\n"
1287	"LDMFD SP!, {R4-R6,PC}\n"
1288	);
1289	}; //#fe
1290
1291	void __attribute__((naked,noinline)) sub_FFC3C89C_my() { //#fs
1292	asm volatile (
1293	"STMFD SP!, {R4-R6,LR}\n"
1294	"LDR R5, =0x287C\n"
1295	"MOV R6, R0\n"
1296	"LDR R0, [R5,#0x14]\n"
1297	"CMP R0, #0\n"
1298	"MOVNE R0, #1\n"
1299	"LDMNEFD SP!, {R4-R6,PC}\n"
1300	"MOV R0, #0x17\n"
1301	"MUL R1, R0, R6\n"
1302	"LDR R0, =0x111A8\n"
1303	"ADD R4, R0, R1,LSL#2\n"
1304	"LDR R0, [R4,#0x38]\n"
1305	"MOV R1, R6\n"
1306	"BL sub_FFC3C62C_my\n" // continue to SDHC-hook here!
1307	"CMP R0, #0\n"
1308	"LDMEQFD SP!, {R4-R6,PC}\n"
1309	"LDR R0, [R4,#0x38]\n"
1310	"MOV R1, R6\n"
1311	"BL sub_FFC3C794\n"
1312	"CMP R0, #0\n"
1313	"LDMEQFD SP!, {R4-R6,PC}\n"
1314	"MOV R0, R6\n"
1315	"BL sub_FFC3C128\n"
1316	"CMP R0, #0\n"
1317	"MOVNE R1, #1\n"
1318	"STRNE R1, [R5,#0x14]\n"
1319	"LDMFD SP!, {R4-R6,PC}\n"
1320	);
1321	}; //#fe
1322
1323	void __attribute__((naked,noinline)) sub_FFC3C62C_my() { //#fs ; Partition table parse takes place here. => SDHC-boot
1324	asm volatile (
1325	"STMFD SP!, {R4-R8,LR}\n"
1326	"MOV R8, R0\n"
1327	"MOV R0, #0x17\n"
1328	"MUL R1, R0, R1\n"
1329	"LDR R0, =0x111A8\n"
1330	"MOV R6, #0\n"
1331	"ADD R7, R0, R1,LSL#2\n"
1332	"LDR R0, [R7,#0x3C]\n"
1333	"MOV R5, #0\n"
1334	"CMP R0, #6\n"
1335	"ADDLS PC, PC, R0,LSL#2\n"
1336	"B loc_FFC3C778\n"
1337	"loc_FFC3C65C:\n"
1338	"B loc_FFC3C690\n"
1339	"loc_FFC3C660:\n"
1340	"B loc_FFC3C678\n"
1341	"loc_FFC3C664:\n"
1342	"B loc_FFC3C678\n"
1343	"loc_FFC3C668:\n"
1344	"B loc_FFC3C678\n"
1345	"loc_FFC3C66C:\n"
1346	"B loc_FFC3C678\n"
1347	"loc_FFC3C670:\n"
1348	"B loc_FFC3C770\n"
1349	"loc_FFC3C674:\n"
1350	"B loc_FFC3C678\n"
1351	"loc_FFC3C678:\n"
1352	"MOV R2, #0\n"
1353	"MOV R1, #0x200\n"
1354	"MOV R0, #3\n"
1355	"BL sub_FFC51E5C\n"
1356	"MOVS R4, R0\n"
1357	"BNE loc_FFC3C698\n"
1358	"loc_FFC3C690:\n"
1359	"MOV R0, #0\n"
1360	"LDMFD SP!, {R4-R8,PC}\n"
1361	"loc_FFC3C698:\n"
1362	"LDR R12, [R7,#0x4C]\n"
1363	"MOV R3, R4\n"
1364	"MOV R2, #1\n"
1365	"MOV R1, #0\n"
1366	"MOV R0, R8\n"
1367	//"BLX R12\n" // !! Workaround !!
1368	"MOV LR, PC\n" // gcc won't compile "BLX R12" nor "BL R12".
1369	"MOV PC, R12\n" // workaround: make your own "BL" and hope we don't need the change to thumb-mode
1370	"CMP R0, #1\n"
1371	"BNE loc_FFC3C6C4\n"
1372	"MOV R0, #3\n"
1373	"BL sub_FFC51F9C\n"
1374	"B loc_FFC3C690\n"
1375	"loc_FFC3C6C4:\n"
1376	"MOV R0, R8\n"
1377	"BL sub_FFCF97DC\n" // Add FAT32 autodetect-code after this line\n"
1378
1379	"MOV R1, R4\n" // pointer to MBR in R1
1380	"BL mbr_read_dryos\n" // total sectors count in R0 before and after call
1381
1382	// Start of DataGhost's FAT32 autodetection code
1383	// Policy: If there is a partition which has type W95 FAT32, use the first one of those for image storage
1384	// According to the code below, we can use R1, R2, R3 and R12.
1385	// LR wasn't really used anywhere but for storing a part of the partition signature. This is the only thing
1386	// that won't work with an offset, but since we can load from LR+offset into LR, we can use this to do that :)
1387	"MOV R12, R4\n" // Copy the MBR start address so we have something to work with
1388	"MOV LR, R4\n" // Save old offset for MBR signature
1389	"MOV R1, #1\n" // Note the current partition number
1390	"B dg_sd_fat32_enter\n" // We actually need to check the first partition as well, no increments yet!
1391	"dg_sd_fat32:\n"
1392	"CMP R1, #4\n" // Did we already see the 4th partition?
1393	"BEQ dg_sd_fat32_end\n" // Yes, break. We didn't find anything, so don't change anything.
1394	"ADD R12, R12, #0x10\n" // Second partition
1395	"ADD R1, R1, #1\n" // Second partition for the loop
1396	"dg_sd_fat32_enter:\n"
1397	"LDRB R2, [R12, #0x1BE]\n" // Partition status
1398	"LDRB R3, [R12, #0x1C2]\n" // Partition type (FAT32 = 0xB)
1399	"CMP R3, #0xB\n" // Is this a FAT32 partition?
1400	"CMPNE R3, #0xC\n" // Not 0xB, is it 0xC (FAT32 LBA) then?
1401	"BNE dg_sd_fat32\n" // No, it isn't.
1402	"CMP R2, #0x00\n" // It is, check the validity of the partition type
1403	"CMPNE R2, #0x80\n"
1404	"BNE dg_sd_fat32\n" // Invalid, go to next partition
1405	// This partition is valid, it's the first one, bingo!
1406	"MOV R4, R12\n" // Move the new MBR offset for the partition detection.
1407
1408	"dg_sd_fat32_end:\n"
1409	// End of DataGhost's FAT32 autodetection code
1410
1411	"LDRB R1, [R4,#0x1C9]\n" // Continue with firmware
1412	"LDRB R3, [R4,#0x1C8]\n"
1413	"LDRB R12, [R4,#0x1CC]\n"
1414	"MOV R1, R1,LSL#24\n"
1415	"ORR R1, R1, R3,LSL#16\n"
1416	"LDRB R3, [R4,#0x1C7]\n"
1417	"LDRB R2, [R4,#0x1BE]\n"
1418	//"LDRB LR, [R4,#0x1FF]\n" // replaced, see below
1419	"ORR R1, R1, R3,LSL#8\n"
1420	"LDRB R3, [R4,#0x1C6]\n"
1421	"CMP R2, #0\n"
1422	"CMPNE R2, #0x80\n"
1423	"ORR R1, R1, R3\n"
1424	"LDRB R3, [R4,#0x1CD]\n"
1425	"MOV R3, R3,LSL#24\n"
1426	"ORR R3, R3, R12,LSL#16\n"
1427	"LDRB R12, [R4,#0x1CB]\n"
1428	"ORR R3, R3, R12,LSL#8\n"
1429	"LDRB R12, [R4,#0x1CA]\n"
1430	"ORR R3, R3, R12\n"
1431	//"LDRB R12, [R4,#0x1FE]\n" // replaced, see below
1432	"LDRB R12, [LR,#0x1FE]\n" // New! First MBR signature byte (0x55)
1433	"LDRB LR, [LR,#0x1FF]\n" // Last MBR signature byte (0xAA)
1434	"MOV R4, #0\n"
1435	"BNE loc_FFC3C74C\n"
1436	"CMP R0, R1\n"
1437	"BCC loc_FFC3C74C\n"
1438	"ADD R2, R1, R3\n"
1439	"CMP R2, R0\n"
1440	"CMPLS R12, #0x55\n"
1441	"CMPEQ LR, #0xAA\n"
1442	"MOVEQ R6, R1\n"
1443	"MOVEQ R5, R3\n"
1444	"MOVEQ R4, #1\n"
1445	"loc_FFC3C74C:\n"
1446	"MOV R0, #3\n"
1447	"BL sub_FFC51F9C\n"
1448	"CMP R4, #0\n"
1449	"BNE loc_FFC3C784\n"
1450	"MOV R6, #0\n"
1451	"MOV R0, R8\n"
1452	"BL sub_FFCF97DC\n"
1453	"MOV R5, R0\n"
1454	"B loc_FFC3C784\n"
1455	"loc_FFC3C770:\n"
1456	"MOV R5, #0x40\n"
1457	"B loc_FFC3C784\n"
1458	"loc_FFC3C778:\n"
1459	"MOV R1, #0x374\n"
1460	"LDR R0, =0xFFC3C620\n"
1461	"BL sub_FFC0BDB8\n"
1462	"loc_FFC3C784:\n"
1463	"STR R6, [R7,#0x44]!\n"
1464	"MOV R0, #1\n"
1465	"STR R5, [R7,#4]\n"
1466	"LDMFD SP!, {R4-R8,PC}\n"
1467	);
1468	}; //#fe
1469
1470

Note: See TracBrowser for help on using the repository browser.

chdk

Context Navigation

source: branches/release-1_0/platform/a470/sub/102c/boot.c @ 1625

Download in other formats: